**Official DFI LanParty UT 790FX-M2R Review/Overclock/Guide Thread**

[aGeoM]

Brother Esau,

Have you started to work through some of the BIOS settings for the Phenom yet? I looked through the early ones you posted, they seemed much more oriented toward the X2..... If there are some X4 ideas, I must have missed them (this thread is getting a bit LONG!!)

There are a zillion settings that may indeed affect stability for phenom OC'ing, but I have no idea what they do.

Here are some that I do not understand

From Advanced Chipset Features

Memory Hole
Memory Hole Remapping
Auto Optimize Bottom IO

From Genie (these are all somewhat mysterious for sure)

DCTs Mode - Ganged, Unganged ?
IH Flow Control Mode - Enabled Disabled
HT Link Tristate - Enabled Disabled
2x LCLK Mode - Enabled Disabled
UnitID Clumping - Enabled Disabled
CPI DID - 1,2,4,8,16
CPU FID - 09 or some other Hex number
CPU-NB FID - 1,2
CPU-NB FID - 06 or some other Hex number
AMD CPU Stepping - P0, P1

Any direction of help would be appreciated

Thanks

Dan

Sapphire Bios Guide says:

HT Link Width: 16bit/8bit mode, CPU to NB bus hyper transfer bandwidth
HT Link Frequency: 200~2600MHz (2.6GHz), CPU to NB bus hyper transfer speed
IH Flow-Control Mode: Enable to support the use of the Isochronous Flow-Control Mode
function to provide reduced latency for certain classes of southbridge traffic
HT Link Tristate: Enable to tristate parts of the link in order to reduce power consumption.
By default, no lanes are tristated. The CAD and CTL lanes may be tristated together or CAD,
CTL, and CLK may be tristated.
2X LCLK Mode: nil (will be removed by next version)
UnitID Clumping: Enable to support UnitID clumping to increase the number of outstanding
requests supported by a single device. It maybe enabled for PCI-Express GFX links in certain
configurations. Clumping may be enabled when using only the lower number bridge within
each PCI-Express GFX core