Quote Originally Posted by Turtle 1
So I am not understanding. In nehalem your saying Intel could add a vector unit . But it would also keep the SSEn units. As we are all aware that Intel has added sse4 instruction set to penryn 30 instructions and nehalem another 20 instructions for a total of 50 instructions . Would this still work with the vector units?
let me explain it this way
SSE, SSE2, SSE3...SSEn
http://en.wikipedia.org/wiki/Streaming_SIMD_Extensions
Do Floating point and SIMD math (aka vector)
http://en.wikipedia.org/wiki/SIMD
By seperating the Floating point math unit from the Vector unit, they can massively improve performance for BOTH.
Since the Floating Point Unit can specialize for Floating point math (and not have to worry about vector math)
And the Vector unit, only has to deal with Vectors.
Now Altivec/VMX (depending on who you ask [Motorola or IBM])
Basically does exactly that.
Now what I am hoping for is that they follow the Altivec design, which is VASTLY superior to ANY Intel/AMD Streaming SIMD Extension