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Thread: Team Group Setup details on DFI NF4/CFX3200DR thread

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    Team Group Setup details on DFI NF4/CFX3200DR thread

    **reference cpu is Opteron 154 aircooling
    PSU: PC P&C 1000w

    Bh5 First:

    FSB Bus Frequency: 250
    LDT/FSB Frequency Ratio: 4x
    CPU/FSB Frequency Ratio: 12
    RD580 HT PLL Speed: hight
    HT Bus NMOS Drive Strength: 31
    HT Bus PMOS Drive Strength: 31
    HT Bus Receiver Impendence: 31 or 5~10
    CPU HT Bus Drive Strength: Strong
    K8 Cool & Quiet Support: none

    CPU VID Control: 1.4
    CPU VID Special Control: auto
    DRAM Voltage Control: 3.26v(real vdimm is about 3.2v)
    SB PCIE Voltage: 1.8v
    NB Analogue Voltage:1.21v
    LDT Bus Voltage:1.21v
    NB Core Voltage:1.21v

    DRAM Frequency Set: 200mhz, 1:1
    CPC: enable or auto
    CAS (tCL):2
    tRCP:2
    tRAS:5
    tRP: 2
    tRC: 7
    tRFC:12
    tRRD:2
    tRW:2
    tRTW:2
    tWTR:1
    tREF: 3120 or (4708 , 3684 for long time bench like super pi 32m)
    Bank Interleaved: enable
    Errata 94: Disabled
    Errata 123: AUTO or disable
    Odd Divisor Correct: disable

    DQS Skew Control:0
    DQS Skew Value: none
    DRAM Drive Strength: 3 (4 works perfectly as well) or try 5 as well
    DRAM Data Drive Strength: 2 or auto
    DIMM 1/2 Clock Timing Skew: auto
    DIMM 3/4 Clock Timing Skew: delay 300
    Max Async Latency: 7ns
    Read Preamble Time:5ns
    IdleCycle Limit: 16clks
    Dynamic Counter: Enable
    R/W Queue Bypass: 16x
    Bypass Max: 7x
    Burst Length: 4

    ************************************************** *******************************

    TCCD...weird, my TCCD used to go very well on all NF4 board with 2.5-3-3-6 setting over 300mhz 1:1
    However, no matter what, just can't get it running @ this board, but here is a solution, thanks the ODD
    I can run 335 fsb with ODD so I can have like 301mhz on ram though.


    Team Group pc4800

    FSB Bus Frequency: 335 (so it will be 300 on the ram)
    LDT/FSB Frequency Ratio: 4x
    CPU/FSB Frequency Ratio: 9
    RD580 HT PLL Speed: hight
    HT Bus NMOS Drive Strength: 31
    HT Bus PMOS Drive Strength: 31
    HT Bus Receiver Impendence: 31 or 5~10
    CPU HT Bus Drive Strength: Strong
    K8 Cool & Quiet Support: none

    CPU VID Control: 1.4
    CPU VID Special Control: auto
    DRAM Voltage Control: 2.67v(real vdimm is about 2.72v)
    SB PCIE Voltage: 1.8v
    NB Analogue Voltage:1.21v
    LDT Bus Voltage:1.21v
    NB Core Voltage:1.21v

    DRAM Frequency Set: 200mhz, 1:1
    CPC: enable or auto
    CAS (tCL):2.5
    tRCP:3
    tRAS:5 or 6
    tRP: 3
    tRC: 7
    tRFC:14
    tRRD:2
    tRW:2
    tRTW:2
    tWTR:1
    tREF: 3120 or (4708 , 3684 for long time bench like super pi 32m)
    Bank Interleaved: enable
    Errata 94: Disabled
    Errata 123: AUTO or disable
    Odd Divisor Correct: Enable

    DQS Skew Control:0
    DQS Skew Value: none
    DRAM Drive Strength: 3
    DRAM Data Drive Strength: 2 or auto
    DIMM 1/2 Clock Timing Skew: auto
    DIMM 3/4 Clock Timing Skew: delay 450 or 600
    Max Async Latency: 8ns
    Read Preamble Time:5ns
    IdleCycle Limit: 16clks
    Dynamic Counter: Enable
    R/W Queue Bypass: 16x
    Bypass Max: 7x
    Burst Length: 4

    ************************************************** ********************************

    Team Group UCCC:


    FSB Bus Frequency: 280
    LDT/FSB Frequency Ratio: 4x
    CPU/FSB Frequency Ratio: 11
    RD580 HT PLL Speed: hight
    HT Bus NMOS Drive Strength: 31
    HT Bus PMOS Drive Strength: 31
    HT Bus Receiver Impendence: 31 or 5~10
    CPU HT Bus Drive Strength: Strong
    K8 Cool & Quiet Support: none

    CPU VID Control: 1.4
    CPU VID Special Control: auto
    DRAM Voltage Control: 2.63v(real vdimm is about 2.67v)
    SB PCIE Voltage: 1.8v
    NB Analogue Voltage:1.21v
    LDT Bus Voltage:1.21v
    NB Core Voltage:1.21v

    DRAM Frequency Set: 200mhz, 1:1
    CPC: enable or auto
    CAS (tCL):3
    tRCP:4
    tRAS:6~8
    tRP: 4 (some UCCC will do 3 especially 0552 dated)
    tRC: 7
    tRFC:14
    tRRD:2
    tRW:2
    tRTW:3
    tWTR:2
    tREF: 3120 or (4708 , 3684 for long time bench like super pi 32m)
    Bank Interleaved: enable
    Errata 94: Disabled
    Errata 123: AUTO or disable
    Odd Divisor Correct: Disable

    DQS Skew Control:0
    DQS Skew Value: none
    DRAM Drive Strength: 5 (think about 7)
    DRAM Data Drive Strength: 2 or auto
    DIMM 1/2 Clock Timing Skew: auto
    DIMM 3/4 Clock Timing Skew: delay 300
    Max Async Latency: 8ns
    Read Preamble Time:5ns
    IdleCycle Limit: 16clks
    Dynamic Counter: Enable
    R/W Queue Bypass: 16x
    Bypass Max: 7x
    Burst Length: 4


    ************************************************** ************************************

    Team Group Micron 5bf:

    FSB Bus Frequency: 275
    LDT/FSB Frequency Ratio: 4x
    CPU/FSB Frequency Ratio: 11
    RD580 HT PLL Speed: hight
    HT Bus NMOS Drive Strength: 31
    HT Bus PMOS Drive Strength: 31
    HT Bus Receiver Impendence: 31 or 5~10
    CPU HT Bus Drive Strength: Strong
    K8 Cool & Quiet Support: none

    CPU VID Control: 1.4
    CPU VID Special Control: auto
    DRAM Voltage Control: 2.70v(real vdimm is about 2.74v)
    SB PCIE Voltage: 1.8v
    NB Analogue Voltage:1.21v
    LDT Bus Voltage:1.21v
    NB Core Voltage:1.21v

    DRAM Frequency Set: 200mhz, 1:1
    CPC: enable or auto
    CAS (tCL):3
    tRCP:3
    tRAS:6~8
    tRP: 3
    tRC: 7
    tRFC:14
    tRRD:2
    tRW:2
    tRTW:2 or 3
    tWTR:2
    tREF: 3120 or 4708 , 3684 for long time bench like super pi 32m
    Bank Interleaved: enable
    Errata 94: Disabled
    Errata 123: AUTO or disable
    Odd Divisor Correct: Disable

    DQS Skew Control:0
    DQS Skew Value: none
    DRAM Drive Strength: 3 or 5
    DRAM Data Drive Strength: 2 or auto

    DIMM 1/2 Clock Timing Skew: auto
    DIMM 3/4 Clock Timing Skew: delay 300 or 450
    Max Async Latency: 8ns
    Read Preamble Time:5ns
    IdleCycle Limit: 16clks
    Dynamic Counter: Enable
    R/W Queue Bypass: 16x
    Bypass Max: 7x
    Burst Length: 4

    ************************************************** ************************************

    Team Group I/A series:

    FSB Bus Frequency: 280
    LDT/FSB Frequency Ratio: 4x
    CPU/FSB Frequency Ratio: 11
    RD580 HT PLL Speed: hight
    HT Bus NMOS Drive Strength: 31
    HT Bus PMOS Drive Strength: 31
    HT Bus Receiver Impendence: 31 or 5~10
    CPU HT Bus Drive Strength: Strong
    K8 Cool & Quiet Support: none

    CPU VID Control: 1.4
    CPU VID Special Control: auto
    DRAM Voltage Control: 2.63v(real vdimm is about 2.67v)
    SB PCIE Voltage: 1.8v
    NB Analogue Voltage:1.21v
    LDT Bus Voltage:1.21v
    NB Core Voltage:1.21v

    DRAM Frequency Set: 200mhz, 1:1
    CPC: enable or auto
    CAS (tCL):3
    tRCP:3
    tRAS:6~8
    tRP: 2
    tRC: 7
    tRFC:14
    tRRD:2
    tRW:2
    tRTW:2
    tWTR:2
    tREF: 3120 or 4708 , 3684 for long time bench like super pi 32m
    Bank Interleaved: enable
    Errata 94: Disabled
    Errata 123: AUTO or disable
    Odd Divisor Correct: Disable

    DQS Skew Control:0
    DQS Skew Value: none
    DRAM Drive Strength: 4 or 6
    DRAM Data Drive Strength: 2 or auto
    DIMM 1/2 Clock Timing Skew: auto
    DIMM 3/4 Clock Timing Skew: delay 450
    Max Async Latency: 8ns
    Read Preamble Time:5ns
    IdleCycle Limit: 16clks
    Dynamic Counter: Enable
    R/W Queue Bypass: 16x
    Bypass Max: 7x
    Burst Length: 4

    ************************************************** **********************************************

    I will contune to update about all those settings.

    OPB
    Last edited by Onepagebook; 05-20-2006 at 10:28 PM.

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