Tref values

[jiff]

Noob question, but how does the tref value in bios work out to the value's in A64 tweaker, ie if I wanted to use 133- 7.8us what value would that be in bios.

thanks Jeff

[c42]

Do a search there is a post in this forum somewhere with the values listed for your board I believe. Every board is different though.

[jiff]

Do a search there is a post in this forum somewhere with the values listed for your board I believe. Every board is different though.

thanks for that, thought there was some sort of mathamaticial equation for it

[Blindbat]

Noob question, but how does the tref value in bios work out to the value's in A64 tweaker, ie if I wanted to use 133- 7.8us what value would that be in bios.

thanks Jeff

133 @ 7.8µs is 1032 in bios it seems, for you migth be relying on a similar document as mine which raises a doubt about what the real value is. I will look in my bios and report back.

here is somewhat of an incomplete list of all possible values...

1552= 100mhz(?.?us)
2064= 133mhz(?.?us)
2592= 166mhz(?.?us)
3120= 200mhz(?.?us
---------------------

3632= 100mhz(?.?us)
4128= 133mhz(?.?us)
4672= 166mhz(?.?us)
0064= 200mhz(?.?us)

---------------------

0776= 100mhz(?.?us)
1032= 133mhz(?.?us)<---?
1296= 166mhz(?.?us)
1560= 200mhz(?.?us)

---------------------

1816= 100mhz(?.?us)
2064= 133mhz(?.?us)
2336= 166mhz(?.?us)
0032= 200mhz(?.?us)

---------------------

0388= 100mhz(15.6us)
0516= 133mhz(15.6us)
0648= 166mhz(15.6us)
0780= 200mhz(15.6us)

---------------------

0908= 100mhz(7.8us)
1032= 133mhz(7.8us)<------?
1168= 166mhz(7.8us)
0016= 200mhz(7.8us)

---------------------

1536= 100mhz(3.9us)
2048= 133mhz(3.9us)
2560= 166mhz(3.9us)
3072= 200mhz(3.9us)

---------------------

3684= 100mhz(1.95us)
4196= 133mhz(1.95us)
4708= 166mhz(1.95us)
0128= 200mhz(1.95us)

courtesy of Jess1313 at Overclockers forum.

Edit:

interesting, this was probably a trick question, for as indicated in the chart I am providing here, a DFI bios (nf4 in my case), also shows the same conflict of information.

That is, the same 1032 value being used in 2 banks of different µs timing. I dunno the answer to this one!

[Ubermann]

1168 should take your VX high and stable. But other ones works also.

[EnJoY]

4672....best performance for BH5/BH6/UTT.

[jcniest5]

Can someone show me how to calcalate a tref if I set my FSB to a certain value in the BIOS, what formula shoud I use to calcalate the correct value so my system won't crash, reboots or freezes? According to Everest, my default Memory Refresh Rate is (Reduced 7.8us - Self-timered) or something like that.

Thanks in advance...

[Cornelious0_0]

Can someone show me how to calcalate a tref if I set my FSB to a certain value in the BIOS, what formula shoud I use to calcalate the correct value so my system won't crash, reboots or freezes?

I'd also like to know if this is possible....because if for no other reason then straight-out stability I'd like to know the optimal tref value for any of my given htt speeds I might be hitting...cus I actually went through at stock clocks, and even at lower memory speeds, some tref values will not boot into windows....I'd find it very usefull to see which relate to which clock speeds more appropriately.

[hovo73]

I am also totally confused about this. I mean it is almost impossible to make a logical or an intellegent choice when you are trying these. They are not in any kind of order, and I don't have a clue, which one is tighter or more loose.

[Mardok]

133 MHz 7.8us = in bios = 4128

[mad mikee]

Just trying out my table, tried 2336 (see my table above, = 299.5 FSB @ 7.8) and running memtest on 300x9 2.5-3-3-6 @ 2.65 Vdimm (will pass test 5 no problem, (runs and checks again in 'da lab' ) looks like test 8 also ) Would never have gotten that value from anywhere else. And since the CPU fan is temp controlled on the test bench, get audible indication of what stresses teh CPU more. (This seems to not stress it as much when you 'get it right'. ) Also if you can a slightly less FSB value seems to work better than a value that is higher than the target FSB..

All the exponents cancel out after all is said and done so just take a TREF value (cycles) and divide by the 'offical' refresh rates (15.6, 7.8, etc) which is how I got my table. Seems like 7.8 is a good value so far . That is how I got teh table above. It is also helping me to get 250x11 @ 3.27vdimm(PITA since there is nothing in the table between 236 and 263 FSB so its a crap shoot), will find out if all this helps vcore also later today.

Oh well, back to testing!

P.S. Read up on the GSkill 3200 thread, Agent-JC gave me the other part of the equation for fiddling w/ drive strengths.

@WSP: use space a column marker, or grab it and dump it into a .txt doc and tab it out (sorry no table software on this machine) make improve your settings

[WeStSiDePLaYa]

anybody got any more info on how to set my tref accordingly? i would think this would be highly researched as it can have a HUGE impact on bandwidth.

[The Mofo]

Im sure someone in the programming/coding forum can come up with a simple GUI proggie to convert the values. Try posting in there.

[DudeMiester]

What was posted in that other forum seems to make sense. Basically tRef is the number of clockcycles between each refresh of the RAM banks. Now RAM has a certain ideal refresh time, but this is an absolute time not a clockspeed. So basically you need to set tRef so the number of clock ticks between refreshes will correspond to the amount of absolute time you need between refreshes.

In order to do this, you need to know how long one clock tick is, but that's easy it's just 1s/clockspeed. Then you take the RAMs ideal refresh time in seconds, and divide by the time per clock tick to get the number of clocks you need to wait. Then just pick a tRef that corresponds to this (i.e. closest without going over).

I would also guess that due to potential instability, RAM might need more frequent refreashes as you overclock it, so you may want to factor this in.

[felinusz]

Hold on, are you saying that depending on your memory's clock frequency, you will need a different TREF value for optimum stability? That doesn't seem to add up with my testing.

I've found that a TREF setting that gets my BH-5 stable at 240 MHz/3.2v, where it is unstable with other TREF settings, also helps get my BH-5 stable at 260 MHz/3.4v, and 272 MHz/3.8v.

Tested across a range of frequencies, specific TREF settings still seems to help attain stability, unless I'm not being thorough enough with my testing.

So, what's up with that?

4672....best performance for BH5/BH6/UTT.

Likewise, according to what I just read above, this should be dependant on clockspeed?

[felinusz]

But the bit that needs testing, if you overclock the modules should you try and maintain the default refresh interval?

So if the the spec for your modules said 7.8us and you run the memory at 300Mhz what tREF value should you use?

This is theoretical on his part, but it makes sense...

But is the default refresh interval neccessarily the best refresh time for heavily overclocked and overvolted memory? BH-5 for example, is typically run at extremely tight timings.... I'm wondering if the timings skew the required refresh time.



EDIT:

I think you're onto something really big here, I just tested out the theory quickly, and it seems to work for me as well (granted this was a quick test).

I'm trying to get my BH-5 memtest86+ completely stable at 272 MHz - been using a tRef value of 4708. Various tRef values seem to either increase or decrease the number of errors per pass of test #5, 4708 is one of these.

According to the theoretical formula:

Ideal tREF = SpecRefreshTime / (1/ClockFrequency)

Ideal tREF = 7.8 / (1/272)

Ideal tREF = 2120

The closest value to that in the DFI NF4 BIOS is 2064, which appears twice for some reason. Using the first of the two 2064 values in the list, my BH-5 is on loop 46 (of test #5) right now, 8 errors. It was error free for 20 loops at the beginning. I'm using a DS of 6, and a DDS of 1.

Before this tREF value, it would error once every 2 passes or so, consistantly.

No stability yet, but a signifigant improvement, as measured by the number of errors per pass.

Anyone else want to try this out with an unstable memory overclock?

[Jomiy]

Wow I'm gonna try this now!

Okay in simple terms:

Everest refresh rate*FSB = Tref cycles

i.e.
7.8*200 = 1560
7.8*300 = 2457

I'm gonna try it and report back tomorrow.....

[jcniest5]

Okay, let me see if I understood it correct. So, if my FSB/HTT is 250, it'll then be 250*7.8=1950, and the closet TREF values to that without going over is: 2064(133Mhz-15.6us&1.95us). That's it? I still don't get. Man, am I so dumb or what?!!! I just don't get how these numbers/values work.

[burningrave101]

Wow I'm gonna try this now!

Okay in simple terms:

Everest refresh rate*FSB = Tref cycles

i.e.
7.8*200 = 1560
7.8*300 = 2457

I'm gonna try it and report back tomorrow.....

So thats the formula we use? We find the refresh rate in Everest and then just multiply that by the FSB/HTT speed to get the TREF value we should use?

[Jaco]

So thats the formula we use? We find the refresh rate in Everest and then just multiply that by the FSB/HTT speed to get the TREF value we should use?

no

lookup your HTT/Mem speed in the table. (or take a value close)

[burningrave101]

no

lookup your HTT/Mem speed in the table. (or take a value close)

I looked it up in the table and came up with the same TREF value i got calculating my refresh rate times HTT speed.

I'm running 280Mhz with OCZ PC3200 Platinum Rev2 and the refresh rate in Everest is 7.8 us so 7.8 x 280 = 2184 and the next highest TREF value from that is 2336.

I'll try it out later and see if it helps stability any. Right now i'm not stable running 1:1 at 280Mhz 1T with this stupid Venice core. My Venice will overclock to 2.8Ghz+ but its memory controller seems crappy.

[yasoumalaka]

I'll share a few of my questions and thoughts on this.

First 1.95us, 3.9us, 7.8us, 15.6us is it that if these are lower the memory will run more stable?????????

Does memory size effect this setting???????

How does command rate affect tref??????

Also I believe once you figure out the refresh time you want to run at you complete this equation [refresh time in us]/[1/fsb] and then select what ever tref is closest to that number.

[qui]

Bloody heck this formula has made all the difference, before i was only able to goto 250htt using 3072 without instant BSOD as soon as i began to stress test it, or over 2k errors on 1st pass of 5th test memtest, however switching to 2048 i am now at 260htt (priming), insidently 2048 gives exactly 7.8us. However I do find it odd how 3072 was not as stable considering it was a far more relaxed tRef??

[mad mikee]

Bloody heck this formula has made all the difference, before i was only able to goto 250htt using 3072 without instant BSOD as soon as i began to stress test it, or over 2k errors on 1st pass of 5th test memtest, however switching to 2048 i am now at 260htt (priming), insidently 2048 gives exactly 7.8us. However I do find it odd how 3072 was not as stable considering it was a far more relaxed tRef??

So if you make the time between refreshes too far apart, you risk degradation / loss of data. OTOH if 2 close together, may interfere w/ timing. Then there is teh JUST RIGHT Tref.

I am adding another thread about 'wouldn't it be nice to allow us to enter our OWN tref value based on FSB?

[Jomiy]

Well I tested my OCZ Plat Rev 2 at Tref=2336 since 305*7.8 = 2379. Seemed a tiny bit less stable than 3072. Tested at 2560 and got past 5 passes Memtest #5.

Then again my RAM seems to be clocking better since 2 days ago it needed 2.93V to do 5 passes at 300 and yesterday it only needed 2.8V...

This morning I swapped in BH-5, Everest refresh said 7.8us, set Tref= 2048 for 250Mhz (7.8*250=1950) and comp wouldn't POST!

Had to clear CMOS and take battery out