why does it have such a huge impact on the bandwidth?
what exactly does it do?
why does it have such a huge impact on the bandwidth?
what exactly does it do?
Sorry I dont have any info but I wonder this too. Is the performance hit as bad as sandra would lead one to believe? I know 1T is important but I've seen people quote quite an absurd sandra hit in the neighborhood of 800 or more mb/s.
yeah and somebody said 1t to 2t diference is almost 1K in 2k1?
1T can only be enabled on CG steppings. not really an answer to your question - I know.
AMD Phenom II 940 black edition, DFI LP DK790FXB-M2RSH @ 240 x 15.5 | 4GB OCZ Platinum CL4 | NexXxos X˛ Highflow | 2x Eheim 1048 | Enermax EG701 | 2x WD3200AAKS Raid 0 | HD4870 watercooled | Win7 64bit
:P
I thought 1T was the default on C0 steppings ? And 2T can only be enabled on CG stepping...
Lost Circuits always has a nice answer for questions like this,
http://www.lostcircuits.com/memory/ddr2/4.shtml
I only found a few hundred point difference and a 1s difference in spiOriginally posted by saaya
yeah and somebody said 1t to 2t diference is almost 1K in 2k1?
1T/2T is the same as CPC Enabled/Disabled on the DFI Infinity/Lan Party boards.
It determines how often a command can be issued to the RAM. Obviously 2T results in a big performance hit compared to 1T.
I haven't tested 3DM01, but it's only 1sec in Super_Pi for me as well...
hummm the more memory your using the bigger the performence diference the way i understood it.
how much memory are you guys using?
Hey walrusbonzo, what are your findings? I knew we were talking of the same idea as CPC on the inifinity. I know all about the hit on the infinity but Sandra had me worried it was way more important to A64 than even the pretty important CPC is on the AXP platforms. Pkrew's results are in line with what I'd expect of 2T and what I've experienced on my albeit different platform.
Are you guys with the moderate losses noticing a mega squandering of bandwidth difference in Sandra? I know what rojakpot has to say but I just care about A64 performance. I know 1T is better and some basics of why but I dont know platform specific losses.
Is it safe to say if we can't run CPC on the infinity we won't be able to again? I just always blamed it on the board a bit since I can set every latency pretty much as low as low gets. 1GB BH5.
Last edited by texuspete00; 07-01-2004 at 10:15 AM.
Its not how often the commands can be sent to the DRAM, its how many clock cycles the command (and addresses) are driven for.Originally posted by Walrusbonzo
1T/2T is the same as CPC Enabled/Disabled on the DFI Infinity/Lan Party boards.
It determines how often a command can be issued to the RAM. Obviously 2T results in a big performance hit compared to 1T.
from the AMD specs:
When this bit is set, DRAM commands and address will be driven for 2 clock cycles and qualified with an associated chip select on the second phase of the 2 clock command and address. This bit should only be set with unbuffered DIMMs. See“Register Differences in Revisions of the AMD Athlon™ 64 and AMD Opteron™ processors” on page 21 for revision information about this field.
Which bios has the option for the K8N-Pro? I'm still using the F9 bios......is there better or a bios with this adjustment?
A64 4600+ X2
DFI Ultra D 11/14/05
OCZ Plat rev 2 1g
ATI HDTV Wonder
X800XL
MCE 05
P180
On my MSI i can select 1t or 2t on a co or CG. There's about a 300 hit i've noticed.
Dont even ask where i've been!!!
I personally believe it's a rather huge hit for S754 A64's at least, Why? A64's short stage pipeline benefits a lot from low latency ram. Single channel ram is also a slight bottleneck for S754, therefore memory bandwidth AND latency are crucial to overall system performance.
How big of a hit? Depends on other system specs, like CPU clock, and the video card..
For example, if you're running a 3700+ at stock speeds, with crappy 3-3-3 timings, and an X800XT, then ram would be a MAJOR bottleneck, and there will be a big hit switchin to 2T. But, if you're running a 3200+ stock, with 2-2-2 timings, and a R98Pro, then switchin to 2T won't be that big of a hit. (I'm talking about 3D benches/games in both cases)
Last edited by HKPolice; 07-01-2004 at 04:48 PM.
Ok, so I missed off addresses. Still, what I said holds true. 1T, a command can be issued/sent in 1 clock cycle, 2T means that it takes 2 clock cycles, at least that's what I meant.Originally posted by CodeRed
Its not how often the commands can be sent to the DRAM, its how many clock cycles the command (and addresses) are driven for.
from the AMD specs:
When this bit is set, DRAM commands and address will be driven for 2 clock cycles and qualified with an associated chip select on the second phase of the 2 clock command and address. This bit should only be set with unbuffered DIMMs. See“Register Differences in Revisions of the AMD Athlon™ 64 and AMD Opteron™ processors” on page 21 for revision information about this field.
Last edited by Walrusbonzo; 07-01-2004 at 09:34 PM.
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