I have found that not many of us know what 2/3rds of our BIOS configurations options mean. I hope this thread will turn into a reference for us all. Let me add, I don't yet know what a lot of these options mean yet myself, but I will edit this thread several times a week until these mystery options are fully explained.
NOTE: I'm basing these on ASUS M3A79-T Deluxe ver.0602 BIOS options. Please confirm you have the same or similar options on your motherboard. Feel free to add your own answers or questions to these and more options in AMD AM2+ bioses.
Here are the "mystery" options that I want to explore in this first installment:
*CPU Configuration*
> ACPI SRAT Table:http://www.techarp.com/showfreebog.a...ng=0&bogno=351
> C1E Support:http://lwn.net/Articles/286432/The ACPI Static Resource Affinity Table (SRAT) stores topology information for all the processors and memory, describing the physical locations of the processors and memory in the system. It also describes what memory is hot-pluggable, and what is not.
The operating system scans the ACPI SRAT at boot time and uses the information to better allocate memory and schedule software threads for maximum performance. This BIOS feature controls whether the SRAT is made available to the operating system at boot up, or not.
When enabled, the BIOS will build the Static Resource Affinity Table (SRAT) and allow the operating system to access and use the information to optimize software thread allocation and memory usage.
When disabled, the BIOS will not build the Static Resource Affinity Table (SRAT). Alternative optimizations like Node Memory Interleaving can then be enabled.
If you are using an operating system that supports ACPI SRAT (e.g. Windows Server 2003, Windows XP SP2 with Physical Address Extensions or PAE enabled), it is recommended that you enable this BIOS feature to allow the operating system to dynamically allocate threads and memory according to the SRAT data.
Please note that you must disable Node Memory Interleave if you intend to enable this BIOS feature. Node Memory Interleave is a static optimization that cannot work in tandem with the dynamic optimizations that the operating system can perform using information from the ACPI SRAT.
If you are using an operating system that does not support ACPI SRAT (e.g. Windows 2000, Windows 98 ), it is recommended that you disable this BIOS feature, and possibly enable Node Memory Interleaving instead.
This is a power feature that is called the same thing on both Intel and AMD platforms that apparently adds a little more power savings. How you ask? I still do not fully know, but it compliments Cool 'n Quiet it seems.
> AMD Live!:http://experience.amdlive.com/us-en/Home-Page.aspx
Download and try the AMD Live Browser. It is really neat. Past that, I still don't know what the BIOS option actually does, but it may have something to do with some "Away-Mode" which is yet another mystery.
*Chipset>PCI Express Configuration*
Port Features
> Gen2 High Speed Mode:http://forums.extremeoverclocking.co....php?p=3307279
This one is simple. If you have a PCI Express 2.0 card, then ENABLE IT! It comes Disabled for compatibility reasons. Some of us may have an AUTO option that will auto detect as well. Now as other M3A79-T Deluxe owners will see, we have the ports listed from #02 to #12. The manual has these divided into two groups (2,3,11,12) and (4,5,6,7,9,10), and the latter group lacks the Link Width option.
> Link ASPM: Active State Power Management - http://www.microsoft.com/whdc/connect/pci/aspm.mspx
Apparently this has to be the same setting across all port feature groups.
> Link Width: Simply sets PCIe Speed
NB-SB Port Features
People have posted BIOS settings here:http://vip.asus.com/forum/view.aspx?...Language=en-us , http://forums.techpowerup.com/showthread.php?p=885604 , http://forums.amd.com/game/messagevi...hreadid=100542
> NB-SB Link ASPM: Active State Power Management for this link.
> NP NB-SB VC1 Traffic Support: [Enabled] (virtual channel 1) helps with Isochronous Flow-Control Mode & voice over IP. Still needs a bit more clarification.
*Chipset>Hyper Transport Configuration*
> Isochronous Flow-Control Mode:http://cpu-hypertransport.blogspot.c...echnology.html
After reading that, we may have more questions than answers. It goes to show Hyper Transport has an entire community behind it and there are neat features we almost never take the time to access.
> HT Link Tristate: Enable to tristate parts of the link in order to reduce power consumption
> UnitID Clumping: Enable to increase the number of outstanding requests supported by a single device. It may be enabled for PCI-Express GFX links in certain configurations. Clumping may be enabled when using only the lower number bridge within each PCIe GFX core.
> 2x LCLK Mode:http://vip.asus.com/forum/view.aspx?...Language=en-us
When we have the stability/performance implications of all these options figured out, we maybe we can delve into AMD memory timing configuration options. From what I've read so far, I bet there are truly ways to get more stability and performance at higher clocks out of our HyperTransport-based systems. Check out this HYPER TRANSPORT BLOG: http://cpu-hypertransport.blogspot.com/. TechARP also has their BIOS Optimization Guide that defines pretty much everything else as well: http://www.techarp.com/freebog.aspxThis is the best info I could find on the 2x LCLK Mode setting:
This setting only affects HT 3.0 so Phenom's may benefit from it while Athlon's it just does not apply to. LCLK stands for Latency Clock. The 2x means that instead of one full bandwidth HT Link you are requesting two half bandwith HT Links. For performance, at times it is better to have a two lane highway; traffic flowing in both directions at the same time along the same strip of asphalt at 50mph, than it is to have a single lane highway along the same strip of asphalt with traffic lights controling the directional flow at 100mph.
To Google I go!
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