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Thread: GTX285 various mods.. which may work for GTX260/280/295 also

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  1. #1
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    thanks


    well guys i believe this is the ovp mofo:



    pretty easy to find thanks to the isl6327 datasheet

    the 100K resistor rings all the bells to me.. what do you guys think?

    it would have to be removed and replaced with a ~50k or less or vr

    can you guys confirm? if someone confirms ill replace the damn thing in a heartbeat
    Last edited by NapalmV5; 01-31-2009 at 09:44 PM.

  2. #2
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    I know you know what you are doing, but I have to ask are you certain it is OVP triggering the shut down though? That is, if you raise vGPU during idle, does the card get a black screen and vGPU ~0v or reboot when ~1.30v+ is reached? Or is it only under load it results in black screen or shutdown? If its the second option it is most likely OCP being triggered, unless under load there is .

    I'd need to see a close up pic of the area surrounding the ISL627 chip, but from the circuit diagram it appears OVP is controlled by one pin (44), and you may very well be correct with your identification. Can you locate pin 44 and follow where the trace from that pin leads?

    To completely remove OVP it says to leave the pin open so removing the resistor completely would remove OVP. However if you wanted to increase OVP point you could add a 100K resistor in parallel giving 50K total, giving a 50% reduction in OVP signal, or you could use 100K VR in parallel and tune total resistance to allow and adjustable OVP point.

    Doing the OCP mod is harder obviously, as you'd need to do something similar to what I did with the G80 OCP/vdroop mod which was solder SMC resistor across each capacitor in each phases R/C circuit controlling Isen for each phase (linked to Isen+ & - pins for each phase).
    Last edited by CryptiK; 01-31-2009 at 10:32 PM.

  3. #3
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    pin 44 doesnt lead to anything on the front so it leads to the back.. right to that resistor.. at least how i see it


    even @ 10k/15k resistor the vcore still remains @ 1.26 and the card doesnt os boot.. i say it has to be ovp kicking in.. i dont think ocp would be active before the ovp at this voltage

    thanks for the help.. ill try that ^
    Last edited by NapalmV5; 01-31-2009 at 10:40 PM.

  4. #4
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    Ok sure, can you measure if there is continuity between pin 44 and one end of that 100K resistor? (I'm not sure if the pins are large enough to probe individually). If so, I'd go for it.

    If it won't even load OS @ 1.26v then I'd agree its probably OVP triggering shutdown. It would IMO be safer to add a 500K VR to the 100K resistor in parallel so you'd only be getting around 83K total resistance reducing the OVP signal by ~17%, so if its not the correct resistor it wont be causing a very large alteration in circuit behaviour. If this at least lets you load OS at 1.26v then you know you're on the right track, so reduce it to 50K and try again.
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  5. #5
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    i added a 100k resistor and now the cores finally getting 1.3v @ 10k but no os boot

    added 47k 22k 10k (1.32vcore) no os boot

    ill try 200k next

    edit: @ 200k added to the 100k vcore @ 1.27 @ 10k

    still no os boot
    Last edited by NapalmV5; 01-31-2009 at 11:40 PM.

  6. #6
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    Do you mean you'll now remove the existing 100K resistor and put in its place a 200K resistor?

    The minimum OVP point with a valid VID is VID + 150mv, so if EVGA have set VID to 1.20v OVP should not trigger until 1.35v minimum. However if they are adjusting vgpu above the set vid by bios or another method, while retaining the standard VID of 1.15v, that puts OVP at 1.30v like is happening.

    Since that lowering that resistors resistance is having the effect of raising the vgpu the core receives, but even adding 10K to it decreasing OVP signal by ~91% didn't allow OS boot at only 1.32v, perhaps it's worth considering removing it entirely leaving the OVP pin open? This isn't 'safe' but shouldn't cause any negative effects as pin 44 is only used for OVP. If that doesn't allow boot at any voltage, something else must be limiting it.

    That's if adding the 200K resistor doesn't work.
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  7. #7
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    yeh i was thinking the same.. removal

    im doing this on the amp 285

    havent tried it on the ssc yet

  8. #8
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    It doesn't show on the circuit diagram what OVP pin connects to. The pins that are connected to ground through a resistor is pin 11 (I out), TCOMP, OFS, FS, SS. SS is pin 43, right next to OVP.

    Sure pin 44 is connected to that 100K resistor?

    The only real way to work this out is find continuity between pin 44 and a nearby component with the DMM.
    Last edited by CryptiK; 02-01-2009 at 12:27 AM.
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  9. #9
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    i removed the 100k resistor.. 10k @ vcore: 1.27vcore still no os boot

    1.26vcore os boot
    1.27vcore no os boot

    something else in the way..

    it sure looks ovp pin goes to the back of the card to that resistor.. i could be wrong

  10. #10
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    You'll have to use DMM to find continuity between pin 44 and a nearby component.

    EDIT - perhaps altering the VID resistor arrangement is a way around this issue? See the table in the data sheet.
    Last edited by CryptiK; 02-01-2009 at 12:41 AM.
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  11. #11
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    ^ indeed.. vid resistor arrangement for higher vcore should work


    ive read more @ datasheet.. looks like ocp occurs @ 2v+

    If the voltage is higher than
    2V, ISL6327 will go into the OCP mode

    do you think vrrdy (pin 45) has also smtg to do with this?

    VR_RDY - VR_RDY indicates that the soft-start is completed
    and the output voltage is within the regulated range around
    VID setting. It is an open-drain logic output. When OCP or
    OVP occurs, VR_RDY will be pulled to low. It will also be
    pulled low if the output voltage is below the undervoltage
    threshold.
    Last edited by NapalmV5; 02-01-2009 at 01:40 AM.

  12. #12
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    check this out:

    Overvoltage Protection
    Regardless of the VR being enabled or not, the ISL6327
    overvoltage protection (OVP) circuit will be active after its
    POR. The OVP thresholds are different under different
    operation conditions. When VR is not enabled and before
    the 2nd soft-start, the OVP threshold is 1.275V. Once the
    controller detects a valid VID input, the OVP trip point will be
    changed to the VID voltage plus 175mV.
    Last edited by NapalmV5; 02-01-2009 at 01:50 AM.

  13. #13
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    VR_RDY appears to trigger the phase shutdown after OVP or OCP is triggered, so although it does have something to do with it, it's not the cause of the problem. The main issue here is the data sheet doesn't show how OVP is configured.

    As you saw, before a valid VID is read its 1.275v and after its VID + 175mv. Getting around this is not straightforward. At this stage all I can think of is VID alteration unless I can figure out how to get around the OVP sensing the actual voltage.

    However it seems that this VID + 175mv is set internally, as for example with the OCP point they explain which resistors control this, but there is no mention of how OVP is controlled with resistors or an R-C circuit.
    Last edited by CryptiK; 02-01-2009 at 02:36 AM.
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  14. #14
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    vid resistor arrangement ?



    ssc has a resistor at the spot where the amp does not

    my ssc: 1.23v
    my amp: 1.13v
    Last edited by NapalmV5; 02-09-2009 at 03:35 AM.

  15. #15
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    looks like they have to be as there are none on the front side i can see corresponding to the VID pins.

    However all those spaces are filled and I cant see any VID's that have all 1's. Unless the resistors differ in value so for ex a 30K is read as open and a 50K is read as closed.

    What do those resistors measure? Are they all the same? Just wondering where the 30-50K on your pic comes from. They may be part of a circuit that adds to the resistance so the actual resistor may be less than that.

    Also I have a non ssc model coming in a couple of days and i'd like to add a resistor in the space to raise VID to SSC level if i can confirm they are the VID resistors and confirm the value of the resistor to add there.
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  16. #16
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    dont mind the 30-50k

    thats what i used to increase vcore and vmem on the amp.. posted that @ news forum thread

    i did measure but i forgot.. let me measure again

    be right back

  17. #17
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    So what exact resistance did you use in that space on the zotac to raise vgpu & vmem? (I will do this on mine when it arrives).

    I'm just thinking if we can see a high/low resistance pattern and match it to the open/closed pattern in the VID table we could figure out which resistor is which in the VID table.
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  18. #18
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    22k produced 1.26vcore/2.17vmem


    so there are 16 spaces.. on the ssc 1/2/3/11 are occupied where 1/3/11 are occupied on the amp the rest are vacant

    on my not so great dmm all resistors are of the same value: 1ohm

    gotta get a better dmm for such finesse measuring
    Last edited by NapalmV5; 02-01-2009 at 03:31 AM.

  19. #19
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    I can't see an obvious pattern there. Nvidia have been known to put VID resistors in strange arrangements, like 1,4,2,3 left to right for example.

    Are the VID pins on the ISL6327 chip large enough to get the probe of a DMM on? If you can find which VID pins have continuity with specific resistors in that row, that should allow resistor identification.
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  20. #20
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    after more fiddling around i doubt any kind of vid resistor arrangement allows past the 1.27/1.3 limit.. they built it such.. no way around that if theres limit elsewhere

    the 100k may be the vr_rdy why it allows 1.32vcore @ 100k added

    all 3 right here are 10k which possibly have to do with the 1.3ovp


    which one.. ill look into later on tonight

  21. #21
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    tried 10k resistor at all 3.. still no os boot

    as for finding continuity my dmm is not up to the task.. will get one more appropriately

    only so much info to go by from the datasheet.. im gonna let the experts have at it

    once vcore freely gets more voltage.. clocks will take off

    in the meantime.. cryptik/if you guys have anymore ideas.. let me know


    after reading some more @ page 18-19

    ISL6327 begins the
    soft-start and ramps the output voltage to 1.1V first. After
    remaining at 1.1V for some time, ISL6327 reads the VID
    code at VID input pins. If the VID code is valid, ISL6327 will
    regulate the output to the final VID setting
    ill remove all mods and play around @ vid pins
    Last edited by NapalmV5; 02-01-2009 at 11:24 PM.

  22. #22
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    well looks like vid pins are more effective than resistor @ vcore

    after several combos.. 1.00-1.25vcore most im getting

    no resistor required just by connecting the points

    so what is the combo to 1.3 1.4 1.5vcore ?

    anyone ?
    Last edited by NapalmV5; 02-02-2009 at 01:34 AM.

  23. #23
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    The OVP and VR_RDY pins are only logic level outputs to indicate the status of the voltage regulator, and shouldn't have any effect on the OVP threshold. The OVP threshold is derived by comparing VDIFF (effectively the output voltage of the regulator) and the reference VID value from a DAC + 175mV.

    You might be able to tweek the reference voltage from the DAC by pulling the DAC pin up to a higher voltage (depending on the output impedance of the DAC), although doing this might damage the voltage regulator. If that doesn't work, the only other way to overcome OVP is to change the VID values.

  24. #24
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    I thought about that option but deemed it too risky considering the expense of these cards.

    That's why I thought the only safe option is to attempt to modify the VID value through addition/removal or resistors/bridges. However its the identification of the appropriate resistors/spaces that is the tricky part without being able to test continuity between the VID pins themselves and the resistors.
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  25. #25
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    I did the VID mod to get 1.22 vgpu, 2.13/2.14 mem. I had 1.15/1.16 vgpu and 2.11v mem stock.

    Did you figure out if bridging any of the other VID contacts raises the vgpu any more than just having 1/2/3/11 bridged?
    Last edited by CryptiK; 02-04-2009 at 06:44 AM.
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