Nehalem-EP......BLOOMFIELD

[JumpingJack]

@ anyone

I have a question about tri-channel memory. Since we all know that Nehalem will allow for 32GB/s of memory bandwidth in tri-channel mode (assuming three sticks of DDR3 1333MHz @ 10.6GB/s each), will it also be possible to run 32GB/s in dual-channel with two sticks of DDR3 2000MHz (16GB/s each)?

The reason I ask is because DDR3 2000MHz sticks are still pricey, and I was wondering if I could get two now and wait for a third down the road.

The way memory works....

Probably the easiest, though not entirely correct but conceptually relevant, way to view this is like a striped raid array. The concept is that you can improve BW by writing segments of data in parallel (divided into stripes) across the array.

Memory works similarly, if you have one stick filling one channel, each stick gives 64-bit data transfers per transaction, and because it is double data rate, it transfers the information on the rising and falling edge of the clock, so while the physical clock (as an example) of say DDR2-800 is 400 MHz, the transaction rate is effectively 800 MHz (2x the frequency for rising and falling transfers). So at 800 Mhz, 64-bit gives you 800x64/8 = 6400 MB/sec or 6.4 GB/sec.

Now add two sticks, and "stripe" them such that data can now be transfered to both sticks concurrently (again, this is not quite correct, but conceptually ok) ... effectively, the bus width is now 128-bit so the data rate is for DDR2-800 would be 800x128/8 = 12800 MB/sec or 12.8 GB/sec (this is of course theoretical).

DDR3-1333 in single, dual and triple channel modes:
single = 1333x64/8 = 10.6 GB/sec
dual = 1333x128/8 = 21.2 GB/sec
triple = 1333x192/8 = 32 GB/sec

DDR3-2000 in single, dual, and triple would be:
single = 2000x64/8 = 16.0 GB/sec
dual = 2000 x 128/8 = 32 GB/sec
tripple = 2000x192/8 = 48 GB/sec

Lengthy, verbose explanation, but yeah .... dual channel would yield a theoretical memory data bandwidth of 32 GB/sec.

Will this be optimum? Who knows, theoretical BW is not the same as actual BW ... it depends on the quality of the memory, memory controller, and there is some BW taken up if you turn on ECC protection for the extra error correction bits.

There will be loads of information available when the products actually find their way into the hands of reviewers and enthusiast ... I can't wait! It will be interesting.

Jack

[Donnie27]

The way memory works....

Probably the easiest, though not entirely correct but conceptually relevant, way to view this is like a striped raid array. The concept is that you can improve BW by writing segments of data in parallel (divided into stripes) across the array.

Memory works similarly, if you have one stick filling one channel, each stick gives 64-bit data transfers per transaction, and because it is double data rate, it transfers the information on the rising and falling edge of the clock, so while the physical clock (as an example) of say DDR2-800 is 400 MHz, the transaction rate is effectively 800 MHz (2x the frequency for rising and falling transfers). So at 800 Mhz, 64-bit gives you 800x64/8 = 6400 MB/sec or 6.4 GB/sec.

Now add two sticks, and "stripe" them such that data can now be transfered to both sticks concurrently (again, this is not quite correct, but conceptually ok) ... effectively, the bus width is now 128-bit so the data rate is for DDR2-800 would be 800x128/8 = 12800 MB/sec or 12.8 GB/sec (this is of course theoretical).

DDR3-1333 in single, dual and triple channel modes:
single = 1333x64/8 = 10.6 GB/sec
dual = 1333x128/8 = 21.2 GB/sec
triple = 1333x192/8 = 32 GB/sec

DDR3-2000 in single, dual, and triple would be:
single = 2000x64/8 = 16.0 GB/sec
dual = 2000 x 128/8 = 32 GB/sec
tripple = 2000x192/8 = 48 GB/sec

Lengthy, verbose explanation, but yeah .... dual channel would yield a theoretical memory data bandwidth of 32 GB/sec.

Will this be optimum? Who knows, theoretical BW is not the same as actual BW ... it depends on the quality of the memory, memory controller, and there is some BW taken up if you turn on ECC protection for the extra error correction bits.

There will be loads of information available when the products actually find their way into the hands of reviewers and enthusiast ... I can't wait! It will be interesting.

Jack

But wouldn't have to raise the Timings (higher latency) for two channels of DDR-2000? Wouldn't this negate some of the extra bandwidth (performance wise)?

[Shintai]

But wouldn't have to raise the Timings (higher latency) for two channels of DDR-2000? Wouldn't this negate some of the extra bandwidth (performance wise)?

The cache and prefetchers makes memory latency almost irrelevant.

[JumpingJack]

But wouldn't have to raise the Timings (higher latency) for two channels of DDR-2000? Wouldn't this negate some of the extra bandwidth (performance wise)?

Latency is a temporal feature .... where as clock is quantized.

For example, latency for DDR2-1067 C5 is lower than DDR2-800 C4 ...

4* 1/800 = 5 ns latency

5* 1/1067 = 4.68 ns latency

It depends on the memory,

DDR3-1333 C7 (which is common, though expensive) is 5.25 ns
DDR3-2000 C9 (which is also common) is 4.5 ns latency

These are per transaction, there are other latencies that bring the total up quite substantially.

Though, Shintai is correct, large caches and good prefetchers hide some of that latency overall, to the point that it is not a huge concern.

Overall, dual channel DDR3-2000 C9 will out perform DDR2-800 C4 latency wise, and C8 will be outstanding ram.

C8 of course will be the uber, uber expensive stuff: http://www.newegg.com/Product/Produc...82E16820145210

[Hornet331]

i think the sweet spot will be DDR3-1600 with CL7. It cheap (4gb is only 180€) and has a better availability than super highend DDR3-2xxx stuff.

[STaRGaZeR]

i think the sweet spot will be DDR3-1600 with CL7. It cheap (4gb is only 180€) and has a better availability than super highend DDR3-2xxx stuff.

Remember we want 12GB not 4GB

[karl_eller]

Remember we want 12GB not 4GB

I'm pretty happy with 4-8 Gb myself I just want to get my hands on one of these already.

Eller

[m^2]

Remember we want 12GB not 4GB

3 is enough for me for the next c.a. 3 years. 12??? Useless.

[STaRGaZeR]

3 is enough for me for the next c.a. 3 years. 12??? Useless.

Speak for yourself. Even if someone wants them as memory for Vista's superfetch, is justified

[Hornet331]

Remember we want 12GB not 4GB

well im planing on buying 3 kits anyways :p

plus i need a copy of vista ultimate 64bit, else its a waste.

[@@@@]

I am planning the same thing 12Gb of 6 x 2 GB

[Anemone]

So it is optimal to fill 3 slots if going for lvl 1 of performance and then filling all 6 gets lvl 2?


Said differently let's take a physical 6gb target memory.

Are you better off going 3x2gb or 6x1gb on the new mem controller?

[Linchpin]

I wonder if we'll have 3x2gb kits around launch time.

[STaRGaZeR]

What about 3x4GB kits? If they clock well...

EDIT: wait, there are no 4GB DDR3 sticks out yet, only DDR2

[Linchpin]

What about 3x4GB kits? If they clock well...

I won't object to those kits either but my wallet would.

[Donnie27]

Latency is a temporal feature .... where as clock is quantized.

For example, latency for DDR2-1067 C5 is lower than DDR2-800 C4 ...

4* 1/800 = 5 ns latency

5* 1/1067 = 4.68 ns latency

It depends on the memory,

DDR3-1333 C7 (which is common, though expensive) is 5.25 ns
DDR3-2000 C9 (which is also common) is 4.5 ns latency

These are per transaction, there are other latencies that bring the total up quite substantially.

Though, Shintai is correct, large caches and good prefetchers hide some of that latency overall, to the point that it is not a huge concern.

Overall, dual channel DDR3-2000 C9 will out perform DDR2-800 C4 latency wise, and C8 will be outstanding ram.

C8 of course will be the uber, uber expensive stuff: http://www.newegg.com/Product/Produc...82E16820145210

Thank both of you guys! So Intel downsized the total amount of Cache/s because IMC meant, no need to hide old generation GTL+ or etc...... But since all of the parts of the core and cache are asynchronous, there will be some kind of latency added back, right? At least that's been the case in the past.

I just hope ubber expensive RAM on Nehalem shows its worth. So that hasn't been the case on the old old system/s. There might be better ones, but here's one that came close to what I saw first hand.

http://www.digit-life.com/articles3/...ddr3-1333.html

DDR3-1333 gives 2% performance gain to the QX9650. However, the QX9770 gains just 1.5% in this case, despite its faster FSB.

The most likely explanation is that in case of 1333 MHz FSB (real clock rate—333 MHz) and DDR3-1333 (real clock rate—667 MHz), the memory indeed operates at 667 MHz (FSBRAM = 1:2). But in case of the 1600 MHz FSB in the QX9770 (real clock rate—400 MHz) and DDR3-1333, the FSBRAM ratio is 2:3, so the real memory clock rate is just 600 MHz (so we actually get DDR3-1200).

In its turn, the QX9650+DDR2-800 combo uses the "awkward" FSBRAM ratio of 5:6, while the QX9770+DDR2-800 combo is operating synchronously—1:1. Thus, DDR3-1333 gets a performance bonus on the 1333 MHz FSB, while DDR2-800 gets it on the 1600 MHz FSB.

I can't wait to see how Nehalem speeds up all of the out of sync features. Now before a certain person points out the obvious, I know FSB and Nehalem's IMC have almost nothing in common. So skip it! The memory controller still has to talk to RAM the same way, not matter where it is.

[Donnie27]

Remember we want 12GB not 4GB

Naw, I'll stick with 6GB! Now if I were using VT and other stuff, sure 12GB might be cool!

[@@@@]

So it is optimal to fill 3 slots if going for lvl 1 of performance and then filling all 6 gets lvl 2?


Said differently let's take a physical 6gb target memory.

Are you better off going 3x2gb or 6x1gb on the new mem controller?

Base on Intel and AMD current platforms because the people that has the x58 board and Nehalem CPU is still under NDA till the 1st or 2nd week of October I think it is the second. if you go for an overclock the less Modules you have the higher the chance of an OC

But if you look at the specification of the Nehalem base CPU
Nehalem's IMC can handle Single , Double and Triple channel memory maybe they could drop us a bread crumb as to which is optimal.

but by means of optimal what are you pertaining to?

[Movieman]

I think you guys looking for raw speed( Da benchas) will be better off with 3x1 gig sticks and leave the 3x2 gig sticks to the guys for mainstream use.
I'm just looking at the cost of 6x1 gig for the dual boards and cringing..

[OBR]

according my own Core i7 testing, is this Nehalem chip is some cases slower then Core 2 ...especially in single-tread aplications. In muti-thread programs is performance gain huge, but in some Games, software ... is Core 2 at the same frequency better ...

Nehalems advantages - great performance in memory demanding aplications (Photoshop, compressing, databases) - integrated memory controller
- excelently powerfull in multi-thread aplications ... (video encoders, benchmarks) - new prefetcher and improvements of Core
- great performance scalling with additional CPUs in servers using (like AMD Opterons have) - QPI bus and IMC

disadventages - tragical small L2 cache, slow L3 cache, clear routing to servers then desktop, huge power consuption, +/- same performance in Games, single-thread aplications, in some cases is Nehalem worst then Core 2 at the same frequency.

[bowman]

Now why would it be that? There are lots of improvements to each individual core as well.. So, fine, the pipeline is two stages longer, but still. And then there's 'Turbo' which should be nice as well.

Would be funny if it was another 'Prescott' though.

[ap4lifetn]

wow really? we just need more peeps with Core i7 to give us some more previews. one question, if the NDA is 2nd week of october, when is the release date? like a few weeks after right? which means maybe november?

i don't wanna get a yorkie/p45 after waiting this long lol, and selling off my maximums/q6600

[OBR]

Now why would it be that? There are lots of improvements to each individual core as well.. So, fine, the pipeline is two stages longer, but still. And then there's 'Turbo' which should be nice as well.

Would be funny if it was another 'Prescott' though.

Answer is a cache ... penryns have big and fast L2 cache, Nehalem have L2 fast, but very small ... thats problem because shared is slow L3 cache ... this is biggest disadvantage of Nehalem Core for common aplications

[savantu]

Answer is a cache ... penryns have big and fast L2 cache, Nehalem have L2 fast, but very small ... thats problem because shared is slow L3 cache ... this is biggest disadvantage of Nehalem Core for common aplications

That was expected.

Anyway , with Core 2 like performance in single threaded apps , healthy boost in multithreaded ones and good scaling it will be a monster.

[OBR]

Nehalem is a monster, performance in some programs are shocking ... but especially in games is Core 2 still great (and mostly better) choice ...