AMD expects Barcelona to be 40% faster than Clovertown!

[gn0s1s]

E6700 is 65W
http://processorfinder.intel.com/det...px?sSpec=SL9S7

Did you mean Q6700? (can't find offical TDP for this on intel's site yet)

I agree with your analysis of the performance K8L vs. C2D Until Intel adopts a better FSB, they will be limited to 1/2 sockets in the server arena.

Intel is adopting a better fsb, by using Nehalem architecture no? "The chip will have 8MB of shared L2 cache, simultaneous multi-threading (the ability to execute two threads per core,) support for Intel's Common System Interface, and an integrated memory controller." Just have to wait until 2008?

[Fred_Pohl]

They will NEVER be able to scale that thing so hihg right away with 45nm, which is probably because of the power comsumption. The QX6700 is at 125W TDP and uses the full wattage of it, it just sucks if you look at the power it draws (so does AMD's FX's, but they're old) if they make 45nm parts with a voltage of 1.2 or 1.15 and clock it 40% higher, that would make for another 15-20% increase in TDP. I highly doubt they would be so stupid to realease a 150W TDP product... AMD though is stating that their Q-core will have a 95W TDP which is quite nice... let's just hope they keep each other going!!!

I can't believe you mentioned C2Q and QFX in the same sentence when speaking of power consumption.



IMO it's every bit as likely that C2Q will clock 40% higher on 45nm process with 100% performance scaling as it is that Barcelona will be 40% faster than C2Q clock for clock.

BTW, where did you get 95W from? Barcelona has a TDP of 125W at some as yet undisclosed clock speed. Are you talking about AMD's 45nm quads, dual core Altairs or some lower clocked EE versions?

[red]

AMD aim to launch K8L at about 3Ghz

http://www.hkepc.com/bbs/itnews.php?tid=709944
2.5GHz is the latest number.

[Ironmon1]

http://www.hkepc.com/bbs/itnews.php?tid=709944
2.5GHz is the latest number.

don't bother trying to reason with him: He's so far lost into believing everything he hears from fanboys at AMDzone that he won't listen. For the last time, AMD talking about 40% preformance increase is worse than useless as news, because no third party has done a benchmark. AMD's idea of a demonstration is TASKMANAGER, for crying out loud! When I see an Xbitlabs review of K8L, I'll believe that. same for penryn. I hear a lot of claims about preformance from different manufactures, and so far, they are about half as reliable as the inq.
Everyone Hyped up conroe before it's launch because there were leaked benches, and AMD knows this. IMHO, since I don't beleive AMD is stupid, I think that either A) they don't have ES chips yet, which is bad news, or B) Barcelona isn't QUITE at the intel C2Q+40% mark just yet. Time will tell

[alpha0ne]

Agreed, its all hot air but I really hope there is some truth though the big question is how well will it scale ???, I very much doubt as well as C2D going by previous efforts

[lapdog]

"All of our issues in pricing were related to the server segment," CEO Hector Ruiz told investors on the earnings call. "We're making plans to adjust to that for at least the first two quarters of the year. We think that will begin to change as we introduce our new architecture in the summer."

Straight from the horse's mouth: K8L will be out this Summer. July I presume.

[alayashu]

Straight from the horse's mouth: K8L will be out this Summer. July I presume.

rumors say Barcelona will be in the streets by May (or mid April if things go well).

[informal]

Randy Allen confirms(yet again) the April-May time froame for Barcelona's arrival!

AMD (AMD) remains confident that the quad-core Barcelona chip for enterprise servers, due at the middle of this year, will deliver a 40 percent performance boost over what's available today – an advantage Intel (INTC) won't be able to match.

I had lunch on Tuesday with Randy Allen, AMD's corporate vice president for servers and workstations, and had a wide-ranging talk about the status of AMD's server business and competition with Intel. Undeterred by the disappointing financial results AMD announced that day, Allen made some bold statements about the company's upcoming quad-core server chip. Here are some key points from our conversation:

* AMD gains in 2006 chip rankings

* AMD will begin shopping the Barcelona chip around to customers in the April-June time frame (so, in about three months).
* Allen thinks Barcelona's advances in virtualization and power management (and other technologies) are so significant that to compete, Intel will have to significantly change its front side bus or micro-architecture – no simple task.
* AMD decided two years ago to pursue the current Barcelona strategy, even though it would take six months longer than other options and Intel would almost surely come to market with a quad-core product first. (Intel did, with Clovertown.) AMD believes its quad-core Barcelona design is far more efficient, and that customers will notice.
* AMD is hopeful that customers are holding off on purchasing Intel's quad-core product, released in November, based on the fact that Intel didn't say much about it in its most recent earnings call. Yesterday, however, CNET quoted a Mercury Research analyst saying Intel's Clovertown chip is already contributing a meaningful amount of business to Intel.
* Allen said Q4 2007 will be when the first real impact of Barcelona comes through in AMD's financial statements. I noted that if the chip does well, it will provide very flattering comparable sales figures to the Q4 results AMD announced this week, which were short of Wall Street's expectations.
* Barcelona will have healthy margins, Allen predicted – AMD seems confident that because it will provide such a performance advantage over Intel, price competition won't be as intense.
* While he doesn't expect customer uptake to be as quick as the shift from single- to dual-core, Allen said because AMD has made it easy for customers to drop the quad-core solution into their existing equipment, customer acceptance will be rapid and broad-based.
* Allen downplayed the significance of Intel's partnership announcement with Sun Microsystems (SUNW) on Monday. Though he admitted that AMD liked being Sun's exclusive provider of x86 chips, he said it seemed to him that the partnership was more about getting Intel to back Solaris than it was about selling a whole lot of servers. He also said this doesn't mean AMD won't still see Sun as a great customer.

My take: Chip makers are, without exception, confident about their upcoming products – so I take everything Allen said with a grain of salt. Still, Allen laid down some very specific claims and projections, particularly the 40 percent performance boost. (When I pressed him on what exactly that 40 percent includes, it was slightly less clear; he mentioned a number of metrics, including performance per watt.)

* The future of password security: no easy answers

Also, it is obviously in AMD's interest to drum up customer curiosity about Barcelona, in hopes that some will hold off on purchasing Intel's quad-core offering, and at least do an Intel/AMD bake-off later this year.

Is Allen's confidence in Barcelona warranted, or is it an attempt to spread anti-Intel FUD (fear, uncertainty and doubt)? Time will tell.

http://blogs.business2.com/utilitybe...rimming_w.html

I guess this won't be enough for some so tehy will say it is probably April-June of 2008 .Oh well...

[Tenro]

I have a very good feeling there will be plenty of K8L chips to review on the 1st of April

I agree AMD are no fools , they have to get that chip out ASAP...

[gOJDO]

The title of this thread is stupid, they said it will be UP TO 40% faster in different situations, that means <=40%, and now it is writen as it will be 40% faster in each and every app

Randy Allen,AMD's corporate vice president for server and workstation products said: "We expect across a wide variety of workloads for Barcelona to outperform Clovertown by 40 percent."
1. I can't find the "UP TO" part in Allen's statement.
2. "wide variety" doesn't mean "different situations".

so if we follow gOJDO's logic and multiply 3Ghz by 1.4 that equals to 4.2

How by my logic a 3GHz K8L will perform like a 4.2GHz C2D?

AMD better be serious about these claims!
If this is true, then Barcelona is much more advanced then AMD previosly published.

IMO AMD is only making big smoke. Sooner or latter, we'll find out

Charlie thinks that K8L vs Penryn will be a clear win for Penryn! So do I.

I agree with you. If K8L is a 3 issue core then it has no theoretical chances to perform 40% faster than Clovertown. Not even close to that number.
IMO clock for clock, K8L will perform similar like Core2. One will be marginaly faster than the other. According to the data and the logical speculations, I think that Penryn will be faster clock for clock than K8L.

Penryn will be clocked much higher than K8L and it will clearly outperform K8L CPUs on platforms with 1 or 2 CPUs.
K8L will dominate on MP platforms with 4 or more CPUs.
I think that Server is the market where AMD will place thier bets with K8L.
The desktop/workstation market will be owned by Intel.

Anyway, Allen claimed that K8L will be 40% faster than Clovertown. So, I think that I should'nt change the topic of this thread.

So, what's your problem dude? Are you blind or what?

Suddenly a lot of people start seeing into the future, so certain....

Oh, yeah, you are right.

AMD aim to launch K8L at about 3Ghz

1-24-2007, 02:52 PM

K8L is to be launched H2 2007 at about 3 Ghz, but if amd can make it earlier and with higher clocks I don't see a reason not to

Right now AMD is very capacity limited, but they will start making K8L chips in small quantities, so they can have enough chips for the launch in the late summer. As far as I know the first K8L tapeout was pretty bad due to imature process, but the second one will follow the latest rev G tapeout - so no more process problems, core problems are minimal and detected on the chips from the first tape out. The second K8L tapeout will be somewhere in january and should be production ready

K8L is supposed to be 40% faster clock for clock than K8, that makes is 20% faster than core, and also SiGe is reported to allow up to 40% improvement in transistor performance

do the math - 40% smaller process + 40% more IPC + 40% faster transistors

also keep in mind more cache, 100% faster IO and MC (HT3 and dualX128 MCs)

another thing - K8L won't have any of the bottlenecks kentsfield has

I don't think that process is that important - a single core 130nm K8 would beat 65nm single core pentium and offer similar power characteristics

11-28-2006, 06:42 AM

you could also buy a quad socket amd server and get intel 32nm chip performance

A year from now AMD will offer 3 times more cache, two times faster IO bus, and a much more efficient MC than intel could possibly design. DDR3 won't be much of a help as core arch is not that ram dependent. K8L will also support SSE4

You are missing some points, K8L will not only be 4 issue, but will double cache interface and prefetch, FPU units and SSE units also get double

c2d is also 4 issue, but features only one complex decoder

I don't know how well will K8L scale and what freqs it will hit, but I must tell you that I find SiGe quite interesting, it will surely take AMD some time to master it, but SiGe has great potential and is well known to high frequency chip makers.

11-28-2006, 08:05 AM

So if even K8L features only 3 compex decoders, which is something that is to be seen, it will still be superior to C2D when it comes to multithreading

3 complex decoders x 2 = 6
1 complex x2 and 3 simple = 5

conroe is build to perform well today, with mostly single threaded 32 bit apps

micro ops fusion is not working in 64bit mode, you know that, and that is like 10% of conroe performance

I really doubd K8L will have 1mb L2 cache, the performance gain won't be very much, ofcoruse the L3 cache will offer even less performance gain, but will apply to all 4 cores, so you could easily multiply the L3 effect by 4

This might not be very important for word and excell users, but K8L is a server design and amd have really serious intentions when it comes to server market.

Having in mind core arch is 20% better in desktop and 0% better in server apps clock for clock, I would say K8L will wipe the floor with anything intel can offer even in late 2008.

Desktop however is a different story, today it may seem K8L will be having hard times agains intel offerings might be true for todays apps, but you forget some major faktor:

Vista is out - that means a true 64bit OS for the masses, some of the serious apps are already supporting 64bit processing, the others will come soon after vista.

K8L is future proof, conroe is built for today, by the time K8L is out we will enjoy nex gen apps - multi threaded and 64bit. If intel really intend to release a dumb shrink I think this time next year they might have worries when it comes to desktops, and be where they ware with pentium based xeons against K8 (40% behind in perforormance)


EDIT: Amd says up to 4 double precision flops per cycle - is this possible with only 3 complex decoders?

11-29-2006, 12:54 AM

And what about the "independent dual channel MC" that K8L is going to feature. I don't know what does this mean, but I have the feeling that K8L armed with 4 ram sticks is going to run in quad chan mode - 256bit mem interface

this would give it about 14-16 GB/sec, much more than the 5-6Gb/sek intel can offer

11-28-2006, 05:42 AM

[Anemone]

Ok same thing applies to AMD that we applied to Intel when they were wildly claiming huge performance increases with Conroe in late 2005.

Show us. If you have something to show, show it. "Scheduled" launch dates can change. Both teams do that, but AMD is practically known for announcing on the month of delivery "won't be out for 1-2 quarters more". So I have doubts on the delivery date, not extreme ones because they know they need this chip but doubts because they apparently don't even have samples yet.

So much like Conroe at IDF, show us what you've got. Otherwise the PR stuff doesn't really do much except start discussions like this one...

[Nedjo]

Where can i find reliable information that 45nm Quad Core Xeon will work @ 4.2 GHz?

[gOJDO]

That was the info from AMD we had some time ago

I would love to see that info from AMD. Would you like to post a link, please?

You mean kentsfield has no bottleneck?

I think that you don't know if K8L will have or will not have any bottlenecks.
I would like to learn something more about the Kentsfield bottlenecks. It seems that you are understanding the the "bottleneck" problems very well. Would you be so kind and enlight me about them, please.
So far, I found this article online:

Intel zipped up the FSB speed for the Core 2 Quadro to 333 MHz compared with the 266 MHz for Core 2 Duo. Our test results reveal that a FSB1333 (true 333 MHz) does not entail advantages - at least not based on the tests at a CPU clock speed of 2.66 GHz.

Core 2 micro-architecture offers a few features to ease the strain on memory access, whereby higher FSB or memory speeds barely register any speed advantages.

http://www.tomshardware.com/2006/09/...age/page4.html

When the first tapeout is not good you make a second.

A second tapeout?

In electronics, tape-out is the name of the final stage of the design of an integrated circuit such as a microprocessor, the point at which the description of a circuit is sent for manufacture. A modern IC has to go through a long and complex design process before it is ready for tape-out. Many of the steps along the way utilize software tools collectively known as electronic design automation. Tape-out is usually a cause for celebration by everyone who worked on the project, followed by eager anticipation of an actual product returning from the manufacturing facility.

http://en.wikipedia.org/wiki/Tapeout

http://www.princeton.edu/~wolf/moder...9-1/sld011.htm

Tapeout is a sequence of multiple steps. It indicates when the database that contains the design information is sent to begin the preparation of masks. Masks can be thought of as a template that is used in the semiconductor manufacturing process. Previous the database was a paper tape, which today has been replaced by an electronic carrier.

http://www.theregister.co.uk/1999/07/14/what_the_hell/

When Do You Tapeout? (Motorola criteria)

- 40 billion random cycles without finding a bug
- Directed tests in verification plan are completed
- Source code and/or functional coverage goals are met
- Diminishing bug rate is observed
- A certain date on the calendar is reached

http://www.cerc.utexas.edu/~jaa/talk...7/index-8.html

[gOJDO]

links
http://www.theinquirer.net/default.aspx?article=36003
http://www.hkepc.com/bbs/itnews.php?...me=0&endtime=0 - same site we got the 2.5 Ghz info
http://techreport.com/onearticle.x/10937
http://en.wikipedia.org/wiki/AMD_K8L
http://www.answers.com/topic/amd-k8l

Need some more?

Sorry, but in your links there is no info from AMD!

K8L is to be launched H2 2007 at about 3 Ghz, but if amd can make it earlier and with higher clocks I don't see a reason not to

That was the info from AMD we had some time ago

About the tapeout.. dunno...

After the tapeout and the production of the first A0 chips, debug folows. In the debug phase, eventual "bugs" are being removed and the integrated circuits are being improved and optimised in more steps(known as stepping). Also, the microcode is usually upgraded(known as Revision).
New tapeout is needed when major architectural changes are going to be made or when transiting to another process node.
K8L was taped out in August and was being debuged. The first "demonstration" was in December with A2 stepping. When the debugging is finished, then the Rev. B1 will be ready for mass producing.
New tapeout requires months, and another few months for the debugging, before it can be mass produced for end users.

[gOJDO]

And where do you suppose theese sites fot their info from - ME?

None of the links, you've provided is quoting AMD statements. Considering the_INQ as source of information is ridiculous! I'll not waste time, looking after their missleading false articles about ReverseHyperThreading in K8, quadcore K8, 65nm K8 available in august, K8L to come in 2006, etc.

Sometimes bugs in the chip cannot be removed only by optimising the process. That when you make a new tapeout, new mask.

You are talking no sence. Just chechk-out the quotes and the links I've provided about tape-out. Pay attention on the tasks, that have to be done before a tape-out.

Can you post a link about production ready B1 silicone?

No, I can't. Rev. A is for ES testing purposes only. Rev. B or higher is for mass production and will go on the market.

[biohead]

you guys are tiresome, seriously.

[uOpt]

* While he doesn't expect customer uptake to be as quick as the shift from single- to dual-core, Allen said because AMD has made it easy for customers to drop the quad-core solution into their existing equipment, customer acceptance will be rapid and broad-based.

Oh yeah?

Such as into my 940 and 939 systems?

[uOpt]

I can't believe you mentioned C2Q and QFX in the same sentence when speaking of power consumption.



IMO it's every bit as likely that C2Q will clock 40% higher on 45nm process with 100% performance scaling as it is that Barcelona will be 40% faster than C2Q clock for clock.

That chart is unfair. There is indication that the FX-7x power consumption is actually caused by the chipset on the 4x4 boards, not the CPU itself. Then you wouldn't experience it with the same CPUs in other platforms.

[Fred_Pohl]

Randy Allen confirms(yet again) the April-May time froame for Barcelona's arrival!


"AMD will begin shopping the Barcelona chip around to customers in the April-June time frame (so, in about three months)."


I guess this won't be enough for some so tehy will say it is probably April-June of 2008 .Oh well...

Sounds like the first Barcelona ES chips will finally arrive in April-June. How much longer does it usually take to make enough chips for a hard launch?

Or do you think that AMD will skip the ES "shopping" phase and go straight into volume production?

[Fred_Pohl]

That chart is unfair. There is indication that the FX-7x power consumption is actually caused by the chipset on the 4x4 boards, not the CPU itself. Then you wouldn't experience it with the same CPUs in other platforms.

You would be partially correct if those were system power measurements, but they are not. Those power consumption figures were obtained by isolating the CPU(s) from the rest of the system (including the chipset). As numerous other reviews have already confirmed, an FX74 system draws ~500W with a single <100W vidcard idling compared to ~275W for a QX6700 under the same conditions.

http://www.lostcircuits.com/cpu/amd_quadfx/4.shtml

Power Measurements

Looking at system power consumption is interesting to a certain degree, however, for all practical purposes we are more interested in the isolated CPU power consumption. To estimate the latter, we used the same power measurement setup as in previous reports. Briefly, we used a Fluke 80i-410 AC/DC current probe in combination with a Wavetek Meterman 30XR multimeter to measure current through the isolated +12V supply lines feeding into the CPU VRM. To increase granularity of the measurements, we ran the supply lines in a triple loop through the clamp. The clamp itself was calibrated using a BK Precision model 1692, 30V 40 A DC power supply. Since there is a temperature dependency of the probe, we monitored the zero-current offset at the beginning of each measurement as well as at the end of each run. If the values drifted we retook the measurements. Despite these precautions there are possible deviations of the read-out from the real current, however, these errors mostly affect the lower (processor idle) measurements. We estimate that the errors should not be more than 10% at the lower end of the data and less than 5% in the mid and higher data range. Moreover, since the same procedures were applied to all processors tested, there may be an offset in the absolute numbers, however, the relation of the individual cores to each other with respect to power consumption should be fairly accurate. The extremely high power consumption of the CPU at full load causes a voltage droop by approximately 500 mV on the 12V output, the calculations are corrected accordingly.

In addition to the method outlined above, we used a modified PSU to run the 12V line directly through the Wavetek Meterman and read out the current. Both methods gave identical results.

Lostcircuits CPU power measurements appear to be very consistent too when you look at FX60, FX62, E6700 and QX6700. FX60 consumes 81W, FX62 consumes 100W and 2x FX74 consumes 266W under XP32. Scaling linearly from FX60 to FX62 we should expect a single FX74 to consume a minimum of 119W x 2 = 238W. However, since we all know that 3Ghz is very close to the limit for K8, we should expect to see power consumption rise exponentially with clock speed when approaching the core's limits. E6700 consumes 54W so logically QX6700 should consume a minimum of 108W and we all know that 2.66GHz is not even close to the limits of 65nm C2Q. It's hardly a perfect testing methodology but I've yet to see any better.

[metro.cl]

Barcelona cant be this good.

Cities names = mainstream (normal cpus)

Star names = especial CPUs (high end)


expect stunning new from me in minutes

[informal]

Sounds like the first Barcelona ES chips will finally arrive in April-June. How much longer does it usually take to make enough chips for a hard launch?

Or do you think that AMD will skip the ES "shopping" phase and go straight into volume production?

Tsk,tsk,tsk

Those are the final production revisions,NOT ES!
What do you think,that Sun will get quad core ES Barcelona in April and make an uber expensive supercomputer with a bunch of ES chips.You gotta be kidding...

April-June,final shipments of the so called RevB (final production rev.).
ES are probably wandering around in the wild as we speak.But we all know AMD,and this time the NDA curtain reached it's highest peak.Not surprising at all ,if we consider the fact that this chip is the basis for the next 2-3 years of AMD product lineup.

[uOpt]

Thanks, Fred_Pohl, I'm glad to see somebody isolated the CPU to verify whether they cause the trouble or not.

I am very sad to see that AMD was willing to sacrifice even the biggest advantage they had over Netburst for this silly 4x4 platform

[informal]

Barcelona cant be this good.

Cities names = mainstream (normal cpus)

Star names = especial CPUs (high end)


expect stunning new from me in minutes

Sorry to burst your bubble,but Barcelona was not named after a city,but after a formula 1 race circuits

So is Budapest and Shangai .

SO if we follow the logics about the F1 and what it means(uber fast speed cars ),Barcelona can be that fast .And more probably .

[vitaminc]

its appearant that loe doesn't understand much engineering.

after a0 silicon comes back, you will have chances to de/activate some of the dfm redundancies to save your silicon and do some minor adjustments in the stepping.

another tape out would be called revB and so on.

april-june shipments will be a joke. more like sampling. i dont expect k8l to enter volume production for desktops before september. amd doesnt even have enough 65nm capacity yet to support both server and desktops.

exiting 2007, amd should still sell more 90nm am2 chips than 65nm am2 and 65nm k8l combined.