K8l to have 6mb cache

[Shadowmage]

uh, if you double the number of cores, the IPC should also double, aight?

and if you are talking about K8 vs K8L cores, 40% IPC improvement is not unreasonable but still pretty far fetched.

When doing 2 threads at a time, IPC of the ENTIRE thing would double. AMD's referring to single thread performance, in which the number of cores does not matter (only makes things worse). Increasing the number of cores LOWERS IPC in single-threaded situations due to bus contention, cache coherency misses, etc.

Plus, OoO loads itself adds 40% performance in some extremely limited situations (from Intel tech docs).

[kl0012]

So if even K8L features only 3 compex decoders, which is something that is to be seen, it will still be superior to C2D when it comes to multithreading

3 complex decoders x 2 = 6
1 complex x2 and 3 simple = 5

Your calculation is useless, because only 4 uop can be handled by the next stage of the pipeline (3 uops for K8 and probably for K8L). Core dosn't realy need more compex decoders, because most instructions can be handled by simple decoders. For example in Core SSE instructions are translated in one uop, whereas in K8 it needs 2 uops (because of 64-bit execution units).

EDIT: Amd says up to 4 double precision flops per cycle - is this possible with only 3 complex decoders?

They means for two vector SSE2 instruction which can execute two 64-bit multiplications and two 64-bit additions in the same cycle. Core already can do it.

[kl0012]

Apropos, what about anti-HT? Is it still not out yet?

[Cooper]

Closed