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Thread: A64Info - New CPU ID and memory tweaking tool! - feedback welcome...

  1. #276
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    Then I truly appologise

  2. #277
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    Quote Originally Posted by 3MAJ
    Then I truly appologise
    No problem, why should I have anything against people who helped me?

  3. #278
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    Can make this program compatible with my MOBO (DFI UT CFX3200-DR), thx
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    Damm sweet proggy you made there. Thanks for sharing.
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  5. #280
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    Quote Originally Posted by Counter CS
    Can make this program compatible with my MOBO (DFI UT CFX3200-DR), thx
    Did you try? This program should work with Athlon 64, X2, Opetron, Sempron CPU-s. It has nothing to do with chipset (unles we are speaking about clock change, only nF4 support is planned).

  6. #281
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    bug ?

    this is a damn good program, i like it better than a64tweaker !!

    I spent the last few days again digging in the depths of A64 dram control registers..and this helped me a lot.

    Although...i think i found a bug (or a misunderstanding).

    When i clock down the multi (with rmclock, Cool'n'Quiet etc.), say my default is 11x and i clock down to 4xHTT...then A64info says that i have a mem-divider on and also says my memory speed is down to 183.

    I do not have a mem-divider on (running 1:1) and my memspeed is the same as HTT, 230mhz. I double/triple checked with many other tools.

    eg. clockgen says right my MULTI is down to 4x, but HTT stays and also reports my memspeed still as 230.

    Also..it is not known to me that rmclock (or CnQ) would switch on a divider and reduce memspeed.

    *********

    additional stuff:

    So..going thru the AMD bios/kernel white papers (i love them)...i see that certain registers are not even implemented in winchester (eg. Dram data strenght- they just came with revision E)

    Its right i can not set them with A64info, but it would be nice if those would be grayed out so you see which ones are available for what CPU revision.
    Just a thought.

    thanks, nice program !
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  7. #282
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    Quote Originally Posted by flexy

    Although...i think i found a bug (or a misunderstanding).

    When i clock down the multi (with rmclock, Cool'n'Quiet etc.), say my default is 11x and i clock down to 4xHTT...then A64info says that i have a mem-divider on and also says my memory speed is down to 183.

    I get it. Take a look at this post:

    http://www.xtremesystems.org/forums/...62&postcount=7

    Smallest possible memory divider is 5, According to Oskar Wu. So, your CPU is running at 4 x 230 = 920MHz. Memclk is 200MHz, and memory divider should be 4, but 4 is less than 5, so divider is 5. Memory speed is 920 / 5 = 184 MHz. Of course , this is theory. A64Info is calculating memory speed with respect to HTT, Multi, Memclk, ODC using known rules. It would be nice if A64 had some register which contains actual divider, but AFAIK there isn't one.

    Quote Originally Posted by flexy

    So..going thru the AMD bios/kernel white papers (i love them)...i see that certain registers are not even implemented in winchester (eg. Dram data strenght- they just came with revision E)

    Its right i can not set them with A64info, but it would be nice if those would be grayed out so you see which ones are available for what CPU revision.
    Just a thought.
    You are 100% percent right. Since A64Info is still under development, I'm focusing on the most importaint things. Polishing will be done later, I still have to add nf4 support, multiplier change and other stuff. I think this specific parameters have no effect on older cores. I tried on my Winchester to set 233 memlck ( which is E rev specific) and it just ignored settings. I guess it is the same story with other parameters. Please, try to set them, see if values change.

  8. #283
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    Quote Originally Posted by lukija
    I still have to add nf4 support, multiplier change and other stuff.
    Great news, with A64info + nF4clock + multiplier change & if voltage change as CrystalCPUID did but all the way up to 1.6v. Why we boot into bios then. Looking forward to see your new version. Great job lukija.

  9. #284
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    Quote Originally Posted by lukija
    I get it. Take a look at this post:

    http://www.xtremesystems.org/forums/...62&postcount=7

    Smallest possible memory divider is 5, According to Oskar Wu. So, your CPU is running at 4 x 230 = 920MHz. Memclk is 200MHz, and memory divider should be 4, but 4 is less than 5, so divider is 5. Memory speed is 920 / 5 = 184 MHz. Of course , this is theory. A64Info is calculating memory speed with respect to HTT, Multi, Memclk, ODC
    hi
    What i want to say is....i SHOULD still have my original "divider" which i have in bios...1:1, MEMCLK=200, HTT=230

    When i use rightmark rmclock it can set multi to anything from 4x to 11x depending on load under XP, clocking the CPU up or down...but i dont THINK it would activate a divider. But A64info says i have a divider set (which i did not) and also the "real" memspeed should still be 230. (memclk=200 in bios, ok I think that you with A64info read the multi and calculate and show the theoretical calculated divider/memspeed...but in reality its just not set.

    I still have to double-check and ask the author of rmclock...or check some white papers..but i really dont KNOW whether A64 sets the real memspeed always depending on multi or only ONCE in bios.
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  10. #285
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    Quote Originally Posted by lukija
    You are 100% percent right. Since A64Info is still under development, I'm focusing on the most importaint things. Polishing will be done later, I still have to add nf4 support, multiplier change and other stuff. I think this specific parameters have no effect on older cores. I tried on my Winchester to set 233 memlck ( which is E rev specific) and it just ignored settings. I guess it is the same story with other parameters. Please, try to set them, see if values change.
    its very interesting..because also bios-developers and even oscar probably dont know everything. Right now i INLYgo after the AMD bios/kernel white papers.

    Fro example: In dfi lanparty bios there was ALWAYS a setting for DRM drive strength eg. Level 1 - 7 and people said there are SEVERAL levels of "weak"...eg. level 1, level 3, level 5 would all be different....and also the dram data strength you could set even LONG before Winchester Rev E.

    In reality (see A64 registers) there seems to be only ONE bit for "Dram drive strength" (Weak or normal)....and data drive strength is only there since Rev E. I was messing around with those settings for months to get my system stable....with settings which did not even exist but you could change in bios
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  11. #286
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    [QUOTE=lukija]It would be nice if A64 had some register which contains actual divider, but AFAIK there isn't one.

    Is there a register (or some other good way) to read the actual/real memory speed ?
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  12. #287
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    Quote Originally Posted by flexy
    hi
    What i want to say is....i SHOULD still have my original "divider" which i have in bios...1:1, MEMCLK=200, HTT=230

    When i use rightmark rmclock it can set multi to anything from 4x to 11x depending on load under XP, clocking the CPU up or down...but i dont THINK it would activate a divider. But A64info says i have a divider set (which i did not) and also the "real" memspeed should still be 230. (memclk=200 in bios, ok I think that you with A64info read the multi and calculate and show the theoretical calculated divider/memspeed...but in reality its just not set.
    Please send me a screenshot of CPU and DRAM tab. I tried on my rig 4x multi and memclk=200, A64Info reported memory divider as 5 , also CPU-Z reported the same.
    Attached Thumbnails Attached Thumbnails Click image for larger version. 

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    Last edited by lukija; 06-25-2006 at 03:57 PM.
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  13. #288
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    Quote Originally Posted by flexy
    Is there a register (or some other good way) to read the actual/real memory speed ?
    I was asking the same.
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  14. #289
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    Quote Originally Posted by flexy
    its very interesting..because also bios-developers and even oscar probably dont know everything. Right now i INLYgo after the AMD bios/kernel white papers.
    Well, AMD does not mention:

    - 180/150/140/120 memclk dividers (217/233/250 also!)
    - half multis
    - 20 missing tref values (only 12 are documented)

    I'm trying to take the best from all sides and compile it. Same goes for core detection - my opteron is JH9-E6. Ok, I know about E6, and I know for JH, but whut is 9 standing for?
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  15. #290
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    not showing everything correctly here.......still a great lil proggy though.

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  16. #291
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    Quote Originally Posted by flexy
    its very interesting..because also bios-developers and even oscar probably dont know everything. Right now i INLYgo after the AMD bios/kernel white papers.

    Fro example: In dfi lanparty bios there was ALWAYS a setting for DRM drive strength eg. Level 1 - 7 and people said there are SEVERAL levels of "weak"...eg. level 1, level 3, level 5 would all be different....and also the dram data strength you could set even LONG before Winchester Rev E.

    In reality (see A64 registers) there seems to be only ONE bit for "Dram drive strength" (Weak or normal)....and data drive strength is only there since Rev E. I was messing around with those settings for months to get my system stable....with settings which did not even exist but you could change in bios

    IIRC the different drive strengths on DFI mobos is a result of the mobo itself and not the cpu. Something to do with the way Oscar laid out the circuitry for the ram slots...

  17. #292
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    Quote Originally Posted by ludeboy12
    not showing everything correctly here.......still a great lil proggy though.
    Sorry, no AM2 support yet. I can add core regonition but DRAM settings are a way different.
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  18. #293
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    http://i53.photobucket.com/albums/g7...123/Image4.jpg

    Oh...interesting.

    I am coming along posts where people talk about a "a64 divider bug"...means if multi is at 4x the A64 automatically forces a 5:4 divider on the ram !

    Now, the new cpuz also says my mem is running at 183.

    Have to look into this
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  19. #294
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    Please read post #282.

    http://www.xtremesystems.org/forums/...&postcount=282

    Look at your picture again. Divider (memclk) is not set at 183, that is why I asked you to send me a picture of memory settings. Memclk is set at 200, but it doesnt mean thar memory divider equals cpu multiplier! Try to use half multi for example 10.5 and see what happens. Also, choose odd CPU multi (11) and set Odd divisor correct and see what happens.

    Bottom line: memlck = 200 doesn't mean always 1:1 ratio. Use builtin calculator and experiment with ODC and half multis.
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  20. #295
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    Quote Originally Posted by lukija
    Fixed (I hope). Please re-download again.


    @GenTarkin

    If you can look in Sandra for something like PCI to ISA bridge, you will find something like VEN_10DE and DEV_00XX. A need that DEV_00XX info, because I do not have nF3 mobo. You wil find it under Buses and Devices section, it should be under Bus 0.
    Not sure if you were given this information yet, but I would also appreciate nF3 mobo support. I have located the PCI to PCI Bridge under PCI Bus 0. There is no PCI to ISA bridge that I can see. There is a CPU to ISA bridge, but I don't think that's what you want. Anyway, just see the attached screenshot for the information you want. I have an MSI Neo2 Platinum (NF3 Ultra). Thanks for your efforts. Hopefully you can add support for the unfortunate few still using such old hardware. I swear it was top of the line 2 years ago.
    Attached Thumbnails Attached Thumbnails Click image for larger version. 

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  21. #296
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    Raptor One, please contact me via PM.
    Last edited by lukija; 06-28-2006 at 08:14 AM.
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    Any news about the new version, with integrated NF4 clock support?

  23. #298
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    In a few days, currently I'm adding multi/voltage adjustment.
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  24. #299
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    Quote Originally Posted by lukija
    In a few days, currently I'm adding multi/voltage adjustment.
    Awsome!

    After that, please make a more "screenshot"-friendly design

  25. #300
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    Quote Originally Posted by jrw
    Awsome!

    After that, please make a more "screenshot"-friendly design

    Of course. Since driver allows only one instance of program, this is a must. I'm planning to make one info tab, and one settings tab. Info tab should be screenshot friendly. But after I finish this "technology demonstrator" version. Next thing is AM2 support, hope AMD will release some PDFs.
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