Yeah Anandtech says the following, "Historical data has shown that dual-core CPUs (in particular 45nm dual-cores) often clock to higher FSB levels when the GTL reference values are closer to
63%-64% of VTT while quad-core CPUs usually need the full strenth value or even alittle more voltage (
67%-70% of VTT)". So for example if you were running a VTT value of
1.20v (we'll assume this is the measured VTT value) the GTL value for
67% would be,
1.20v x 67%(0.67) = 0.804v(804mV) To get this GTL value just set BIOS from "Auto" to "Default". (I could be wrong here, although I fully understand the information below its the "default" setting that confuses me)?
Now if you wanted to increase your GTL value to
70% (one of the value that Anandtech mentions for 45nm quad-core CPUs) you would do the following,
70%(0.70) - 67%(0.67) = 0.03, we then multiply this value by
1000 to convert the value into mV (
0.30 x 1000 = 30mv). Since we are increasing the GTL value from
67% to 70% we would set the BIOS GTL value to
+30mv.
Another example (just to show how the math would be done) would be lowering the GTL value from the default of
67% to 63% (one of the values Anandtech mentions for 45nm dual-core CPUs) you would do the following,
67%(0.67) - 63%(0.63) = 0.04, we then multiple this value by
1000 to convert the value into mV (
0.40 x 1000 = 40mV). Since we are lowering the GTL value from the default value of
67% down to 63% we would set the BIOS GTL value to
-40mV.
Below is a quick breakdown of each GTL settings in BIOS and what it controls,
Each die receives two GTL reference votlages (quad-core = 2 dual-cores)
CPU GTL_REF0 Ratio: For Core 0/1 Data Bus (Runs at full FSB transfer rate)
CPU GTL_REF1 Ratio: For Core 2-3 Data Bus (Runs at full FSB transfer rate)
CPU GTL_REF2 Ratio: For Core 0/1 Address Bus (Half of FSB transfer rate)
CPU GTL_REF3 Ratio: For Core 2/3 Address Bus (Half of FSB transfer rate)
*Note: Both
CPU GTL_REF2 Ratio and
CPU GTL_REF3 have no effect of dual-core processors.
*Note: As a rule, adjustments are normally made to FSB Data Bus values first. These lines are constantly heavily loaded and as such are more susceptible to the effecs of reduced signaling margins
*Note: Because there are only a handful of specific GTL values in BIOS you may need to slightly adjust your VTT up or down to get closer to one of these specific offset values.
Almost all of the information above came from Anandtech Striker II Extreme motherboard review
HERE.
Please correct me ASAP if any of the information above is incorrect or misleading. Most of it was copied from Anandtech's article but not all of it was word or word.
