RD890/SB800 - Hydra Engine + independant clocks per core?
I didn't dare put this in news, as it's just my inferences...It brings some stuff to the forefront though that I think others may have been curious about.
First of all, I found myself in the device ID database, in ATI's device ID's. There you will see some interesting registries for RD890 that are not included in RD790.
Quote:
Originally Posted by PCI Device Registry
5a10 RD890 Northbridge only dual slot (2x16) PCI-e GFX Hydra part
5a11 RD890 Northbridge only single slot PCI-e GFX Hydra part
5a12 RD890 Northbridge only dual slot (2x8) PCI-e GFX Hydra part
http://pci-ids.ucw.cz/read/PC/1002
That's curious, isn't it? I wonder if RD890 will go the route of X58rev2 with a Lucid chip on-board with the ability to use it in single (ie 4870x2), 2x16, and 4x8 mode?
UPDATE: Read the Lucid Hydra .PDF and look at scenario 1.
I think it's safe to say RD8xx will have the option to have 2 card (4-gpu) MGPU SUPPORT MIXED AND MATCHED FROM ANY VENDOR. Hydra is an option or standard.
Then, as I was thinking about my curiosities about what the heck the optional "integrated clock generator" that's supposedly so great about SB800. We hear it gets better clocks from misc sources. WTF does that mean?
Well, the World Patent office says that AMD filed a patent for such 'techniques' on 11/27/08, a month ago...Curious.
It says on the front explaination:
Quote:
Originally Posted by WIPO
A clock generator (622) includes a first circuit (812) and a second circuit (814). The first circuit (812) includes a first clock input configured to receive a first clock signal at a first frequency, a second clock input configured to receive a second clock signal at the first frequency, and an output. The second clock signal is out-of-phase with the first clock signal. The second circuit (814) is coupled to the first circuit (812) and includes a mode signal input configured to receive a mode signal. The output of the first circuit (812) is configured to provide a generated clock signal whose effective frequency is based on the first and second clock signals and the mode signal.
and includes this pic:
http://www.wipo.int/pctdb/images/PCT...gz_en.x4-b.jpg
dug a little deeper and read this in the detailed description:
Quote:
Originally Posted by AMD clock gen description
According to various embodiments of the present disclosure, a programmable clock generator is described herein that provides a generated clock signal having a relatively wide frequency range. The clock generator is configured to facilitate a frequency change in the generated clock signal (responsive to a mode signal) without requiring modification of a frequency of a clock signal (e.g., quadrature clock signals) provided by a phase locked loop (PLL) associated with the clock generator. The clock generator technique is particularly advantageous when employed in modern microprocessor systems that employ multiple clock domains, each of which may operate at a different frequency and may frequently change frequency in response to, for example, a power management state change. In this case, multiple clock generators (e.g., one for each clock domain) may be employed to facilitate independent and frequent change in operating frequencies of the clock domains.
I don't know about you, but that sound/looks like four different clocks meeting to create one signal by the CPU. Yes, It can be used to regulate power/heat surely ala CNQ, but I can't help but believe also independently controlled via Overdrive. Sure as heck also sounds like one of those cores could also very-well be a GPU core in the future by the way it's phrased (remember this clock generator tech being important for FUSION?). I can't help but wonder if this is also the cure for when you have a great cpu, but are held back on stability by, let's say, one core, or heat is limiting the clock so you could downclock another core. Dynamic clock vs threading management perhaps also in the user's hands?
Today's phrase is "quadrature clock signals".
Even if is just my mind wandering aimlessly on a Monday night, it certainly makes me more curious about AMD's coming AM3 platform. I'm going to keep trying to wrap my head around it, you can check it out here:
Here Be Dragons
SYNOPSIS: You can clock each core seperately to achieve whatever your goal is (heat/power/high clockspeed on less cores/)
Of course, I could always be waaaay off.
