Yes it does.
hey guys im havin some problem trying to get my Q6600 stable here.
does this cpu really require more then 1.45 for it to be stable 400x9?
no it doesnt mine with cpu vid 1.2850 i do it stable with 1.432
Got my X38 up and running real COOL like :cool: ... just now really getting into this mobo and so far I like what I see ... this is my test bench and I just put a little ole AMD 60mm fan on NB heatsink and a 70mm aluminum on the backplate heatsink so that the air blows through and over the RAM :cool: temps are WAY LOW ... :p: (notice window open and temp outside right now is -10F;) )
http://img206.imageshack.us/img206/6...mfandg8.th.jpghttp://img204.imageshack.us/img204/2...empsex3.th.jpg
As you can see I am just starting out on my overclock adventure, but hope to achieve some decent/stable OCs so that I can do some gaming in the near future ... :D
nice :) wait till you boost up those voltages on the chipset, you'll wish you had an 80mm (once you close the window that is)
be sure your cpu vtt is 1.6 in bios and set the the GTL ref to 110/109 for the cpu cores, use these charts to find the gtl for your NB: http://www.edgeofstability.com/artic...fault_gtl.html
so the vtt needs to be that high even for a 400x9 setup and not a 450x8?
figured since its less fsb i can run it with less vtt voltage
AKHandyman, what is that heatpipe used for, coming out from under the mb, on the right side of the photo?
I like your cooling system(window open with a foot of snow):p:
Ha ... I have another nicer fan on the way, but this 'll do until then, and Sniipe, what do you recommend I start out with on the volts for my E6850? I was hoping there was a BIOs template for this board w/E6850 ... I've done some easy OC'ing, but this BIOS does have a lot more than I am used to ... :p:
I just can't get anything over 400x9 stable. Not even OCCT stable. Here are my current settings for 400x9 which is both OCCT and Prime stable:
I've tried 412x9 for 3.7GHz, but it always fails. I've upped all the voltages and still I can't get it stable. :(Code:Thermal Management Control Disabled
PPM (EIST) Mode Disabled
Limit CPUID MaxVal Disabled
CIE Function Disabled
Execute Disable Bit Disabled
Virtualization Technology Disabled
Core Multi-Processing Enabled
Exist Setup Shutdown Mode 2
CLOCK VC0 divider AUTO
CPU Clock Ratio 9x
Target CPU Clock 3600MHz
CPU Clock 400FSB
Boot Up Clock AUTO
DRAM Speed 266MHz/667MHz
Target DRAM Speed DDR2-1000MHz
PCIE Clock 100MHz
Voltage Settings
CPU VID Control 1.425v
CPU VID Special Add AUTO
DRAM Voltage Control 2.05v
SB Core/CPU PLL Voltage 1.640v
NB Core Voltage 1.479v
CPU VTT Voltage 1.530v
VCore Droop Control Disabled
Clockgen Voltage Control 3.45v
GTL+ Buffers Strength Strong
Host Slew Rate Weak
GTL REF Voltage Control Enabled
x CPU GTL1/3 REF Volt 106
x CPU GTL 0/2 REF Volt 106
x North Bridge GTL REF Volt 107
DRAM Timing
Enhance Data transmitting FAST
Enhance Addressing FAST
T2 Dispatch Disabled
Channel 1 CLK Crossing Setting More Aggressive
Channel 2 CLK Crossing Setting More Aggressive
CH1CH2 Common CLK Crossing Setting More Aggressive
CAS Latency Time (tCL) 5
RAS# to CAS# Delay (tRCD) 5
RAS# Precharge (tRP) 5
Precharge Delay (tRAS) 12
All Precharge to Act AUTO
REF to ACT Delay (tRFC) AUTO
Performance Level 7
Read delay phase adjust SEE BELOW
MCH ODT Latency AUTO
Write to PRE Delay (tWR) AUTO
Rank Write to Read (tWTR) AUTO
ACT to ACT Delay (tRRD) AUTO
Read to Write Delay (tRDWR) AUTO
Ranks Write to Write (tWRWR) AUTO
Ranks Read to Read (tRDRD) AUTO
Ranks Write to Read (tWRRD) AUTO
Read CAS# Precharge (tRTP) AUTO
ALL PRE to Refresh AUTO
PCIE Slot Config 1X 1X
CPU Spread Spectrum Disabled
PCIE Spread Spectrum Disabled
SATA Spread Spectrum Disabled
read delay phase adjust press enter
Channel 1 Phase 0 Pull-In AUTO
Channel 1 Phase 1 Pull-In AUTO
Channel 1 Phase 2 Pull-In AUTO
Channel 1 Phase 3 Pull-In AUTO
Channel 1 Phase 4 Pull-In AUTO
Channel 2 Phase 0 Pull-In AUTO
Channel 2 Phase 1 Pull-In AUTO
Channel 2 Phase 2 Pull-In AUTO
Channel 2 Phase 3 Pull-In AUTO
Channel 2 Phase 4 Pull-In AUTO
I'll have 3DMark scores for the HD2900Pro at these settings later.
That is the backplate that comes with the Thermalright IFX-14 ... it is actually sandwiched between the back of the mobo and the backplate bracket under where the CPU sits ... I guess it helps cool the CPU as well ... so far I haven't seen any temps on either core go over 50C (I am actually doing prime right now with a tweak to find some stable voltage for the NB ... :) )
What brand of RAM are you using? You know, I had a similar problem with my DFI Inf 975 board where I couldn't go past 400x9 without a good prime run making it crash ... I just kind of let it go as it is my everyday 24/7 rig, but this baby I want to really mess with and see what I can do ... :D
you are fustrating yourself over WHAT!?...being OCCT or P95 stable!...if you are not folding or playing heavy cpu demanding games, you are wasting electrical energy and time...it proves nothing to me...use the wPrime bench...if you hack that you are fairly stable....if anything happens after proving wPrime is valid then it is a memory timing issue.
stable is an elusive word...each of us have different definitions!...i say stable is: what ever you do and your OS doesn't freeze; get BSOD; programs close out on their own; random reboots or games drop back to your desktop.
dose the default fsb changer actually work on this board, ide be interested in just getting a higher default clock and working from there, like taking an e6850 and bumping it from 333-400 default and then getting started
and is there any way to lock the strap on the board or could that default fsb limit them
Well, after tweaking a bit with some of the voltages, and running a bit of Prime95 for a few hours, I think I have at least a good starting point ... thanks guys ... hope to post a few screenies of solid/stable work ... :D
here is a bios template for e6850
i'm sure volts can be reduced but that for later
can do either do 1000mhz or 1200mhz 5-5-5-15
cant go higher than 500fsb need more time n new bios
glCode:Thermal Management Control Disabled
PPM (EIST) Mode Disabled
Limit CPUID MaxVal Disabled
CIE Function Disabled
Execute Disable Bit Disabled
Virtualization Technology Disabled
Core Multi-Processing Enabled
Exist Setup Shutdown Mode 2
CLOCK VC0 divider AUTO
CPU Clock Ratio 8x
Target CPU Clock 4000MHz
CPU Clock 500FSB
Boot Up Clock AUTO
DRAM Speed 333MHz/667MHz
Target DRAM Speed DDR2-1000MHz
PCIE Clock 100MHz
Voltage Settings
CPU VID Control 1.531v
CPU VID Special Add AUTO
DRAM Voltage Control 2.3v less dependin on memory
SB Core/CPU PLL Voltage 2.0v
NB Core Voltage 1.6v
CPU VTT Voltage 1.5360v
VCore Droop Control Disabled
Clockgen Voltage Control 3.45v
GTL+ Buffers Strength Strong
Host Slew Rate Weak
GTL REF Voltage Control Enabled
x CPU GTL1/3 REF Volt 105
x CPU GTL 0/2 REF Volt 105
x North Bridge GTL REF Volt 111
DRAM Timing
Enhance Data transmitting FAST
Enhance Addressing FAST
T2 Dispatch Disabled
Channel 1 CLK Crossing Setting More Aggressive
Channel 2 CLK Crossing Setting More Aggressive
CH1CH2 Common CLK Crossing Setting More Aggressive
CAS Latency Time (tCL) 4
RAS# to CAS# Delay (tRCD) 4
RAS# Precharge (tRP) 4
Precharge Delay (tRAS) 12
All Precharge to Act AUTO
REF to ACT Delay (tRFC) AUTO
Performance Level 8
Read delay phase adjust SEE BELOW
MCH ODT Latency AUTO
Write to PRE Delay (tWR) AUTO
Rank Write to Read (tWTR) AUTO
ACT to ACT Delay (tRRD) AUTO
Read to Write Delay (tRDWR) AUTO
Ranks Write to Write (tWRWR) AUTO
Ranks Read to Read (tRDRD) AUTO
Ranks Write to Read (tWRRD) AUTO
Read CAS# Precharge (tRTP) AUTO
ALL PRE to Refresh AUTO
PCIE Slot Config 1X 1X
CPU Spread Spectrum Disabled
PCIE Spread Spectrum Disabled
SATA Spread Spectrum Disabled
read delay phase adjust press enter
Channel 1 Phase 0 Pull-In AUTO
Channel 1 Phase 1 Pull-In AUTO
Channel 1 Phase 2 Pull-In AUTO
Channel 1 Phase 3 Pull-In AUTO
Channel 1 Phase 4 Pull-In AUTO
Channel 2 Phase 0 Pull-In AUTO
Channel 2 Phase 1 Pull-In AUTO
Channel 2 Phase 2 Pull-In AUTO
Channel 2 Phase 3 Pull-In AUTO
Channel 2 Phase 4 Pull-In AUTO
when i get more time more tweakin to come:D
Here is my first memory bench ... not too bad for a beginner ... but I know I have a long way to go before I can become an Xtreme Overclocker ... :p:
http://img178.imageshack.us/img178/8...enchsq1.th.jpg
Hello zsamz, maybe the problem can be found in the gtl settings. I leave it on "disabled".
I was trying two type of config: one with the vcore at 1.42 that I use for 425*8, and another with the vcore at 1.47 for the 450*8.
At this point I don't know how to set the memory strap because everytime i move it the mobo doesn't start on the next boot... even if i try a 267*9 with 200\800 (as example).
By the way, can you give me some trick about the NB e SB voltages? What is the maximum vcore that I can give to them? Are they involved with my faulty boot?
Thank you for your help! :)
Mmmh, so what can I do? Maybe I can try first with the settings reported zsamz?
Bye e thank you! :)
God bless you zsamz_
The system boot correctly.
I've tried first a clearcmos by moving the jp12 jumper as it's explained on the manual,
then I tried your first config. (cpu vid 1.41)
selecting strap dram to 266/667
and as i said some words ago the system boot correctly not giving me anymore the long constantly beep (dram error) on the post.
Now I'm gonna do some work on the vid to see if I can be stable by lowering them. Then I move on to reach some fsb good frequencies.
Thank you alot zsamz_, your help has been critical to solve my problem. :bows: :rocker:
Have a nice day! :)
I found the last 3 Phase pull-in settings on each channel don't do much at all for memory performance or latencies when enabled. Only the first 2 phase pull-ins can alter performance. Maybe because my subtimings are already tight ??
Read delay phases all AUTO
http://fileshosts.com/intel/DFI/DFI_...ndwidth_tn.png
http://fileshosts.com/intel/DFI/DFI_...3m15s406ms.png
Read delay phases
- last 3 Phase pull-in settings enabled
- 1st and 2nd Phase pull-in settings AUTO
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png
http://fileshosts.com/intel/DFI/DFI_...3m15s953ms.png
eva, when I tested on P35, the most heavy effects were on FAST-FAST and the 3 MORE Aggressive settings on DRAM TImings.
the delay phases just had a small impact and morever a more serious impact on stabilty...i'll check again on X38 ...
I'm thinking maybe a bug? At least with the BIOS version I currently have loaded. This is what I've noticed with MemSet. With PL and all phase delays set on auto and the correct configuration the BIOS will set the following. All phases of one channel to 4 and all phases except one or two to 4 on the other channel with the remaining set to 5. Memset will show a PL of 4 for one channel and 5 for the other which means the PL is being set to 5.
However, if i manually configure these settings Memset will show 5 for both channels as if the manually set phases are being ignored. I haven't tries leaving PL set to auto and manually setting the phases yet.
thanks looking forward to your results :)
with 11/28 and PL = 5 set, read delay phase adjust when set to AUTO all = 5 for both channels and memset 3.4 final shows PL = 5. When last 3 phase pull-ins enabled they show 4 instead of 5 for each.
Praz, only 2 bios available 11/28 and 12/18 right ?
I am currently running with 11/28 as bios has been shipped....any reason to change to newer ?
:)
Ah yes .. i always use the X in reference to Quad-Core when i post as oppose to the Dual-Core when i post, some ppl think Q6850 means dual-core, but infact it is a Quad-Core so i use QX to mean 100% quad-core when i am posting.
Yes i know there will be no Extreme lower Yorks made.
Well not quite true there about not being P95 or Orthos prime stable as it must be stable for at least 12-24hrs.
I have builds run P95 for say 10 hours and fail... i say ok fuk it i will run it... and yeppers... bam games froze up, and even at times when surfing the net the damn thing would freeze up and running 3dmark 06 PASSED with flying colors.....and so did 3dmark 05... but 3dmark 03 Locked her up.
Well the thing was .... the CPU needed more voltage just a :banana::banana::banana::banana: hair more and then i ran prime 95 for 18hrs before i decided she was good enough.... guess what i am still running strong on that build... the one i am using now... :)
I have had many ppl in the past :banana::banana::banana::banana::banana: about P95 not being stable, well guys all i can say is if it can't do at least 12-24hrs... basically 12-18hrs stable.. then it is no good in my book for 100% stability.
Now if your just a surfer on the net and play the odd game.... GAWD why bother overclocking at all.... ???
Ace is just trying to help you not kill your hardware. I run Prime as much or more then most do testing these boards. Just a few observations. Even passing Prime for 24 hours is no guarantee that some other program will not have stability issues. But more importantly, is what Prime does. Nothing in the consumer market loads the cores as much as Prime with the exception of something like a folding program. None of these boards from any manufacturer are designed to be constantly hammered like this. Believe it or not they will die.
This a reason why quadcores are so difficult to get Prime stable for an extended period of time. The components are being stressed beyond their design parameters. The longer all four cores stay loaded at 100% the more heat there is generated. Ignore what software temperatures are. It's localized hot spots affecting both the board and components. This heat causes electron migration which results in degraded and/or failed components.
We are trying to prove stability with a program that was originally used for that purpose when components didn't even require active cooling to operate. Constantly beating on today's hardware with Prime is similar to running your car motor at 10,000 rpm for several hours to prove to yourself that it's worthy of the 100 mile trip you're getting ready to make.
In the end it's a choice the user has to make. But from experience, repeated, extended runs of Prime will do nothing for the longevity of hardware.
No doubt running any program for long instances 24/7 full load will sooner or later damage componets this includes running any Folding program for years and years and years.. heck even months on end will limit the life somewhat of componets.
I am just stating run prime 95 or orthos prime (is what i run) on the Stress CPU and Ram setting which is the default setting for Orthos for at least 12-18hours anyone i know who has done so including myself have never had any issues after that.
Yes sure any program or game can have issues, but that does not always mean it is a OC issue as even CRYSIS is buggy for me and many others cause it is a GAME issue. The problem is when a NEWBIE has such issues they automaticlaly assume it is a hardware issue or a overclocking issue.
I only had one game that had a OC issue after priming for 18hrs and that was HL2 cause of Valve and their stupid update to the steam program at that time about 1-2 years ago frigged it up for so many who were OCing their PC's, but Valve fixed that issue in a hurry cause of the Violent posts in their forums and across the internet about this OC throttling they made happen.
So i say run prime 95 in which the latest version allows for 2-4 cores run without running 2 or 4 instances of the program to prime all 4 cores.
Orthos on the other hand you will need to run 2 instances of it in order to run all 4 cores 100%, that is for now until a updated version comes out, but may i remind people it was Orthos who came out with a Dual prime program NOT Prime 95 makers and it only took 4 years for prime 95 makers to come out with a new release that supported 2-4 cores right out of the Box sort of speak.
Orthos prime is PRIME 95 coding, but the developer made a GUI for it is all and then updated it to run 2 cores at a time when dual-cores came out, but he has been lazy ... :) in not updating it to run 4 cores out of the Box sort of speak.... sooner or later i am sure he will.
Now if you have a weak componet in your build.. example a weak PSU or Video card then priming is not for you, neiter is OCing or even running a Folding program.. cause all you will be doing is hindering those weak componets to fail even faster.
Weak meaning.... examples a $65.00 500w PSU or a X1300 video card or a $90.00 low-end motherboard, but you have a Q6600 and 2GB's of memory.... don't prime that thing as your going to hurt your weak componets in which if they get damaged during the process they can/could take something else out with it.
I was just wondering if the instant e-mail notification is working ... I have subscribed to this thread, but I never received any notices about the additional posts when I accessed my email this morning ... :( Anyone know? I've checked all my settings and everything seems to be in order ... :)
I've never received email notification from day 1. Think it's broke.
Its probably like other sites (broke on purpose) to get you to come back here everyday for another Bonus in google page rankings.... :)
So, I read mention of a new bios, from Dec 18th?
No .Bin.file for this board yet hey?
Well, found the bios on the DFI website and flashed. One thing it solved, on the negative side, is that my Areca 1210 card will no longer work in the 2nd pci-e 16X slot, under any circumstances. I can get it to boot once in awhile, but only at 1X. Before, on the 11/28 bios, as long as I had both floppy power connectors unplugged, it would work at 8X. Now, with both unplugged, it only works at 1X. So, I benchmarked the card in 4X and 8X and found absolutely no difference in performance, so it really doesn't matter. I stuck it back into the top 4X slot and all is well (with both floppy connectord plugged in).
DFI's website guys go there for bios, don't be so lazy.. :)
Heres the link to the Bios page for this mobo.
http://us.dfi.com.tw/Support/Downloa...FLAG=A&SITE=US
Major Reasons of Change:
Improve Graphic Cards compatibility issue
The reason I asked, before heading over to the website, is that usually there are posts about it's release, feedback and a link on the first page. There was none of this yet, so I thought it might be a "private" release of sorts.
Notifications work fine for me although sometimes they stop & you have to unsubscribe & re-subscribe to the effected threads.
CN :)
Anybody that would Like to get a Extra Pre Programmed Bios Chip for the D.F.I LanParty LT X38 to have in case of Bios Corruption or Bios Flash gone wrong the doors are now open for Orders:up: Hurry up they move FAST:sonic: & I only have 15 left:)
How much and where and how i/we can get one if need to be?
My 2-cents...I have had systems with high OCs that pass all of the available benchmarks including all 3D benchmarks and P95 for 24 hours. Load up UT2004 and play, system locks up within 10 minutes, or less. Bump vcore a smidge and all is well. I will no longer go for ridiculous P95 times. I will run all 3D benchmarks first to get a clue on what the OC will be then run prime on small ffts for about an hour. If it passes then it is off to the most stressful game I can get my hands on. I guess I should go out and get crysis or the new UT for testing.
Bios Chip sales you must talk in PM please they have busted my balls once already:D because I had it advertising in my siggy new rules coming down on forum lately:)
SHAWN,
have you tried putting the areca card in slot 1 and your VC in slot 2?...i did that with the original bios without any aux. 5/12v power and it worked just great..8x bandwidth for the areca card and 16x for the VC...posted and booted fine and i was able to access the areca bios during post regimen.
have you tried the above with the newest bios?
i found the areca card will get higher burst speed at 8x bandwidth over the 4x slot.
anyone has tried such settings ?
FSB=400
333/1066 (5:8) that means DDR2-1280
200/667 (3:5) that means DDR2-1333
?
my mobo hangs up with this settings on C1 and whistle...:D:D
@ ACE......Hows you're ARECA Raid Controller working in this motherboard please:)
esau can test xfire in the 16x adn 4x slot i was thinking of getting an areca and wanted to see numbers with pci-e2 and a pci-e1 4x
PCI-E 2.0 does not do much in terms of performance because the cards can't utilize the Bandwidth headroom right now not the way they will in up coming GFX Cards releases:D
You'll get about 800mb Burst in X4
I did that with the original bios as well, it worked. I have not tried with the newest bios, however, so I couldn't tell you if it still works or not. Maybe if I am bored later tonight I'll try it out.
I have tested with it in 4X and compared the results with the results from *x and there was no change at all. I plan on adding the 4th Raptor this weekend, so I will bench it in 4X and see what happens. If what Brother Esau says is true, which I believe it is, and I can see up to 800mb burst speed in 4X, then I don't honestly think 8X will be any better than 4X for the 4 Raptors I will be running. Who knows, though, I try it out and let you know. Thanks for the info guys!
Code:CPU Feature Page
Thermal Management Control................Enabled
PPM (EIST) Mode...........................Enabled
Limit CPUID MaxVal........................Disabled
CIE Function..............................Auto
Execute Disable Bit.......................Enabled
Virtualization Technology.................Enabled
Core Multi-Processing.....................Enabled
Main BIOS Page
Exist Setup Shutdown......................Mode 2
Shutdown After AC Loss....................Disabled
O. C. Fail Retry Counter..................0
CLOCK VC0 Divider.........................Auto
CPU Clock Ratio...........................10x
CPU Clock.................................266 MHz
Boot Up Clock.............................Auto
DRAM Speed................................Auto
PCIE Clock................................100MHz
PCIE Slot Config..........................1X 1X
CPU Spread Spectrum.......................Disabled
PCIE Spread Spectrum......................Disabled
SATA Spread Spectrum......................Disabled
Voltage Setting Page
CPU VID Control...........................Auto
CPU VID Special Add.......................Auto
DRAM Voltage Control......................1.904V
SB Core/CPU PLL Voltage...................1.510V
NB Core Voltage...........................1.265V
CPU VTT Voltage...........................1.211V
VCore Droop Control.......................Enabled
Clockgen Voltage Control..................3.45V
GTL+ Buffers Strength.....................Strong
Host Slew Rate............................Weak
GTL REF Voltage Control...................Disabled
CPU GTL1/3 REF Volt.......................110
CPU GTL 0/2 REF Volt......................110
North Bridge GTL REF Volt ................110
DRAM Timing Page
Enhance Data Transmitting.................Auto
Enhance Addressing........................Auto
T2 Dispatch...............................Auto
Clock Setting Fine Delay..................Listed Below
CAS Latency Time (tCL)....................Auto
RAS# to CAS# Delay (tRCD).................Auto
RAS# Precharge (tRP)......................Auto
Precharge Delay (tRAS)....................Auto
All Precharge to Act......................Auto
REF to ACT Delay (tRFC)...................Auto
Performance Level.........................Auto
Read Delay Phase Adjust...................Listed Below
MCH ODT Latency...........................Auto
Write to PRE Delay (tWR)..................Auto
Rank Write to Read (tWTR).................Auto
ACT to ACT Delay (tRRD)...................Auto
Read to Write Delay (tRDWR)...............Auto
Ranks Write to Write (tWRWR)..............Auto
Ranks Read to Read (tRDRD)................Auto
Ranks Write to Read (tWRRD)...............Auto
Read CAS# Precharge (tRTP)................Auto
ALL PRE to Refresh........................Auto
Read Delay Phase Adjust Page
Channel 1 Phase 0 Pull-In.................Auto
Channel 1 Phase 1 Pull-In.................Auto
Channel 1 Phase 2 Pull-In.................Auto
Channel 1 Phase 3 Pull-In.................Auto
Channel 1 Phase 4 Pull-In.................Auto
Channel 2 Phase 0 Pull-In.................Auto
Channel 2 Phase 1 Pull-In.................Auto
Channel 2 Phase 2 Pull-In.................Auto
Channel 2 Phase 3 Pull-In.................Auto
Channel 2 Phase 4 Pull-In.................Auto
Clock Setting Fine Delay Page
Ch1 Clock Crossing Setting................Auto
DIMM 1 Clock fine delay...................Current[14]
DIMM 2 Clock fine delay...................Current[5]
DIMM 1 Control fine delay.................Current[9]
DIMM 2 Control fine delay.................Current[7]
Ch 1 Command fine delay...................Current[9]
Ch2 Clock Crossing Setting................Auto
DIMM 3 Clock fine delay...................Current[13]
DIMM 4 Clock fine delay...................Current[3]
DIMM 3 Control fine delay.................Current[2]
DIMM 4 Control fine delay.................Current[4]
Ch 2 Command fine delay...................Current[10]
Ch1Ch2 CommonClock Setting................Auto
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
Clock Fine Delay At Work
Still very early into my testing of how memory behave on DFI LP LT X38-T2R with 11/28 bios. It basically seems like a more matured version of what is implemented on DFI LP UT P35-T2R :)
Playing with 2:3 divider (266/800) and 2x 1GB Crucial Ballistix PC2-8500, I found myself hitting memory clock wall at several points while doing my routine Memtest86+ v1.70 testing.
Only salvation to break through that memory clock wall was fine tuning Clock Fine Delay values for DIMM 1 & 3. To my surprise I broke through that 651Mhz wall and ended up at 666Mhz 5-5-5-9 at 2.49v being single Super Pi 32M stable!
- 633mhz 5-5-5-9 at 2.27v was okay
- 640mhz 5-5-5-9 at 2.31v was okay
- 651mhz 5-5-5-9 regardless of vdimm used kept freezing in test #5 loop testing - clock fine delay was all set to Current.
- 651mhz 5-5-5-9 at 2.38v errored out in memtest, but elimated freezing by increasing dimm 1 + 3 clock fine delay values from Current (2) to manually set 3.
- 660mhz 5-5-5-9 at 2.45v was okay in memtest now by further increasing dimm 1 + 3 clock fine delay values from manually set 3 to 5.
- 666mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, no voltage adjustments helped.
- 666mhz 5-5-5-9 at 2.49v was okay when i further increased dimm 1 + 3 clock fine delay values from manually set 5 to 6 or 7.
- 670mhz 5-5-5-9 at 2.49v would error out in test #5 loop on 2nd pass with a few errors everytime, voltage adjustments didn't help much to stablise it. Dimm 1 + 3 clock fine delay values manually set at 7 helped reduce it to a few errors in memtest86+ v1.70 test #5 loop.
So here's where I end up at so far 666Mhz 5-5-5-9 at 2.49v! Pretty awesome for initially having hit a brick wall at 651Mhz 5-5-5-9!
http://fileshosts.com/intel/DFI/DFI_...cpuz_valid.png
http://fileshosts.com/intel/DFI/DFI_...3m20s110ms.png
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png
DFI LP LT X38-T2R Bios Settings
Quote:
PC Health Status
Adjust CPU Temp: +7C
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 8x
- Target CPU Clock: 3552
CPU Clock: 444
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1335
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Voltage Settings
CPU VID Control: 1.2875
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.49
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.643
CPU VTT Voltage: 1.377
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- T2 Dispatch: Enabled
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 7 (manually increased from 2 allowed me to pass 651Mhz mem clock wall in memtest86+ v1.70)
- DIMM 2 Clock fine delay: Current 7
- Ch 1 Command fine delay: Current 11
- Ch 1 Control fine delay: Current 8
Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 7 (manually increased from 2 allowed me to pass 651Mhz mem clock wall in memtest86+ v1.70)
- DIMM 4 Clock fine delay: Current 6
- Ch 2 Command fine delay: Current 11
- Ch 2 Control fine delay: Current 6
Ch1Ch2 CommonClock Setting: More Aggressive
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)
CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance LVL (Read Delay) (tRD): 6
Read delay phase adjust: Enter
Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Auto
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto
Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 14
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: 4
So how is this board compared to the P35 , or it is to early to make any conclusions?
I have 2 questions ... EVA ... how did you get the Everest beta version1227? I have the 1226 version, yet I can't find the one you have ...:confused:
Two, does anyone know why in the BIOS under Advanced Chipset Features > PCI-E compliancy mode ... it shows the version to be 1.0a ? I thought it was supposed to be 2.0 ... anyone notice this? :confused:
EVA - re your post #562 ... you say you did that with Crucial Ballistix PC2 8500, yet your CPU-Z shows OCZ PC2 6400 ... I have 4GB OCZ PC2 6400 and a E6850 ... if I use those settings, I should see something very similar to yours, right?
So its working then/ whats the Burst rate that you are getting?
hey BRO...does DFI boards have a serious problem with a lot of bios chips dying on flash???
How about this thread gets back on topic.
Not that I am aware of ACE but sheet happens you know? I just had a Flash go bad on me not long ago my Floppy drive threw a rod in the middle of the Flash and it was Good Night Irene:D
Sometimes too the Flash doesn't go right for what ever reason even if what you did was flawless thats happened to me a couple of times the Past year maybe bad chips who the hell knows:shrug:
But the Point is that its better to spend a couple of bucks on insurance so you don't get caught with you're pants down as RMA for Board takes 10-14 days vs a few minutes to plop a new chip in.........:D
just a Q and a quick answer wanted. would you guys that had the P35 LP recommend selling and getting this board or is it not worth it yet?
I am liking what I see so far, but I am far from being an expert, but right now I have it purring along pretty good ... it's been stable for most of going 4 hours at (9 x 423 MHz)= 3.8 GHz. Memory is stable as well ... I know this board has a lot more in it and I am learning as I go along ... and having some fun ... :up:
http://img529.imageshack.us/img529/7...at38sd2.th.jpg
From everest support forums :) No idea on PCI-E version mode
re-read screenie no OCZ listed in 666mhz 5-5-5-9 screenie. As to settings they might differ as no set of memory modules or board NB memory controller are exactly the same. Really folks shouldn't focus on the resulting end settings but the process itself that is involved in getting to them :)
for benching only.. for everyday it's easy to drop NB volts needed by loosening your memory sub timings and additional tight tweaks i.e. clock crossing and clockcommon settings drop down from More Aggressive
The CPU-Z validation page you used shows at the bottom left hand side in slot 1 and slot 2 OCZ Technology ... that is what I was referencing ... but what you're saying is that the 666MHz 5-5-5-9 is from the Ballistix RAM, right? I was just trying to clarify what RAM did what ... that's all :shrug:
Anybody running the New Cards in Cross Fire yet?
ooooh you have some cards don't you Eva:)
Thanks George;) I can appreciate that:up:
Again clock fine delay and controller fine delay tweaking allowed me to stabilize my 2x 1GB Crucial Ballistix PC2-8500 @585Mhz 4-4-4-5 PL 5 at 2.51v.
- 540mhz 4-4-4-5 at 2.23v = okay
- 550mhz 4-4-4-5 at 2.31v = okay
- 565mhz 4-4-4-5 at 2.38v = okay
- 575mhz 4-4-4-5 at 2.45v = okay
- 580mhz 4-4-4-5 at 2.47v = okay
- 585mhz 4-4-4-5 at 2.49v = 4 errors in 1st pass of test #5 memtest86+ v1.70 loop
- 585mhz 4-4-4-5 at 2.51v = okay (manually set clock fine delay from current 3 to 4 and control fine delay for DIMM 1 + 3 changed from current 10 to manually set 11)
http://fileshosts.com/intel/DFI/DFI_...cpuz_valid.png
Single 32M
http://fileshosts.com/intel/DFI/DFI_...3m29s875ms.png
Dual 32M
http://fileshosts.com/intel/DFI/DFI_...2m_halfway.png
http://fileshosts.com/intel/DFI/DFI_...dual32m_tn.png
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png
DFI LP LT X38-T2R Bios Settings
Quote:
PC Health Status
Adjust CPU Temp: +7C
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 9x
- Target CPU Clock: 3512
CPU Clock: 390
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1172
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Voltage Settings
CPU VID Control: 1.2875
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.51
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.555
CPU VTT Voltage: 1.377
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- T2 Dispatch: Enabled
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 4 (manually increased from 3)
- DIMM 2 Clock fine delay: 6 (manually set from current 6)
- Ch 1 Command fine delay: 11 (manually increased from current 10)
- Ch 1 Control fine delay: 7 (manually set from current 7)
Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 4 (manually increased from 3)
- DIMM 4 Clock fine delay: 6 (manually set from current 6)
- Ch 2 Command fine delay: 11 (manually increased from current 10)
- Ch 2 Control fine delay: 5 (manually set from current 5)
Ch1Ch2 CommonClock Setting: More Aggressive
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)
CAS Latency Time (tCL): 4
RAS# to CAS# Delay (tRCD): 4
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 5
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance LVL (Read Delay) (tRD): 5
Read delay phase adjust: Enter
Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Auto
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto
Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 14
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: 4
Someone with this board + Enermax Liberty ? I`m curious if this incompatible was resolved .. Thanks.
Don't know about the Liberty but the Galaxy appears to have issues.
http://csd.dficlub.org/forum/showthread.php?t=5005
Well i have 4 psu s now, but i want to put the liberty in the case with this board or with a p35 one, but the p35 have issues with liberty, and i dont know yet about this :(.
Op1000 and zeus1200 wont fit in my case :D.
Praz, yes i know about p35 and liberty, but maybe was resolved with this board..
I`m curious if that adapter will resolve this problem, would be nice :).
OP850 or OCZ 1KW ProXStream both will fit in a case :)
so i have been unsucessful priming my cpu for more then 10mins
Do the Q6600 G0's need that much voltages or am i doing something wrong?
FSB = 400
Multi = 9
Vcore = 1.48
VVT = 1.6
NB = 1.5
SB = 1.74
GTL set according to the link provided to be a few pages back
That GTL Reference link is just that, a reference. Board to board variations may result in the settings being off 5 or so points in either direction. Also the tables show the values needed for a 67% setting. Most quad-cores, when being overclocked, prefer a setting closer to 70%.
Response from enermax :
:(Quote:
Im afraid there is no solution. The adapter is for the Galaxy series only.
There is no fix that we can apply to this PSU that will fix this issue as it is related to DFI’s motherboard.
The only choice you have is to change PSU or Motherboard L
Ah that suxs then.. new case for Xmas ? :D
Clock Fine Delay At Work Continued....
Swapped out one set of 2x 1GB Crucial Ballistix PC2-8500 for another set of 2x 1GB Crucial Ballistix PC2-8500 since I'm re-testing all my memory on DFI LP LT X38-T2R to find the best matched pair for this board :)
Seems similar process to gain stability occurs with this set too - meaning fine tuning clock fine delay DIMM 1 + 3 as well as controller clock fine delay allows this memory to fly as high if not slightly better than the first set I tested.
- 633mhz 5-5-5-9 at 2.27v was okay (with lower NB 1.566v volts)
- 640mhz 5-5-5-9 at 2.27v was okay (with lower NB 1.566v volts)
- 651mhz 5-5-5-9 at 2.31v Froze at 88% 1st pass of test #5 loop (with lower NB 1.566v volts)
- 651mhz 5-5-5-9 at 2.31v was okay now by increasing dimm 1 + 3 clock fine delay values from Current (2) to manually set 3. (with lower NB 1.566v volts)
- 660mhz 5-5-5-9 at 2.42v was okay - dimm 1 + 3 clock fine delay values still manually set to 3. (with lower NB 1.566v volts)
- 666mhz 5-5-5-9 at 2.47v would error out in test #5 loop - went to check bios clock fine delays that are set automatically (Current values) and they all automatically shifted down from the values that were stable at 660mhz 5-5-5-9 at 2.42v). So applied same theory I discovered with DFI LP UT P35-T2R, I manually adjusted the remaining Current auto values @666Mhz to the ones matching @660Mhz 5-5-5-9 stable clocks except the Dimm 1+ 3 clock fine delays which manually set to 6.
- 666mhz 5-5-5-9 at 2.47v with clock fine delay values of 6-6-10-7 / 6-6-10-5 for each channel respectively allowed me to loop Memtest86+ v1.70 test #5 for 10 passes before 2 errors occured. Still not quite there but better than before. NB volts still at 1.566v
- 666mhz 5-5-5-9 at 2.49v was okay with NB still 1.566v
- 669mhz 5-5-5-9 at 2.47v with NB raised from 1.566v to 1.617v and manually set clock fine delay values to 6-6-10-7 / 6-6-10-5. Ended up with 3 errors after the 4th pass of memtest86+ v1.70 test #5 looping.
- 669mhz 5-5-5-9 at 2.49v with NB = 1.617v. Decided to try manually setting clock fine delay values to match 1st set of memory's 666Mhz 5-5-5-9 32M stable settings which are 7-7-11-8 / 7-6-11-6. Resulted in 4 errors after 2nd pass of test #5 looping.
- 669mhz 5-5-5-9 at 2.51v with NB = 1.630v and CPU VTT = 1.387V raised from 1.377v. Clock fine delay set at 6-6-10-7 / 6-6-10-5.
http://fileshosts.com/intel/DFI/DFI_...cpuz_valid.png
http://fileshosts.com/intel/DFI/DFI_...3m16s157ms.png
http://fileshosts.com/intel/DFI/DFI_..._bandwidth.png
DFI LP LT X38-T2R Bios Settings
Quote:
PC Health Status
Adjust CPU Temp: +7C
CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 8x
- Target CPU Clock: 3571
CPU Clock: 446
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1341
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Voltage Settings
CPU VID Control: 1.2875
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.51
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.630
CPU VTT Voltage: 1.387
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110
DRAM Timing
- Enhance Data transmitting: FAST
- Enhance Addressing: FAST
- T2 Dispatch: Enabled
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 6
- DIMM 2 Clock fine delay: 6
- Ch 1 Command fine delay: 10
- Ch 1 Control fine delay: 7
Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 6
- DIMM 4 Clock fine delay: 6
- Ch 2 Command fine delay: 10
- Ch 2 Control fine delay: 5
Ch1Ch2 CommonClock Setting: More Aggressive
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)
CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance LVL (Read Delay) (tRD): 6
Read delay phase adjust: Enter
Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Auto
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto
Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 14
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 3
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 3
ALL PRE to Refresh: 4
No man :) I dont use case, i just want to put this board or the p35 one in the case for 24/7 .
I have a modified Cheftec case, with dual rad at the top, because of that wont fit other psu :). http://mekk.homeip.net/cpgallery/thu...s.php?album=12
Eva, can you try max 4-4-4-12 ?
Do you have teamgorup or cellshock kits? Or praz, you know if the "issues" with this rams are resolved?
At this point I don't have a recommendation. Haven't had time to explore GTL values yet. I don't known at this point if the settings can even be carried over from the P35. Will probably get into it this weekend if I switch over to water. With air cooling I can't get to the MOSFETs to measure the voltages
The set of crucial pc2-8500 i tried before this did 585mhz 4-4-4-5 at 2.51v http://www.xtremesystems.org/forums/...&postcount=587
Have yet to test this set of crucial pc2-8500 for 4-4-4-5 yet.
Yeah i have old school Team 6400C3 Micron D9GMH does 570-575mhz at 2.4-2.45v on P35 chipset. No cellshock DDR2 though, Cellshock DDR3 kit coming soon though for DDR3 boards :)
CellShock 8000 on this board acts the same as on the P35. After messing with the SPD it seems like a lost cause. I'm almost willing to bet money it's a PCB issue.