**Unified** DFI LanParty UT 790FX-M2R-M2RS / Phenom /Data Base Thread**

Quote:

---

Originally Posted by KTE

Thanks for the details Achim :toast:

---

You are welcome. Actualy I'm having quite alot of fun dumping i2c/smbus devices. :)
May I ask you for a test. Can you install i2c-tools "modprobe i2c-dev" and run
"i2cdetect -l" first. It should find an SMBUSPIIX compatible device as i2c-0.
"i2cdetect 0" will then scann this device for chips.
I get those results on the sapphire board with different cpu's

X2 5000BE

Code:

---

>    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
> 00:          -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2e --
> 30: -- -- -- -- -- -- -- -- 38 -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4e --
> 50: -- -- 52 53 -- -- -- 57 -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6e --
> 70: 70 -- -- -- -- -- -- --

---

> 9600BE

Code:

---

>      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
> 00:          -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2e --
> 30: -- -- -- -- -- -- -- -- 38 -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- 47 -- -- -- -- 4c -- 4e --
> 50: -- -- 52 53 -- -- -- 57 -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- 6e --
> 70: 70 -- -- -- -- -- -- --

---

The device at 0x2e is causing the trouble here. 0x38 can be eighter the SB or related to the clock generator whom is at 0x69. Gotta decrypt that output of 0x69, it changes with bios changes for ref HT, pcie speed and spread spectrum.
0x50-0x53 are the DIMM's i did not try to read those.
0x6e is an pcie chip whom does not exist on the gbt780g and the m3a.

It is possible to readout some of those chips with "i2cdump 0 0x38" for example.
Do not run that for 0x2e on the DFI Lanparty UT 790FX or NF4!
Dumping 0x6e stopps at 0x9e and afterwards a coldstart is required to get the smbus chip working again. 0x47 also requires an coldstart after i tried to read that chip.
It was save to dump 0x38,0x4c, 0x4e, 0x57 and 0x70.
I'd be interested in the output of 0x38. I expect with an phenom cpu you'll also the 0x4c, 0x47 and 0x57. I skimmed ovr the BKDG and it seems the cpu has smbus interfaces for voltages and thermal sensors.

I finally got to 2.61G using 12.5x209. There seems to be a number of issues with these bioses. RAM TRC stops at 26 and I see this with all the boards. Most dims will run 26 up to about 840 above that they need more but the BIOS locks it at 26. The GA790FX had the same problem and caused the major part of the instability.

The other issue I see is after setting the CPU multi. I can lower it just like the Locked CPUs but can't raise it above 12.5. Does this board not know this is a BE version?

What Bios are you on Alabama? Also to I might add if you use the Template I provide with my settings using Hex Code versus the HT Mutiplier set you will find or at least in my experience the Bios and Board responds better to having the Multi set that way versus the HT Mutiplier.

I'm on 416 and back to 205x12.5 every thing else at stock except VCore and NB locked at 1.28V.

http://www.abload.de/img/baredit-downcoreooo.jpg
A sidenote: I tried the downcore register and it worked. Above screenshot shows the settings i used to disable core 3 and 4. After a reboot (warmstart) I'm on a dualcore system now. :)
I think tictac mentioned it a few moth ago and KTE tried it on the MSI where it did not work.

Quote:

---

Originally Posted by justapost

You are welcome. Actualy I'm having quite alot of fun dumping i2c/smbus devices. :)
May I ask you for a test. Can you install i2c-tools "modprobe i2c-dev" and run
"i2cdetect -l" first. It should find an SMBUSPIIX compatible device as i2c-0.
"i2cdetect 0" will then scann this device for chips.
I get those results on the sapphire board with different cpu's

X2 5000BE

Code:

---

>    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
> 00:          -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2e --
> 30: -- -- -- -- -- -- -- -- 38 -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4e --
> 50: -- -- 52 53 -- -- -- 57 -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6e --
> 70: 70 -- -- -- -- -- -- --

---

> 9600BE

Code:

---

>      0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
> 00:          -- -- -- -- -- -- -- -- -- -- -- -- --
> 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
> 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2e --
> 30: -- -- -- -- -- -- -- -- 38 -- -- -- -- -- -- --
> 40: -- -- -- -- -- -- -- 47 -- -- -- -- 4c -- 4e --
> 50: -- -- 52 53 -- -- -- 57 -- -- -- -- -- -- -- --
> 60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- 6e --
> 70: 70 -- -- -- -- -- -- --

---

The device at 0x2e is causing the trouble here. 0x38 can be eighter the SB or related to the clock generator whom is at 0x69. Gotta decrypt that output of 0x69, it changes with bios changes for ref HT, pcie speed and spread spectrum.
0x50-0x53 are the DIMM's i did not try to read those.
0x6e is an pcie chip whom does not exist on the gbt780g and the m3a.

It is possible to readout some of those chips with "i2cdump 0 0x38" for example.
Do not run that for 0x2e on the DFI Lanparty UT 790FX or NF4!
Dumping 0x6e stopps at 0x9e and afterwards a coldstart is required to get the smbus chip working again. 0x47 also requires an coldstart after i tried to read that chip.
It was save to dump 0x38,0x4c, 0x4e, 0x57 and 0x70.
I'd be interested in the output of 0x38. I expect with an phenom cpu you'll also the 0x4c, 0x47 and 0x57. I skimmed ovr the BKDG and it seems the cpu has smbus interfaces for voltages and thermal sensors.

---

I forgott one thing the output of dmidecode for different boards would be great. :rolleyes:

Thanks for that try Achim... I'll try it out on the Abit next :)
Yep MSI w/9600BE did not do it.

"New" D.F.I LanParty UT 790FX-M2R ~ 5/5/2008 ~ "Beta" Bios..........http://www.dfi.com.tw/Support/Downlo...FLAG=B&SITE=US

Noice.

Quote:

---

Originally Posted by justapost

http://www.abload.de/img/baredit-downcoreooo.jpg
A sidenote: I tried the downcore register and it worked. Above screenshot shows the settings i used to disable core 3 and 4. After a reboot (warmstart) I'm on a dualcore system now. :)
I think tictac mentioned it a few moth ago and KTE tried it on the MSI where it did not work.

---

Thanks man, it worked :up:, however 1st core can't be disabled.

Quote:

---

Originally Posted by justapost

My 9850BE just stopped working. This time lm-senors detect was the cause. I booted the board with an 5000BE flashed the Bios and cleared the DMI area. But no louck with the 9850BE, stuck at C1, even with DDR2-800 memory. The 9600BE works. :mad:

---

I've a Phenom 9850 with a DFI M2R and I'm using linux as main OS.
I have not tried yet to run lm-sensor detect on this new system, and now I am concerned to read this :eek:

but the Phenom is really dead? :eek:
which distro you used? which version of kernel? and which version of lm-sensors? thanks!


ps: hi to all, greetings from Italy!

Quote:

---

Originally Posted by Brother Esau

"New" D.F.I LanParty UT 790FX-M2R ~ 5/5/2008 ~ "Beta" Bios..........http://www.dfi.com.tw/Support/Downlo...FLAG=B&SITE=US

---

Thanks man, still hot...:lol2:

OK:
MEM Voltage read correctly at 2.19, 2.22 reads 2.24
HT Link speed still broken
...testing

Quote:

---

Originally Posted by KTE

Thanks for that try Achim... I'll try it out on the Abit next :)
Yep MSI w/9600BE did not do it.

---

Quote:

---

Originally Posted by aGeoM

Thanks man, it worked :up:, however 1st core can't be disabled.

---

The first core is used to configure the other cores during bootup, I guesst that's why he can't be disabled.
DFI should add a field for the other three cores, so they can be disabled individual. M3A only allows to specify the number for cores you want to use but does not let you choose which ones.

Quote:

---

Originally Posted by ozlacs

I've a Phenom 9850 with a DFI M2R and I'm using linux as main OS.
I have not tried yet to run lm-sensor detect on this new system, and now I am concerned to read this :eek:

but the Phenom is really dead? :eek:
which distro you used? which version of kernel? and which version of lm-sensors? thanks!

ps: hi to all, greetings from Italy!

---

Welcome to XS. :welcome:

I used Debian testing/lenny with an 2.6.24 kernel and lm-sensors version 3.0.1. Jean from the lm-sensor team already wrote an patch whom disables the smbus scannig on the DFI and Sapphire versions of the board.
You can simply avoid running sensors-detect and add those two modules to your modules.conf "i2c-piix4" and "it87". Both work fine and sensors shows all the voltages / temepraturs and fan speeds the sensor chip has to offer.

My chip is really dead, however it might have been a coincidence that the chip died from the sensors scan. I guess the chip at address 0x2e is a write-only device so a read probe might cause that chip to change voltages or frequencies in an unexpected way. My theorie is that all those apps utilising the smbus run similar detection routines and that might cause some voltage or frequency spikes whom damage the processor over long time. I asked the sapphire support today what chip that is at 0x2e. I hope i get the specs so i can figure out what the probe routine exactly did.

Hmm.. I used a few programs which detect sensors.
Ones that used old sensors or buses were the ones to BSOD my system, but never kill.

Anyone tried Intels Linux Power tool?
I'm going to try it out next.

Good news for me BTW :D

EDIT: saw your reply above now

Yes, physically core0 can never be disabled, everything uses it.
Achim, this is what Abit uses for scanning parameters: http://www.xtremesystems.org/forums/...&postcount=252

Quote:

---

Originally Posted by KTE

Hmm.. I used a few programs which detect sensors.
Ones that used old sensors or buses were the ones to BSOD my system, but never kill.

Anyone tried Intels Linux Power tool?

---

You mean their tool to detect uneconomic coded parts in programs? Or is that a tool to tweak kernel parameters?

As i said above can be that this spike caused my already weak cpu to fail. Gotta wait for the sappire response now.

Quote:

---

Originally Posted by KTE

Achim, this is what Abit uses for scanning parameters: http://www.xtremesystems.org/forums/...&postcount=252

---

Those are the adresses where the sensor chip holds those infos?
I'd need a list of smbus devices. The smbus chip is a part of the SB600/700 i guess. sensors-detect finds the SB600 here and uses the i2c-piix4 module for the smbus component.

"i2cdetect -l" shows that chip at i2c-0 here. The chip is accessible thru /dev/i2c-0 after you loaded the i2c-dev module.

"i2cdetect 0" probes what adresses have chips behind but does not run read probes on those adresses.

I assume you will get at least 0x38, 0x69, 0x50-0x53 (depends on the numer of dimms you use). On a crossfire board also 0x6e should show up.
The chips at 0x2e and 0x4e are there on the DFI 790FX and the DFI NF4. 0x2e is the troublemaker.

Today i found that even the "i2cdetect -l" makes the smbus chip unusable till i restart (it does not freeze or reboot the system but i can not read out the chips with "i2cdump 0 0x69" i only get XX's as results.
This issue only occures with an phenom mounten and not with an X2 chip.
With a phenom mounten there are also smbus interfaces at 0x57 and 0x4c.

The BKDG says the cpu uses smbus interfaces for svi and also for a side band interface to the temperature sensor. They refer to a special document about that sideband interface which i can not find at amd's website.

I plan to ask their support for the specs of those smbus interfaces. I'd like to read the cpu and nb voltages thru the svi interface.:yepp:

Has anyone else installed the 5/5/2008 Beta Bios besides Ageom and Myself?

Quote:

---

Originally Posted by justapost

You mean their tool to detect uneconomic coded parts in programs? Or is that a tool to tweak kernel parameters?

---

It checks what consumes most CPU usage and power... PowerTOP I think. Installing Etch now, so will check it out.

Quote:

---

Those are the adresses where the sensor chip holds those infos?

---

Where ABit utilities and BIOS access those infos, yes.

Quote:

---

I'd need a list of smbus devices. The smbus chip is a part of the SB600/700 i guess. sensors-detect finds the SB600 here and uses the i2c-piix4 module for the smbus component.

"i2cdetect -l" shows that chip at i2c-0 here. The chip is accessible thru /dev/i2c-0 after you loaded the i2c-dev module.

"i2cdetect 0" probes what adresses have chips behind but does not run read probes on those adresses.

I assume you will get at least 0x38, 0x69, 0x50-0x53 (depends on the numer of dimms you use). On a crossfire board also 0x6e should show up.
The chips at 0x2e and 0x4e are there on the DFI 790FX and the DFI NF4. 0x2e is the troublemaker.

---

To be honest, I have no extra time to play about, I'm just managing to test it, barely, and that takes all my spare time :(
I'll boot into Ubuntu and check the addresses out but I'm really wary after your CPU kill with those accesses. Your board is different to mine, lm-sensors never worked for me at all apart from ACPI temp but its not necessary what killed yours kills mine - something else may kill mine, so I'm limiting what I checkout.

Quote:

---

Today i found that even the "i2cdetect -l" makes the smbus chip unusable till i restart (it does not freeze or reboot the system but i can not read out the chips with "i2cdump 0 0x69" i only get XX's as results.
This issue only occures with an phenom mounten and not with an X2 chip.
With a phenom mounten there are also smbus interfaces at 0x57 and 0x4c.

The BKDG says the cpu uses smbus interfaces for svi and also for a side band interface to the temperature sensor. They refer to a special document about that sideband interface which i can not find at amd's website.

I plan to ask their support for the specs of those smbus interfaces. I'd like to read the cpu and nb voltages thru the svi interface.:yepp:

---

I've never seen any mention of them to date and I have the docs. Officially, this all there is in the documentation regarding SMBus on functions I've seen - I'l post it in Abit thread when I get a chance if you haven't seen it already. :)
Thanks for the search and info though!

1,2 and 4 I'm going to give it a shot because of the DRAM fix, TRFC.
3. Right, I'm going to stick a Sempron in a $250 USD board :rofl: Maybe one of those 2100 Dulies. Think it would go from 1.8 to 3.6 and beat a Penryn :ssplllt:

Major Reasons of Change:
1. Fixed DRAM timing show error.
2. Change detect SPD Function for TRFC.
3. Fixed Sempron CPU Can't into CMOS setup.
4. Fixed BIOS DRAM Voltage detecting error.

Update :p Nothing new for me. I tried at 1.6275V which is what I expected to be able to do 2.6 but BIOS drops back to 2.5G and HTT at 207 Crashes. I'll try getting it cooler and 1.32V which I can get 2.7G but that sucks. I may just be stick with a :banana2: :banana2: :banana2: :banana2:ed up chip. :cord:

AC that's the worst 9850 I've heard of so far, really, very poor - unless there's something else to it. :confused:
Not sure how exactly you're trying but your board has many compatibility problems so the first thing I would do is take one stick of RAM out, throw tRFC 195ns and then try seeing what the core can get to stable. Then throw the second stick back in and check.

In my case RAM limits the oc a lot and yep, tRFC is central to Phenom oc and stability. I have no boot at 800 4-4-4-12-23 105ns 2.1v whilst on the Intel platform I can get 1200 5-5-5-15 2.15v stable out of them. Minimum stable boot requires 127.5ns tRFC here with ProMOS and Elpida ICs. Microns do better.

Hi,

Here's a little review I wrote two months ago : http://www.jmax-hardware.com/article...790fx-m2r.html

I'll now use it for my H24 rig with a 6400+ cpu... Hope to get a 9850 BE for testing but it doesn't look like it will happen :(

I tried autoclock once too and I got to 207 too:confused:. 2.7Ghz eventually froze my system btw...

Testing the bios now, 1.8V got me 1.84 on the MM which is a lot better than 1.9V+ as it used to be.

Also I have an answer for the flashing cursor and blue bar issue, it seems a slight corruption in cmos reloaded may be the cause, im trying to get either an option added to bios to clear all cmos reloaded data or the tool to write 0's to it like F-Tester.exe we used on the MF4 chipsets.

Quote:

---

Originally Posted by Tony

Testing the bios now, 1.8V got me 1.84 on the MM which is a lot better than 1.9V+ as it used to be.

Also I have an answer for the flashing cursor and blue bar issue, it seems a slight corruption in cmos reloaded may be the cause, im trying to get either an option added to bios to clear all cmos reloaded data or the tool to write 0's to it like F-Tester.exe we used on the MF4 chipsets.

---

@Tony.....its really great that you are on board with this on the Bios level as we desperately need your expertise and direct tie to D.F.I so we can get the advancement thats needed on this pending and ongoing issue .

Thank you very much for devoting you're time and attention to helping us we and I sure do appreciate you're involvement and time:toast:

Campbell;)

Quote:

---

Originally Posted by Tony

Testing the bios now, 1.8V got me 1.84 on the MM which is a lot better than 1.9V+ as it used to be.

Also I have an answer for the flashing cursor and blue bar issue, it seems a slight corruption in cmos reloaded may be the cause, im trying to get either an option added to bios to clear all cmos reloaded data or the tool to write 0's to it like F-Tester.exe we used on the MF4 chipsets.

---

OK, I saw that last night and blew it off as instability.

Quote:

---

Originally Posted by KTE

AC that's the worst 9850 I've heard of so far, really, very poor - unless there's something else to it. :confused:
Not sure how exactly you're trying but your board has many compatibility problems so the first thing I would do is take one stick of RAM out, throw tRFC 195ns and then try seeing what the core can get to stable. Then throw the second stick back in and check.

In my case RAM limits the oc a lot and yep, tRFC is central to Phenom oc and stability. I have no boot at 800 4-4-4-12-23 105ns 2.1v whilst on the Intel platform I can get 1200 5-5-5-15 2.15v stable out of them. Minimum stable boot requires 127.5ns tRFC here with ProMOS and Elpida ICs. Microns do better.

---

As long as I leave the RAM at 800, I'm solid as a rock. I can drop ram to 667 and clock up ok but limited by the CPU. I can run the RAM to about 840 before the TRC gets to short at 26 in order to complete the refresh cycle. It's bases on time. When you increase freq. the time spent waiting for refresh is shortened but the physics of the RAM require that time in m/secs to get through the cycle. I don't know why no one in the industry will listen to this. Either fix the mobos so we can set 900, 1000, 1100 etc or fix the RAM tables so that the correct settings are in place when we adjust timings to meet these standards. All the people making these toys need to get it together. I'm getting tired of spending money only to find it won't work with this or that part.

CPU speed is another issue. I'm voltage and thermal limited. Below 1.25 I can't go over 2520 or so. I need 1.29 to get 2.6G fairly stable. 1.32 to go to 2.7G. Above 2.6G the heat rises about 60C which means thermal instability. I need to find a sink that performs better than the Ninja which has been the best so far.

I'm looking at 3 options. Get a better Air sink, I've though of water but it's a maintenance issue and a pain.
Leave it at Stock until we get more results or can resolve the issue but continue to experiment on occasion.
Put the 5600 back in and use the Kentsfield for quad work.

Quote:

---

Originally Posted by justapost

I'd need a list of smbus devices. The smbus chip is a part of the SB600/700 i guess. sensors-detect finds the SB600 here and uses the i2c-piix4 module for the smbus component.

"i2cdetect -l" shows that chip at i2c-0 here. The chip is accessible thru /dev/i2c-0 after you loaded the i2c-dev module.

"i2cdetect 0" probes what adresses have chips behind but does not run read probes on those adresses.

I assume you will get at least 0x38, 0x69, 0x50-0x53 (depends on the numer of dimms you use). On a crossfire board also 0x6e should show up.
The chips at 0x2e and 0x4e are there on the DFI 790FX and the DFI NF4. 0x2e is the troublemaker.

---

0x2e is SPD EEPROM on mine.

Quote:

---

# sensors-detect revision 5016 (2007-11-11 22:20:16 +0100)
Next adapter: SMBus PIIX4 adapter at 0b00 (i2c-0)
Client found at address 0x2e
Probing for `SPD EEPROM'... Yes
(confidence 8, not a hardware monitoring chip)
Probing for `SPD EEPROM'... Yes
(confidence 8, not a hardware monitoring chip)
Probing for Super-I/O at 0x2e/0x2f
Trying family `VIA/Winbond/Fintek'... Yes
Found `Winbond W83627DHG Super IO Sensors' Success!
(address 0x290, driver `w83627ehf')
AMD K10 thermal sensors... Success!
(driver `to-be-written')
Driver `w83627ehf' (should be inserted):
Detects correctly:
* ISA bus, address 0x290
Chip `Winbond W83627DHG Super IO Sensors' (confidence: 9)
Driver `to-be-written' (should be inserted):
Detects correctly:
* Chip `AMD K10 thermal sensors' (confidence: 9)

$ i2cdetect -l

Code:

---

i2c-0        unknown          SMBus PIIX4 adapter at 0b00            N/A

---

$ sudo i2cdetect 0

Code:

---

    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2e --
30: -- -- -- -- -- -- -- -- 38 -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: 50 51 -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- 69 -- -- -- -- -- --
70: -- -- -- -- -- -- -- --

---

$ sudo i2cdump 0 0x2e

Code:

---

    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: c5 0f 00 00 00 00 00 c0 14 62 ff ff ff ff ff ff    ??.....??b......
10: 02 00 00 ff ff ff ff ff ff ff ff ff ff ff ff ff    ?...............
20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
40: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
50: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
60: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................

---

---

Quote:

---

Today i found that even the "i2cdetect -l" makes the smbus chip unusable till i restart (it does not freeze or reboot the system but i can not read out the chips with "i2cdump 0 0x69" i only get XX's as results.
This issue only occures with an phenom mounten and not with an X2 chip.
With a phenom mounten there are also smbus interfaces at 0x57 and 0x4c.

---

Mine seem to be similar with a few differences but I'm on SB600 not SB700 and 770 chipset. HIH :)

Quote:

---

Originally Posted by AlabamaCajun

I'm looking at 3 options. Get a better Air sink, I've though of water but it's a maintenance issue and a pain.
Leave it at Stock until we get more results or can resolve the issue but continue to experiment on occasion.
Put the 5600 back in and use the Kentsfield for quad work.

---

Better cooling is always a good thing of course. Get a TRUE or so, very easy to install as well:yepp:.

For your 2nd option, doing the same here with a little testing now and then. But Im mainly waiting for SB750. If it turns out my chip is still crap anyway Ill order a new chip as well. I guess in one or even two months steppings etc are already quite a bit better.

Option 3, could do. But might as well keep your Phenom in and still use your Kentsfield for the quadwork.

Im looking to watercool my stuff though. I know it's crap for maintenance, but well. Ill buy most waterblocks from the same manufacturer to decrease the chance that materials are going to react with each other. Also getting a Danger Den fillport to be able to quickly add some coolant as maintenance part. And the refilling, well, so be it lol.

Currently ~ Testing ~ 5/5/2008 "Beta" Bios will post up some stuff when available:)

Quote:

---

Originally Posted by KTE

0x2e is SPD EEPROM on mine.
Mine seem to be similar with a few differences but I'm on SB600 not SB700 and 770 chipset. HIH :)

---

Nope the SPD EEPROMS are at 0x50 and 0x51. Your sensor chip has an smbus interface at 0x2e but was also found on the isa bus.
0x38 seems to be the SB interface on all 7xx chipsets. I have this on all boards.
0x69 is the clockgenerator you can dump him with "i2cdump 0 0x69 s".

If you want to change your cpu multis individual and don't want to use AOD you can use this method.

1. Set "Cool'n'Quiet" to Auto (bad sideffect you can not use a
   nb multi beside stock (9x or 10x) with newer bios versions.
2. Boot into windows make sure you have the phenom drivers from amd installed on winxp
3. Under windows open the Energy Options Dialog and switch to the mode for lowest battery usage.
4. Start AMD Power Monitor and CrystalCPU's MSR Editor.
   
   This is how it looks here with an 9600BE
   http://www.abload.de/img/cpumultisa20.jpg
   
5. Select a core In CrystalCPU's main window and read register 0xc0010064 in the MSR Editor. This is the register for the normal power state (p-state-0) at 0xc0010065 is the register for the energy saving power state (p-state-1). If you select "lowest battery usage" in the energy options dialog your cpu will run in p-state-1 in "Desktop" mode it's p-state-0.
6. The last digit is responsible for the cpu-multi.
   
   The frequency is 1600MHz+digi*100MHz, so in my case 1600MHz+700MHz=2300MHz.
   
   Change it to your desired value and hit WRMSR. In my screenshots I choose core0 and 8 as the last digit means 2400MHz for core0.
7. In the Energy Options Dialog switch into "Desktop" mode. The cpu
   will now use the new settings you defined in the p-state-0 register.
   
   http://www.abload.de/img/cpumultis2pmo.jpg

Beside the cpu multi you can also define CPU-VID,NB-VID, CPU-DID and NB-DID here. Look at page #24 of the "Official" DFI thread for further information.

Quote:

---

Originally Posted by justapost

Nope the SPD EEPROMS are at 0x50 and 0x51. Your sensor chip has an smbus interface at 0x2e but was also found on the isa bus.

---

That would be logical, but are you sure? The device at 0x2e crashing your system can only be the hardware monitoring I/O chip then.

Quote:

---

0x38 seems to be the SB interface on all 7xx chipsets. I have this on all boards.
0x69 is the clockgenerator you can dump him with "i2cdump 0 0x69 s".

---

Thanks, will check it out later. I'm off it now, wish they made AOD or something similar for it so I could quickly test stability in Linux :(

Anyone have any thoughts on this new beta release?

Justapost, again, thx a very lot for that!

Though i noticed just one little strange thing:

I played with Core 4 in CCPUID and set it to 2.9Ghz. But I ran Prime and it rebooted. Well, I restart and set 2.8Ghz again on the 4th core. But AMD Power Monitor now reads the 2nd core to be 2.8Ghz, so does CPU-Z. However, the 4th worker thread in Prime95 was running the fastest of all of them:confused:.

So exactly what core got the OC now? the 2nd (Core #1) or the 4th (Core #3)?

[EDIT] Well, Central Brain Identifier shows the 4th core to be OC'd as well lol...

I finaly managed to cripple the bios on the board with an k8 cpu. :(

I ran a few tests on 0x2e whom ran fine. Next lm-sensors version should have an updated detection routine to sort out the dangerous chip at 0x2e.

Then i tried "i2cdetect 0" which did not show the clock generator chip at 0x69 now with the k8. I was curious if i can dump the chip and tan "i2cdump 0 0x69". I got only XX's as response. I tried "i2cdetect 0" again and now even the chip at 0x2e was gone. I thought, k the smbus interface does no longer work coreect so i tried to reboot. Since then the borad stucks at C1 no mather what cpu i put in. :confused:
The M3A works fine with the 5000BE i used for the latest test on the Sapphire.

:wave: till i get the board boot proper again.

Quote:

---

Originally Posted by Rammsteiner

Justapost, again, thx a very lot for that!

Though i noticed just one little strange thing:

I played with Core 4 in CCPUID and set it to 2.9Ghz. But I ran Prime and it rebooted. Well, I restart and set 2.8Ghz again on the 4th core. But AMD Power Monitor now reads the 2nd core to be 2.8Ghz, so does CPU-Z. However, the 4th worker thread in Prime95 was running the fastest of all of them:confused:.

So exactly what core got the OC now? the 2nd (Core #1) or the 4th (Core #3)?

[EDIT] Well, Central Brain Identifier shows the 4th core to be OC'd as well lol...

---

That is really odd. I'd expect at least AMD Power Monitor and CBId to read from the core's msr registers.
Can it be that there are two ways to bind a task to an core. One uses the msr registers numbering and another one uses windows internal numbering (whom seems to change during reboots).:confused:

Ive no clue. The last three attempts the results stayed the same though, but not like the 1st time. But still it's strange two programs report Core x to be OC'd and two programs report Core y to be OC'd... Like lol wtf confusion.

Still I dont know what I was thinking. This MSR stuff is nice but now I think about it, if my board sucks that bad OC'ing single cores wont change results?

Ill try a little bit more. I ran a 16h+ Prime Blend with WinAmp playing music with 4th core on 2.8Ghz stock Volts. 2.9Ghz wasnt loved much though, and at least core 1 and 2 didnt want to run 2.9Ghz either with the 4th at 2.8Ghz. Both time I froze... At least better than the Machine Check Exception BSOD though.

But I didnt play with Voltage options yet, maybe it's just a lack of Vcore. Or, most likely, Ive a bad chip anyway:mad:. After all Tony managed insane results on both his DQ6 and M2R, and Brother managed to get 2.8Ghz at low Vcore.

Ill of course test some more, already have the MSR field number for P0 in my head lol. And whenever my exams are over and have some money to waste Ill get SB750 and another chip.

Quote:

---

Originally Posted by justapost

Then i tried "i2cdetect 0" which did not show the clock generator chip at 0x69 now with the k8. I was curious if i can dump the chip and tan "i2cdump 0 0x69". I got only XX's as response. I tried "i2cdetect 0" again and now even the chip at 0x2e was gone. I thought, k the smbus interface does no longer work coreect so i tried to reboot. Since then the borad stucks at C1 no mather what cpu i put in. :confused:

---

:(
Like I said in other post, the app can cause the system to go haywire. Was that first time you tried to get the dump?

Quote:

---

That is really odd. I'd expect at least AMD Power Monitor and CBId to read from the core's msr registers.

---

This is what I mentioned a few days back. On different boots, different reads. Some apps get them from the same registers though :yepp:
I've seen their debug dumps, you can ask VVJ.

Quote:

---

Can it be that there are two ways to bind a task to an core. One uses the msr registers numbering and another one uses windows internal numbering (whom seems to change during reboots).:confused:

---

AOD, CPUZ, CBID, AMDPM, CCPUID label cores differently. Sometimes one core is another in the other app, thats what I said hindered me trying to oc individual cores. Each time you reboot, core arrangement might very well be different :(

For me, I change it until AMD PWM and CCPUID read similar. Thats worked fine so far...

ATM, my highest stable is 1.38v 3000/3000/2700/2800 with that method.

BTW, just to add: I've seen Rammsteiner's register dumps of MSR C001 0064, his core registers in P-State 0 are not changing multiplier at all even when his system tells him he's running overclocked.

So even when CPUZ shows: 1.3VID 200x13.5 2700
MSR P0 shows: 0x28002809 aka 1.3VID 12.5x multi

Had no idea what thats about, but a little experimentation showed me MSR C001 0070 is changed instead and the MSR C001 0064 just stays default in his case.

Ramm, many PMs, all were lost half way through system crashes, so I'm waiting to get it stable before trying again, sorry :(

I hate taking time on PMs and then you lose it :mad:

Quote:

---

Originally Posted by KTE

:(
Like I said in other post, the app can cause the system to go haywire. Was that first time you tried to get the dump?

---

With the Phenom there was a chip at 0x69 whom I dumped many times. I expected it to be the clock generator. I only have the specs for an similar clock generator and I was not yet able to figure it's registers out. I focuesd on the M2A-VM clock generator yesterday, because i have the specs of that clockgen chip and it is the simplest one.

With the k8 cpu there was no chip at 0x69 according to i2cdetect 0. I was curious if that chip was just not detected and tried to dump that address 'i2cdump 0 0x69". It was not the first time i tried to dump an nonexistent address and the result was the same as with other nonexistend address dumps. Just XX's and no hex values.
However after that test "i2cdetect 0" did no longer show the 0x2e chip and since then i can not get beyond C1. :(

Quote:

---

Originally Posted by KTE

This is what I mentioned a few days back. On different boots, different reads. Some apps get them from the same registers though :yepp:
I've seen their debug dumps, you can ask VVJ.

AOD, CPUZ, CBID, AMDPM, CCPUID label cores differently. Sometimes one core is another in the other app, thats what I said hindered me trying to oc individual cores. Each time you reboot, core arrangement might very well be different :(

For me, I change it until AMD PWM and CCPUID read similar. Thats worked fine so far...

---

:yepp: I saw your postings few days ago. Most astonishing to me is that AMD PM uses different labels than the MSR-Registers. I thought it completely relies on those registers. M$ developers should shed some light how they bind threads to cores.

Quote:

---

Originally Posted by KTE

BTW, just to add: I've seen Rammsteiner's register dumps of MSR C001 0064, his core registers in P-State 0 are not changing multiplier at all even when his system tells him he's running overclocked.

So even when CPUZ shows: 1.3VID 200x13.5 2700
MSR P0 shows: 0x28002809 aka 1.3VID 12.5x multi

Had no idea what thats about, but a little experimentation showed me MSR C001 0070 is changed instead and the MSR C001 0064 just stays default in his case.

Ramm, many PMs, all were lost half way through system crashes, so I'm waiting to get it stable before trying again, sorry :(

I hate taking time on PMs and then you lose it :mad:

---

:confused:

But I was running 12.5 multi:shocked:. Did I say I was running 13.5 multi then? If so, sorry, Im running 12.5.

And KTE, we've the same stepping right. I might add a little Vcore or something then. I just looked at the Phenom stepping/OC thread and it looks like all stepping starting with the 'B' at least do better already. Mine starts with 'A', maybe that's the whole crap thing about.

Quote:

---

Originally Posted by KTE

For me, I change it until AMD PWM and CCPUID read similar. Thats worked fine so far...

ATM, my highest stable is 1.38v 3000/3000/2700/2800 with that method.

---

Do you mean that when APM and CCPUID read the same speeds, no matter what core number? Like before you had Core #3 on both CCPUID and APM OC'd, reboot and now they both say Core #1, this way it's still correct?

Or if they read Core #1 you change your OC back to default and just try out a different CPU to OC with MSR and continue this untill they both say Core #3 again?

If so, this would mean we've NO clue what core we're actually OC'ing lol. It doesnt matter as long as we're sure we're testing the same core as we tested before though.

If I would have known this earlier I would have written the core # I had with the 2.8Ghz OC:ROTF:

Quote:

---

Originally Posted by justapost

With the Phenom there was a chip at 0x69 whom I dumped many times. I expected it to be the clock generator. I only have the specs for an similar clock generator and I was not yet able to figure it's registers out. I focuesd on the M2A-VM clock generator yesterday, because i have the specs of that clockgen chip and it is the simplest one.

With the k8 cpu there was no chip at 0x69 according to i2cdetect 0. I was curious if that chip was just not detected and tried to dump that address 'i2cdump 0 0x69". It was not the first time i tried to dump an nonexistent address and the result was the same as with other nonexistend address dumps. Just XX's and no hex values.
However after that test "i2cdetect 0" did no longer show the 0x2e chip and since then i can not get beyond C1. :(

---

Sad news damn :(

Quote:

---

Most astonishing to me is that AMD PM uses different labels than the MSR-Registers. I thought it completely relies on those registers. M$ developers should shed some light how they bind threads to cores.

---

I have no idea how they're set :shrug:

I would love to know how though.

Presumably, I'm thinking, CCPUID/CPUZ/CBID do not change core numbering but AOD/AMD PWM do. I suspect thats what causes the confusion.

Quote:

---

Originally Posted by Rammsteiner

But I was running 12.5 multi:shocked:. Did I say I was running 13.5 multi then? If so, sorry, Im running 12.5.

---

Yeah it said you were running:

"Voltages were stock, so were VID's. I only changed multi's, first time I did Core #0 14x and the other 3 cores 13x."

Did I misunderstand that?

Quote:

---

And KTE, we've the same stepping right. I might add a little Vcore or something then. I just looked at the Phenom stepping/OC thread and it looks like all stepping starting with the 'B' at least do better already. Mine starts with 'A', maybe that's the whole crap thing about.

---

My reply would've mentioned, that don't look at steppings ;)

Quote:

---

Originally Posted by Rammsteiner

Do you mean that when APM and CCPUID read the same speeds, no matter what core number? Like before you had Core #3 on both CCPUID and APM OC'd, reboot and now they both say Core #1, this way it's still correct?

Or if they read Core #1 you change your OC back to default and just try out a different CPU to OC with MSR and continue this untill they both say Core #3 again?

---

Core0/1 on mine stay put, core2/3 interchange randomly. I can find out by using multiple apps though, tedious procedure. :shakes:

Quote:

---

Originally Posted by KTE

Sad news damn :(

---

Good news, the board is back. :)

I tried tony's reverse battery method. I left the totaly unplugged board with the clear cmos jumper set and the batter mounted revers alone fopr a few hours and now it's working again. Glad I had luck this time. :rolleyes:

Glad to hear that justapost:D.

Anyway, was running 3h+ stable, was typing a post here and everything went black and board not responding to reset/power buttons once again. Had to use PSU...

Either Ive a crap chip or my board is really totally borked.

I'd like to believe it's my board, but in the end some people hit 3Ghz with stock Volts. Whether it's 100% stable (ie idle stable), I dont know. But at least their Phenom saw 3Ghz+ in Windows, mine hardly saw 2.9Ghz at any Vcore. Maybe a combination.

So once again, MSR OC'ing didnt bring me anything new. Ill still have to wait for SB750 and/or another Phenom. Oh well, the CPU at stock is fast enough to play Eve-Online so Im fine for a while:yepp:. Though I really hope to get something started in a month or so.

Has anyone had a issue trying to get this board to cold boot?

So far ive tried two different boards and two different power supplies and after the first boot if i shut it down and try to cold boot again leds/fans will spin for a second then nothing well happen. In order to get it to boot up again I have to remove power from the motherboard by flipping the switch on the psu then after any leds on the motherboard are out it will boot or atleast attempt to boot again.

edit: (just incase my sig didnt show for some reason)
DFI LanParty UT 790FX-M2R
Thermaltake Toughpower W0133RU 1200W

Quote:

---

Originally Posted by xKraMx

Has anyone had a issue trying to get this board to cold boot?

So far ive tried two different boards and two different power supplies and after the first boot if i shut it down and try to cold boot again leds/fans will spin for a second then nothing well happen. In order to get it to boot up again I have to remove power from the motherboard by flipping the switch on the psu then after any leds on the motherboard are out it will boot or atleast attempt to boot again.

---

Nope, I'm on air. But I'm looking into cold atm so if you find anything please let me know, thanks.

Quote:

---

Originally Posted by xKraMx

Has anyone had a issue trying to get this board to cold boot?

So far ive tried two different boards and two different power supplies and after the first boot if i shut it down and try to cold boot again leds/fans will spin for a second then nothing well happen. In order to get it to boot up again I have to remove power from the motherboard by flipping the switch on the psu then after any leds on the motherboard are out it will boot or atleast attempt to boot again.

edit: (just incase my sig didnt show for some reason)
DFI LanParty UT 790FX-M2R
Thermaltake Toughpower W0133RU 1200W

---

Try just pushing reset, my boards here hang but boot no issues if I just push the reset button

Quote:

---

Originally Posted by Rammsteiner

Glad to hear that justapost:D.

---

Thanks, after I got the board working i did a few other tests jean from the lm-seonsors list recommended.

In short at 0x2e lives a chip whom is responsible for vdimm. I can read out that chip with modified i2c-tools.
>i2cget 0 0x2e
0x35
Normaly you can readout an specific register of an chip like this
>i2cget 0 0x2e 0x01
That returns the value of register 0x01 from the chip at 0x2e. Now that chip at 0x2e behaves different. The chip has only one register and
>i2cget 0 0x2e 0x01
results in 0x01 been written into the chips only register and the value is returned. This would mean ~3.2V vdimm.
:explode:

I figured it out because my system froze as i tried to write 0x32 in that register. After that I had C1's till i removed a dimm. That dimm did not work in the Sapphire board for a while. After i tested it in the gbt board it works again in the sapphire now. :shrug:
So after i got the board working i measured vdimm with different values in the 0x2e register

0x34 => 1,971V
0x35 => 1,942V
0x36 => 1,916V
0x37 => 1,892V

If an application probes this chip by trying to read address 0x00 the normal way it will result in the highest possible vdimm.

Sidenote: The chip at 0x4c is the cpu's thermal sensor interface. At address 0x01 the core temp can be read out.

Quote:

---

Originally Posted by Rammsteiner

Anyway, was running 3h+ stable, was typing a post here and everything went black and board not responding to reset/power buttons once again. Had to use PSU...

Either Ive a crap chip or my board is really totally borked.

I'd like to believe it's my board, but in the end some people hit 3Ghz with stock Volts. Whether it's 100% stable (ie idle stable), I dont know. But at least their Phenom saw 3Ghz+ in Windows, mine hardly saw 2.9Ghz at any Vcore. Maybe a combination.

So once again, MSR OC'ing didnt bring me anything new. Ill still have to wait for SB750 and/or another Phenom. Oh well, the CPU at stock is fast enough to play Eve-Online so Im fine for a while:yepp:. Though I really hope to get something started in a month or so.

---

If it helps my 9600BE is not prime95 stable at stock 2.3/1.8GHz 1.25/1.25V.

^ :confused:

Now or has it never been?

Thanks for the info, dangerous :eek:

Quote:

---

Originally Posted by KTE

^ :confused:

Now or has it never been?

---

Good question i never ran it at stock before, always at 2.6GHz. Since I mounted the chip i always ran stock or lower frequencies at 1.25V. For my sensor testing i allways used the 500BE for the 0x2e register.

Quote:

---

Originally Posted by KTE

Thanks for the info, dangerous :eek:

---

Indeed i wonder what types of probing everset sandra and so on uses.

Well, that sucks even more justapost:eek:.

On the otherhand, Ive no clue if my chip is stable at stock. I ran Prime when I just got it for 10 hours. But we all know Phenom+Prime=useless. And in the end at stock I enever searched for instability, but maybe if I would leave it for two weeks on I would crash... But I never leave my PC on for that long. And I dont feel like trying out either.

Im done for a while, now enjoying the PC. My 2nd HD3870 is on repair tour, if I get it back Ill Vmod that one and try 900+/1300+ in CF mode. DQ6 and 6400+BE are on RMA as well.

Maybe I should get like a 500W PSU, a very cheap GPU (like HD3400), a cheap HDD and use DQ6 for purely testing new Phenoms without having to screw around in this PC all the time:rolleyes:

how come new bios don't allow nb fid/did change when enabling cool'n'quiet?

Quote:

---

Originally Posted by justapost

Good news, the board is back. :)

I tried tony's reverse battery method. I left the totaly unplugged board with the clear cmos jumper set and the batter mounted revers alone fopr a few hours and now it's working again. Glad I had luck this time. :rolleyes:

---

Interesting. My old Epox 939 board used to lock up occasionally. I could shock it back to life by removing the battery, setting the clear cmos jumper for about 10 minutes. Then I would set everything back, and boot up while pressing the insert key. The Epox also had a POST LCD, and would lock up at "FF" rather than "C1".

I recently ran lm-sensors configure while installing Debian Linux on my DFI M2R + 9850BE. It locked everything up and the LED read "C1". I tried my "Epox" technique but it didn't help. I had to RMA both the board and cpu. Since then I've stayed away from lm-sensors and speedfan. Unfortunately those were my two favorite monitoring programs...

If it happens again, I'll try your method. The difference is that you reversed the battery and let it sit for a long time.

Quote:

---

Originally Posted by vext

I recently ran lm-sensors configure while installing Debian Linux on my DFI M2R + 9850BE. It locked everything up and the LED read "C1". I tried my "Epox" technique but it didn't help. I had to RMA both the board and cpu. Since then I've stayed away from lm-sensors and speedfan. Unfortunately those were my two favorite monitoring programs...

---

There is no need to run sensors-detect. The only module you need for sensor monitorin is "it87". Seems I have an robus bios chip here.:)
The second time I ran into the C1 issue, removing one dimm helped. That dimm made problems for a few minutes and seems to work ok now.
The old sensors-detect routine will trigger the chip at 0x2e to appliy an >3V vdimm. That should harm the dimm's and the chip's nb. I wonder why it also results in faulty bioses.
Did you get both RMAed? If so did they say what was defect.

Quote:

---

Originally Posted by vext

If it happens again, I'll try your method. The difference is that you reversed the battery and let it sit for a long time.

---

That was tony's tip from a few weeks ago, whom I crossposted here.

I was just gaming with stock settings. Although I had CnQ and Vcore/Vnb still at auto because of MSR OC attempts. But this shouldnt matter.

But I was gaming and system froze, blackscreen... So I set CnQ off and set the default Vcore and Vnb manually.

If it happens again Ill try to downclock the GPU (maybe the pencil is degrading on it). If not... Im going mad...

Then Ill RMA the M2R and Phenom as well. Im even considering to get Crosshair II instead. This is driving me nuts.

However, not making any conclusions yet. But Im getting a deja vu from my X2 + M2R...

[EDIT]
Didnt help crashed again. Downclocked the GPU this time.

Quote:

---

Originally Posted by seeker010

how come new bios don't allow nb fid/did change when enabling cool'n'quiet?

---

Which new Bios? 4/16/08 Official or 5/5/2008 Beta?

I think 3-07 was the lates version where it was possible to change the nb vid/did if cnq was enabled.

@Achim.....question? Through you're personal Experience with Phenom and 790FX do you find that HCI MemTest works well and is accurate for testing Ram Stability in Windows?

Quote:

---

Originally Posted by Brother Esau

@Achim.....question? Through you're personal Experience with Phenom and 790FX do you find that HCI MemTest works well and is accurate for testing Ram Stability in Windows?

---

Good question. :rolleyes:
I never used HCI memtest, I rely on memtest86+ http://www.memtest.org/.

Ramm, sorry if I missed it but have you visited the screens such as Genie, RAM and PWM and hit F7. I had to do this to get stable. Do RAM first and reboot up to the Save DMI, I think Post 96. Then Restart there and reenter BIOS and F7 the other 2 then reboot. This is the only way I've found that completely clears the controller tables.

JP, thanks for the Register info, that's GOLD

I could not resist playing with the clocks again. Still on the 5-X-2008 Beta which for me seems stable.
I went ahead and hit the volts back to 1.28 after a few days running stock at 1.275. Bumped the lock to 209 set CPU multi back to Auto, not 12.5. It booted and ran all night, folding from 8pm to 8am before I shut it down to let the rooms cool. Night temps are on the low 60s requiring little AC so not much cool air goes there, too muggy for cracking the window.

2.61G is not too back but I may still be able to get 2.7G+ solid if I can find the best way to cool this thing.

Quote:

---

Originally Posted by justapost

I think 3-07 was the lates version where it was possible to change the nb vid/did if cnq was enabled.

---

yes. you are right. do we know why DFI made this change? Also, what does cpu stepping p0 and p1 mean?

Quote:

---

Originally Posted by AlabamaCajun

Ramm, sorry if I missed it but have you visited the screens such as Genie, RAM and PWM and hit F7. I had to do this to get stable. Do RAM first and reboot up to the Save DMI, I think Post 96. Then Restart there and reenter BIOS and F7 the other 2 then reboot. This is the only way I've found that completely clears the controller tables.

---

Thx for that, didnt know that yet:eek:.

How do you mean stable though? As in less/no BSOD's, no strange freezes? At stock or as well with OC'd settings?

Stable is when I can carry out normal tasks, surfing, folding, gaming and not see any glitches. Solid is what I call one that runs weeks without any problems though I will through a game error if it cleanly quits to desktop and reports an error that happens after doing something wild that may have just pushed the game into a buggy area of code. Some of the simulator games can be pushed over the edge. Even though I get suspect of a hardware problem and will be on guard.
After all the flakiness I saw with the GBT 790FX-DS5 that sits in a box, this is stable.

If they removed the option of FID+CnQ, it may be because of a problem with it though, someone should ask them :yepp:
They rarely remove it for no reason.

Quote:

---

Originally Posted by KTE

If they removed the option of FID+CnQ, it may be because of a problem with it though, someone should ask them :yepp:
They rarely remove it for no reason.

---

The reason is, before you could set it the way you wanted, but after you reboot/boot to windows, it reseted to default, now you can't have it enabled just because it wouldn't work. Makes sense to me. Don't know if my English makes for you.:rofl:

Update:.........5/5/2008 Beta Run at the same settings a my Bios Tempate Overclock on Front page with Ram @ 1066 OCZ Tony's Modified SPD @ 1.87Vdimm CPU @ 1.23750vcore set OCCT Crashed 4hrs 46 minutes so technically that equals 8 1/2 hrs of Prime95:) I am quite positive its due to heat nmore then likely as it is 90F in my Room Currently:eek:

Overall Bios seems OK but needs some refinement is all

Once again there are USB Keyboard Issues Present in this Bios when in Pre Boot Prior to Post the USB Keyboard does not Respond and you have to Restart Manually to get the Delete Key to Function to get into Bios!

Also some NIC Latency Issues "Not Much' but it is there.

Also another Minor Annoyance is that after saving settings and Restarting the Splash Screen / Post Screen does not appear and just is Black until Raid Controller Bios Post appears!

Can any of you gentlemen Running 5/5/2008 "Beta" with the Board set up on the Bench get a accurate DMM Reading on CPU , NB Voltage please and post offset variants?

Thanks aGeoM. It was a problem on many AMD boards, even when they disable it.

When they leave CnQ and FID changing on together, the clockspeeds through the TSC are read wrongly many times [downclock to read 2500 at all times].

The odd thing is that different nb vid's and did's worked fine here with the 9600BE and the 4-07 bios. The problem aGeom described did not occure with all phenoms. !

A small update about the phenoms smbus thermal interface.

On the DFI/Sapphire 790FX boards this interface is accessible like a separate chip at the address 0x4c. It can be read out undel linux with

i2cdump 0 0x4c

Code:

---

    0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 16 00 00 08 00 00 46 00 00 00 00 00 00 00 00    .?..?..F........
10: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
30: 47 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00    G?..............

---

This is a typical output. I found the value at address 0x01 holds the core temp in celsius. 0x30 is always that temp + 49°C-50°C.
The value at 0x0a seems to be the max temp the chip is rated for. I only have an 9600BE here and that cpu shows 0x46 means 70°C here.

However there is another way to read out this interface the smbus way.
There are two registers on the Miscanselous Control Register (F3).
Register 0x1E8 is used as an address pointer and 0x1EC can be used to read and write data to that address.
So if you startup Baredit and select "B.0 D.24 F.3" you can write the desired address to the register 0x1E8 and after you select "B.0 D.24 F.3" again you get the value in 0x1EC

http://www.abload.de/img/baredit-sideband-gbtl38.jpg
This screenshot shows the data of register 0x01 of the thermal sideband smbus interface means it's the current core temp (0x18 =>24°C).

Note: This way of access also works on the GBT780G board with the 9600BE. This board does not offer an i2c/smbus access at 0x4c and on no other address but via the registers 0x1E8 and 0x1EC it works. On both boards registers 0x1E4 has bit 3 set to 0b, which means the thermal side band smbus interface is not deactivated.

May I ask that someone with an 9850BE or an other phenom different from an 9600BE posts the values of the registers 0x06 and 0x46 here.

1. Start BarEdit
2. Select "B.0 D.24 F.3"
3. Write 0x06 into register 0x1E8
4. Select "B.0 D.24 F.3"
5. Write down the value of register 0x1EC

Do the same with 0x46 instead of 0x06 at step three.

This data will help to identify the chip and skip some probing routines.

Quote:

---

Originally Posted by justapost

The odd thing is that different nb vid's and did's worked fine here with the 9600BE and the 4-07 bios. The problem aGeom described did not occure with all phenoms. !

---

NB-VID works if I set +xxx% over default.
NB-FID if I set it to >06~what ever APM shows always 2000MHz, then after reboot and enter BIOS NB-FID=06, so the only way to set ie. FID=09(2400) is with Baredit tool after a reboot to windows.

This was tested with 9850BE + Bios 307.

Edit

Bios 505:

BIOS CPU-VID=+103.xx%
BIOS CPU-NB-VID=103.xx%

http://img88.imageshack.us/img88/3746/cpuvidhb5.jpg

Well...VIDs are working as BIOS 307, CPU-FID can be changed but resets to default (2500), they should ghost this option to.:2cents:

Quote:

---

Originally Posted by justapost

May I ask that someone with an 9850BE or an other phenom different from an 9600BE posts the values of the registers 0x06 and 0x46 here.

1. Start BarEdit
2. Select "B.0 D.24 F.3"
3. Write 0x06 into register 0x1E8
4. Select "B.0 D.24 F.3"
5. Write down the value of register 0x1EC

Do the same with 0x46 instead of 0x06 at step three.

This data will help to identify the chip and skip some probing routines.

---

I wrote 0x06 and 0x46 @ 0x1E8 nothing changed @ 0x1EC, as your instructions.

Quote:

---

Originally Posted by aGeoM

NB-VID works if I set +xxx% over default.
NB-FID if I set it to >06~what ever APM shows always 2000MHz, then after reboot and enter BIOS NB-FID=06, so the only way to set ie. FID=09(2400) is with Baredit tool after a reboot to windows.

This was tested with 9850BE + Bios 307.

---

Hmm as usual I mixed up NB-VID and NB-FID in my previous post. I have in mind that i used different nb-fid's with CnQ enabled turing my p-state testings and it worked fine.

Quote:

---

Originally Posted by aGeoM

I wrote 0x06 and 0x46 @ 0x1E8 nothing changed @ 0x1EC, as your instructions.

---

Thank you for testing. :up:
Even if you select that "B0 D24 F3" pci register in the dropdown again?
If i write someting into 0x1E8 it first shows 0x00 as it's new value. After I loaded the pci register again by selecting it in the dropdown the value i wrote in shows up and the data from that register shows up in 0x1EC.
Is bit 3 ox 0x1E4 0b on your system?

Quote:

---

Originally Posted by justapost

Hmm as usual I mixed up NB-VID and NB-FID in my previous post. I have in mind that i used different nb-fid's with CnQ enabled turing my p-state testings and it worked fine.

---

I whish it worked for me, this 9850BE, is stable if I set the MSR registers to 2700@default VID, but from BIOS I need to feed some more volts, NB it's ok @2400, so KTE help me to write the ".ini" to use with Sam2008 tool to set CPU speed at 2700, but for NB@2400 I have to manualy change it in Baredit and reboot, thats a PITA.

Quote:

---

Thank you for testing. :up:
Even if you select that "B0 D24 F3" pci register in the dropdown again?
If i write someting into 0x1E8 it first shows 0x00 as it's new value. After I loaded the pci register again by selecting it in the dropdown the value i wrote in shows up and the data from that register shows up in 0x1EC.
Is bit 3 ox 0x1E4 0b on your system?

---

Well after 0x1E8 write first shows 0x00, but after I load it again it reads the value entered at the same adress 0x1E8. ie 0x1E8=0x06

Here's a SS defaul system/0x06@0x1E8:

Quote:

---

Originally Posted by justapost

There is no need to run sensors-detect. The only module you need for sensor monitorin is "it87". Seems I have an robus bios chip here.:)
The second time I ran into the C1 issue, removing one dimm helped. That dimm made problems for a few minutes and seems to work ok now.
The old sensors-detect routine will trigger the chip at 0x2e to appliy an >3V vdimm. That should harm the dimm's and the chip's nb. I wonder why it also results in faulty bioses.
Did you get both RMAed? If so did they say what was defect.

That was tony's tip from a few weeks ago, whom I crossposted here.

---

Whooee, 3.2v, I can see why things came to a halt. The dimms are ok but I could never get the cpu to work after that. I tried it in two other boards, including a new DFI M2RS. I didn't try a second cpu in the original M2R board, so it might have been ok.

Yes, I RMAed both cpu and board. Newegg didn't get back with me about what the defect might be.

So, sensors-configure is not necessary? I would really like to get lm-sensors working in Linux.

Quote:

---

Originally Posted by vext

Whooee, 3.2v, I can see why things came to a halt. The dimms are ok but I could never get the cpu to work after that. I tried it in two other boards, including a new DFI M2RS. I didn't try a second cpu in the original M2R board, so it might have been ok.

Yes, I RMAed both cpu and board. Newegg didn't get back with me about what the defect might be.

So, sensors-configure is not necessary? I would really like to get lm-sensors working in Linux.

---

Hi vext,

I was wrong with the 3,2V the probing used random values so the applied value could have been anything up to 3.2V.
Jean from lm-sensors made a few patches in the last days so the next version 3.0.2 will run just fine on the Sapphire/DFI boards.
Everything lm-sensors dtects is the smbus controller (i2c-piix4) and the sensor-chip (it87). So if you add those modules manual you don't need to run sensors-detect.

My Phenom 9850 Black Edition should be here tomorrow :)
Some people have said in another forum that i will need to re-install Vista64
going from Dual to Quad ?

That would be a wise idea:)

Quote:

---

Originally Posted by justapost

Hi vext,

I was wrong with the 3,2V the probing used random values so the applied value could have been anything up to 3.2V.
Jean from lm-sensors made a few patches in the last days so the next version 3.0.2 will run just fine on the Sapphire/DFI boards.
Everything lm-sensors dtects is the smbus controller (i2c-piix4) and the sensor-chip (it87). So if you add those modules manual you don't need to run sensors-detect.

---

Thanks for the info. I just checked the lm-sensors site and they have a bulletin which explains the problem and their solution.

I'll try version 3.0.2 as soon as it's posted.

vext

Quote:

---

Originally Posted by Brother Esau

That would be a wise idea:)

---

Well its hear! AAnnnd its the Exact same stepping as LittleBoy :D
JAAFB AA 0810APMW

anyone: how about voltages with the 05/05 bios?

gratz @ final8ty :D :up:

Quote:

---

Originally Posted by Oese

anyone: how about voltages with the 05/05 bios?

gratz @ final8ty :D :up:

---

Its no guarantee that i will get any ware near LittleBoys cpu but it gives me hope.

Quote:

---

Originally Posted by Oese

anyone: how about voltages with the 05/05 bios?

gratz @ final8ty :D :up:

---

Hey, Oli
Tony has taken a DMM Reading of the Vdimm and that has improved drastically and is very close to vdimm set in Bios :) So making improvements with that finally. I don't have my rig set up on the bench and have asked a couple of times if anyone will be as kind as to get Vcore and NB Voltages with DMM and see how far off that is compared to what is set in Bios but no one has volunteered or people just don't have their board on the bench one or the other.

Do you have you're board on the Bench?:hrhr:

Quote:

---

Originally Posted by Final8ty

Its no guarantee that i will get any ware near LittleBoys cpu but it gives me hope.

---

Perhaps you might be as kind as to throw XP64 on you're system and see if you can further validate what I found?

Mmh.. think i'll flash 05/05 and test.. :D

mmh at stock volts (1.4v) dmm is still reading 1.449v..

cpuz reading: 1.424v

Oli , you on 5/5/2008 with that reading?

yepp..

and really, my ram is no longer stable at stock vdimm at those settings, blend priming at stock vcore/2.0v vdimm right now..

Two weeks ago I finaly bought a 9850 for my DFI 790, that has been laying in it´s box for abought a month know. Installd win Xp 32bit and flashed to 5/5-08 bios. For me this new B3 is much more stable then my old 9500 and my 9600BE. Been running 2800mhz with brother´s bios template exept v-core wich is 1,28v. Also left the third setting from above starting with vcore @ Auto. BUT, If i leave my rig on over night, it will not come back to life again, will try more vcore... But more voltage heats up my PWM and NB like crazy, PWM was hitting 70C+ before I palced an stock AMD 70mm fan over it, but to make it fitt i hade to remove my Ultra-X and use AMD´s new heatpipe cooler... So now my CPU loads 70C but my PWM stays cool... With my Ultra-X my Cpu loaded 52C... Anyone else have trobble with heat, and how much heat can an Br take 24/7? 55-60c safe?

OCZ VX2 @ 533mhz 1,9v 5-5-5-18
DFI UT 790FX 5/5-08
HD 3870
Corsair HX 520w

Brother Esau, I have a fluke and can problably do some messuring if it´s not to hard, will look into it!

Quote:

---

Originally Posted by Brother Esau

Perhaps you might be as kind as to throw XP64 on you're system and see if you can further validate what I found?

---

Im just to lazy to go trough the hassle :)

be, seems like with arctic ceramique wlp and 5/5 bios/2,0v vdimm that chip is stable on stock vcore.. but i'll see with rising temps here in summer.. :D

I dont understand what the CPU Feature that has snown up in the bois is about?

how does the Ht clock? all ive really seen in here is just raising the multi

@ final8ty: which one? did not see something new...

Quote:

---

Originally Posted by flclisgreat

how does the Ht clock? all ive really seen in here is just raising the multi

---

HT Oveclocking is Dead and should only be used to dial in the fine tuning of overclock on Phenom. Why does no one get this by now?

Quote:

---

Originally Posted by Oese

@ final8ty: which one? did not see something new...

---

CPU feature shows up in the bios when you run a Quad.

and what does it mean??

Quote:

---

Originally Posted by Brother Esau

HT Oveclocking is Dead and should only be used to dial in the fine tuning of overclock on Phenom. Why does no one get this by now?

---

because i cant raise the multi on my non phenom cpu? so anyone tried doing 400+ Ht on it?

I said Phenom Oveclocking. Dual Core screams on this board and I had over 360 HT going on with my 6400+BE:up:

Quote:

---

Originally Posted by Brother Esau

I said Phenom Oveclocking. Dual Core screams on this board and I had over 360 HT going on with my 6400+BE:up:

---

thanks. looking for a board to cook some semprons(low multi).

Well my 9850BE was pants & i have gone back to my 6400+BE.
Got my 9850BE upto 2800-2900 but needed 1.6 Vcore and my PSU would shut down if i tried to give it more juice.

The 9850BE would not do more than 2600 on stock Vcore 1.3 & all the cores seemed to be evenly matched when using AOD.

Did you try my settings on the First page?

Quote:

---

Originally Posted by Final8ty

Well my 9850BE was pants & i have gone back to my 6400+BE.
Got my 9850BE upto 2800-2900 but needed 1.6 Vcore and my PSU would shut down if i tried to give it more juice.

The 9850BE would not do more than 2600 on stock Vcore 1.3 & all the cores seemed to be evenly matched when using AOD.

---

bad one..

*NEW* 5/5/2008 Official Bios for DFI LanParty UT 790FX-M2R:up:>>>>>http://www.dfi.com.tw/Support/Downlo...FLAG=A&SITE=US

Is that off the last beta which I think is 5-5. I have that beta and want to know if I should flash to official? It seems stable as long as I don't OC.

Update;
I put my W5600X2 in the 780M2R to take advantage of running cooler until the 45nms but I encountered hard power off crashes when loaded. I did'nt feel like :banana:ing around with it so I put the phenom back in. Problem went away.
What I did observe is that the vcore was at 1.05 when I first booted which meant that CnQ was working. Once I F7ed it and rebooted that feature went away.
How do you get CnQ to work on a Phenom when not OCed?