http://www.eetimes.com/rss/showArtic...0200094&pgno=2
If this is true, and GF has to postpone 32nm some, it won't do much good for competition will it? :down:
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http://www.eetimes.com/rss/showArtic...0200094&pgno=2
If this is true, and GF has to postpone 32nm some, it won't do much good for competition will it? :down:
Aren't we stuck on 45nm with AMD till late 2010 anyways? Waiting on the Bulldozer launch for 32nm right? I'm not familiar with AMD's latest product roadmaps but how the fact that they don't mention how far of a "slip" this is doesn't worry me too much now. Hasn't AMD always been ~1 year behind on process technology, this hopefully won't change a thing.
Last I heard Bulldozer was pushed back to a probable 2011 timeframe, not that it matters too much. AMD's upcoming server chips seem to be doing REALLY well. If they can possibly take a magny-cour and port it to AM3 then that will tide them over for a while longer.
One can only hope. Would be amazing if they launched Thuban and an MCM of Thubans at the same time. The only problem is I fear the lack of clockspeeds won't make Thuban and the Magny-cours AM3 alternative competitive. AMD already has trouble with 4 cores at 3+GHz, I can't imagine 6 cores let alone 12 would run cool at an even 3GHz :( AMD needs a die revision like C0 -> D0 for Intel Bloomfield.Quote:
Originally Posted by EniGmA1987
Thuban is going to be even less competitive with Westmere than Deneb was with Bloomfield...Quote:
Originally Posted by [XC] gomeler
Do you know something I don't? Westmere's only chip that will compete with Thuban on a thread-basis will be the Core i9 Extreme Edition, estimated at $1500. There have been zero rumors that I am aware of regarding a cheaper launch product featuring Gulftown. The other chips are Clarkdale and Arrandale processors that will be more in line to compete with the Phenom II X3 and X4 processors.Quote:
Originally Posted by 003
Well it's already been confirmed there will be an Xeon CPU based on Gulftown with a locked multiplier, so no EE style pricing. Also there has been speculation that Intel may release a non-EE version of Gulftown some time after the initial launch.Quote:
Originally Posted by [XC] gomeler
Ummmm, link?Quote:
Originally Posted by 003
ES samples of Gulftown have unlocked multi...
Well there's this:Quote:
Originally Posted by zalbard
http://www.xtremesystems.org/forums/...45#post4000645
Rofl, and you call it a source?Quote:
Originally Posted by 003
Do you realise that BIOS update for Gigabyte board unlocked that CPU?
And it's just a ES, that's no way an official confirmation of anything.
Have a look here: http://www.xtremesystems.org/forums/...d.php?t=232109
This guy unlocked his CPU after updating the BIOS.
:( I really hope there is a non-EE version of Gulftown released. Or at the very least, a quad core version of Westmere (and no on-die graphics).Quote:
Originally Posted by zalbard
If not, Sandy Bridge will be my next upgrade.
This is the "old" roadmap which says: Risk production in mid 2010.Quote:
Originally Posted by Salvador
http://www.semiconductor.net/photo/1...admap_jpg_.jpg
Left edge = tape out; Right edge = risk production.....
Bad reading capabilities of the journalist become news items...
Regards, Hans
So if I understand this graph correctly, 45 nm risk production should start in a few more months :)Quote:
Originally Posted by Hans de Vries
Yeah, man, I am hoping for that as well.Quote:
Originally Posted by 003
nop you're reading it wrong: GloFo is existing since Q1 this year, and for them 45nm production started then. But I do admit that this type of timeframe scale is misleading, so one can't blame journalist... And regarding the "slip"... here's quote from that article:Quote:
Originally Posted by JumpingJack
Quote:
GlobalFoundries denied its roadmap has slipped. ''Our roadmap for 32-nm SOI has not slipped,'' according to a spokesman for the company. ''Yes, the timeframe for introduction has been altered slightly compared to the roadmap we showed you in July, but that is not because of any issues with the technology. The roadmap has simply been adjusted to align with AMD's product needs. We have solid natural yields ramping up every week, and we have high confidence in our ability to demonstrate the same robust yields and manufacturing capability on 32-nm that we have historically had.''
I was just teasing Hans ... those type of gant charts are actually pretty useless for any kind of real information.Quote:
Originally Posted by Nedjo
Where is the new roadmap?? The link has only word no pictures :(
2010 forecast:-
Thuban vs Nehlem/Westmere "Clock to clock Westmere would win, Nehalem and Thuban would equal each other in most cases except single threads. Price to performance of Thuban is a important factor, if its closer to the price of Nehalem than Westmere we may have a winner, but Westmere is in a league of its own who want performance no matter the costs they would buy Westmere with that ultra sexy stock cooler "
Deneb vs Lynnfield "Clock to clock Lynnfield would win, but faster Denebs based on new stepping and platform costs is one of the important points"
Propus/Rana vs Clarksdale "Clock to clock Propus would win, Rana would be about equal to Clarksdale in performance. Since this is Mid-low end price matters a lot, Intels offerings are on a higher side but we have to wait and see how much does the H55 costs. P55 paired up with a i3 you lose the igp and also have to buy a new video card"
Regor vs Core 2 Duo "Clock to clock C2D wins but it depends a lot which C2D CPU you are using. L2 is very important in C2D, a E7xxx may bash Regor really well bu E5xxx cant do that good a job. Pricing basically defines this low end segment.
extended 45/40nm lifetime... they make it sound as if the market would demand that... why and how?
whats odd about the roadmap is that 40/45 lp is coming AFTER 32nm? does that make much sense...
even if its not optimized for low power, shouldnt 32nm be about the same for low power asics as 40/45 lp optimized?
Clarkdale has an integrated GPU so why would it not function when used in P55 boards?Quote:
Originally Posted by ajaidev
You must have heard Otellini's claim last Tuesday then:Quote:
Originally Posted by JumpingJack
"Two years ago Intel introduced the world's first 45 nanometer process, and to date the competition - that is to say AMD - has shipped zero."
:rolleyes:
http://www.tgdaily.com/content/view/44057/135/
http://www.tgdaily.com/content/view/44061/103/
Regards, Hans
Simple P55 has no VGA, DVI, etc ports h55 has them. You need to get h55 with FDI or no video interface on mobo is provided. P55 + i3 means you cant use the integrated igp.Quote:
Originally Posted by ubuntu83
What the hell? :rofl:Quote:
Originally Posted by Hans de Vries
Quote:
Originally Posted by [XC] gomeler
I am no road map expert but I thought AMD was shipping their 4770 Radeons
since spring 2009,these are made on 40nm if my memory serves correctly.
But they are manufactured at TSMC and not GlobalFoundries ....Quote:
Originally Posted by SocketMan
so? It's still competition...Quote:
Originally Posted by Lightman
AMD has a lot of headroom on 45nm with Revision C3 and Revision D silicon yet to come. AMD has yet to even implement high-K dielectrics or metal gates on 45nm. As AMD has limited resources, they need to concentrate on getting that tech to us ASAP so 32nm can wait.
Focusing on process tech really is focusing on the wrong metric to measure AMD with too. What matters is are they on track to release their next gen microarchitecture on time. Orochi/Interlagos (Bulldozer family) are 2011 parts so as long as they're not pushed back anymore than they have been, all is well.
So I went and watched the IDF webcast, Otellini was misquoted.Quote:
Originally Posted by Hans de Vries
He referred to high-k metal gate transistors at 45 nm, so he was factually correct.
I still laugh at it though.
can it? why is high k so important? more important than 32nm? why?Quote:
Originally Posted by Mechromancer
Yeah SOI is fine. There were doom and gloom stories about SOI before 45nm but after seeing how good it is at 45nm there are high hopes for it at 32nm too.Quote:
Originally Posted by saaya
AMD will not implement high K in 45nm, IBM said its not important for 45nm, so did AMD for 45nm but 32nm is suppose to come with High K and IL.Quote:
Originally Posted by saaya
With high k implementation each chip will cost more to make than rite now other than the initial costs. But the wonders like i3 with low lowpwer consumption would be hard to make without high k. 80W fully loaded is insane :eek: .... AMD better have a Athlon x3 with low loaded and stand by consumption but most likely it will eat like the x4 does :(
Unfortunately, that's not what Intel said. tgdaily messed it up, by omitting a little detail that makes it true: HK/MG 45nm.Quote:
Originally Posted by Hans de Vries
See here:
http://download.intel.com/pressroom/..._FactSheet.pdf
This is some great doublespeak:
''Our roadmap for 32-nm SOI has not slipped,'' according to a spokesman for the company. ''Yes, the timeframe for introduction has been altered slightly compared to the roadmap we showed you in July, but that is not because of any issues with the technology. The roadmap has simply been adjusted to align with AMD's product needs.
Our roadmap has not slipped! It has been.... altered! and... adjusted!... because AMD doesn't really need a new process until... an altered point in time!
But the HK/MG isn't that big a deal, not on 45nm anyway.Quote:
Originally Posted by terrace215
A big enough deal that, despite their "me too" announcement a day after Intel, IBM failed to get it into their 45nm production lines... and after failing, labeled it "not necessary".Quote:
Originally Posted by SparkyJJO
Remember?
http://www.eetimes.com/showArticle.j...leID=197002148
In a separate announcement, IBM Corp. also tipped its high-k and metal gate development efforts. Working with Advanced Micro Devices, Sony and Toshiba, IBM claims to have found a way to construct a critical part of the transistor with a new material, clearing a path toward chip circuitry that is smaller, faster and more power-efficient than previously possible.
Like Intel, IBM did not disclose what type of hafnium-based material it will use for high-k. IBM did say it has inserted the technology into its semiconductor-manufacturing line in East Fishkill, N.Y. The chip maker will apply the material to integrated circuits with line widths as small as 45 nm starting in 2008.
... not! :rofl:
My point simply was it has proven to not be necessary. After all the SOI bashing that was going on here for a while (and yeah 65nm SOI wasn't too great on the Phenom) 45nm proved to be fine without HK-MG.
It just sounds like intel is like "ha ha we got HK-MG 45nm you don't." So? :shrug:
Except that SparkyJJO is right. Despite whatever talk IBM and AMD made in the past, the fact is that hk/mg aren't that critical just yet. AMD has just fine transistor performance this round, it's the aging architecture that's holding them back.Quote:
Originally Posted by terrace215
Your choice of words is quite telling. How exactly do you know that they failed putting high-k metal gates in? Unless you have access to their testing facilities. To the outside observer failing and choosing not to do something would appear the same. Perhaps they decided that transistor performance would be fine this round without HK/MG and so they put those resources into 32nm.
Yeah it slipped from end of Q2 to Q3 for risk production,major slippage there..Quote:
Originally Posted by terrace215
That's right, I generally assume that when a company promises something in a PR and then doesn't deliver, it is because something went wrong. But you're right, it could simply be that IBM, GloFo and AMD are merely continuing to "choose" to not use / delay / delay things.Quote:
Originally Posted by Solus Corvus
So assuming first Bulldozer silicon in Q3 2010, that would mean, what, 12-18 months for a new architecture to be respun/validated before launch (particularly on a new process), so Q3 2011-Q1 2012 launch frame? So it competes with 22nm Ivy Bridge / Haswell ?
2012 for Bulldozer? Yeah if they run into design problems,no if they don't. It has always been Q1/Q2 2011,and now that we see a tape out for 32nm SOI is scheduled for Q1 2010 and risk production is Q3,the Q1 or Q2 2011 for desktop BD parts is very reasonable.Quote:
Originally Posted by terrace215
IBM talked about 45nm + HKMG products, not necessarily AMD processors. Did AMD ever say that they were including HKMG in 45nm?Quote:
Originally Posted by terrace215
You think that bulldozer will be out in 2012? Lol.
SiO2 can't scale any more, it is as thin as it can go. High-k restores that scaling, and brings PMOS closer to NMOS in performance (that's the metal part actually).Quote:
Originally Posted by saaya
At first, of course they have to say that they will be able to catch up (or almost catch up) to Intel... and then of course it is postponed...
Its looking more and more to me that BullDozer better be the cats meow, or AMD may really be kaput.....?
RussC
sad... just sad... i thought with amd and gf seperate gf could catch up with intel... wasnt that the plan? amd asking gf to delay their new tech... wow... those idi0ts need to get some sense btchsl4pped into them...Quote:
Originally Posted by terrace215
This old story is such a total distortion of what actually occurred....Quote:
Originally Posted by terrace215
1) It was the day that that SEMATECH announced the results of its
precompetitive research in HK/metal gates. The results achieved by
a group including cooperating researchers from both Intel, IBM, AMD
and many other SEMATECH member companies.
2) As the date of this announcement was made available to the
member companies of SEMATECH then Intel decided to make the
HK/metal gate aspect of their 45 process public at the same day,
while IBM gave some of their researchers the opportunity to present
their own work.
Intel got all the headlines of course. All the work and contributions of
SEMATECH became completely overwhelmed and ignored....
Regards, Hans
The news from Op aren't really news since "risk production"(not tape out) is moved "from end of Q2" time frame to sometime in Q3. That's all.
SOI and HKMG adress different things. One takes care of the gate leakages and one of the channel leackage...
With smaller processes the gate leakage overwhelms the channel lakage. SOI was an advantage when the channel lakeage was bigger then the gate leakage at bigger process structure, but now that we have gates that are only a view atom layers thick, gate leakage is the major concern.
And they're also not mutually exclusive. GFs 32nm SOI will use HK/MG
Neither is ultra-low k, a combination of those three can be very potent I would suspect. SOI for junction leakage, high-k for gate leakage, and ULK for low wire delay... will be interesting to see the result.Quote:
Originally Posted by BrowncoatGR
Just curious, maybe the Intel insiders can enlighten. :p: When will Intel finally catch up to GF and AMD on immersion lithography? Are they going to be able to impliment it for 32nm? AMD has had it since 45nm, I wonder if Intel are having trouble following their lead.
when is GF going to have strained silicon? immersion lithography is expensive.Quote:
Originally Posted by flippin_waffles
http://download.intel.com/pressroom/..._Bohr_32nm.pdfQuote:
Originally Posted by flippin_waffles
This is what I could find after a quick google -- page 7.
Don't confuse immersion lithography as a 'lead', immersion techniques is just that a new technique to enable printing the minimal size necessary. You get what you get, whether you print it with dry, immersion, or a hyperfine atomically sharp pencil, it doesn't matter -- it is simply a chosen technique to do what is necessary to meet the requirements. Immersion litho by itself does nothing to improve the performance of the device, it's just a printing technique.
I would think it is considered better engineering if you can make older lithography work as opposed to having to turn to something more complex. I think (and someone correct me if I am wrong), Intel used double patterning in 45 nm rather than try immersion.
GF (AMD) have used strained silicon since 90 nm.Quote:
Originally Posted by Chumbucket843
Strained silicon is in AMD CPUs ever since they rolled out 90nm products(and even some 130nm) :rolleyes: .Maybe read up before asking?Quote:
Originally Posted by Chumbucket843
Immersion litho is expensive and double pattering intel uses is not? Btw,intel will use immersion lithography for its 32nm hk node.
That's the: Let the journalists do the lying trick..:) more often used by Otellini..Quote:
Originally Posted by terrace215
(By journalists inadvertently omitting just the "little detail")
Journalists wrote for years that: "Intel will not implement 64 bit (in Prescott)"
They were "telling a lie", quoting Otellini but in fact, Otellini never said it,
there was always a "little detail" in the exact wording which they overlooked.
Moore's law doesn't need HKMG at 45nm but see how Otellini again likes
to play with the press: (In this case even good old Mike Magee got fooled)
Quote:
Originally Posted by Otellini
Regards, Hans
:) I would suspect is it a wash, think about it (I am sure you have thought it through, but for the benefit of others), double patterning means you have to send it through twice. To get the same output means double the equipment, so if immersion is over 2x more expensive then I suspect immersion would be more expensive, but if it is less than 2x more expensive (over a single pass dry) then double pass is more expensive... I don't know the answer to that one.Quote:
Originally Posted by informal
It should suffice to say, it is expensive.
Yeah I always assumed they were close when it comes to total cost. But without the data from both players we will never know which one is more expensive :).Quote:
Originally Posted by JumpingJack
Quote:
Originally Posted by JumpingJack
Oh you mean like making 45nm work withougt HKMG? Seems to me Intel was bloviating about how impossible it was without it, and AMD was so far behind without it. But like you say, it shows how leading edge AMD's engineering team is. Good point..
No correction needed :)Quote:
Originally Posted by JumpingJack
But I think it is worth noting Intel uses double-pattering only for selected features/layers of the die. I've read somewhere (most likely RWT, article by DK) that only 2 steps of printing layers require same step repeated.
I think you are missing my original point, immersion lithograghy is simply what AMD/IBM chose as the enabler for them, Intel re-engineered current techniques which was the enabler from their prespective.Quote:
Originally Posted by flippin_waffles
The real point is, it does not matter if you use immersion lithography, dry lithography double passed, or pre-printed toilet paper, what ever gets to the transistor density required of that node is what they do after weighing all the alternatives, economics, and time-to-market. Implementing immersion lithography at 45 nm for IBM/AMD did not give them any kind of a lead, they are still a year behind Intel bringing forward 45 nm, and will likely be at least that for 32 nm, immersion lithography did not do anything to close that gap. This is not debatable, it is simply a fact, AMD shipped their first 45 nm processor roughly 1 year after Intel. AMD will hit the cross over about 1 year after Intel.
This is not to take away from the engineering accomplishment of enabling 45 nm, it was a remarkable accomplishment. High-k has nothing to do with enabling printing 45 nm -- 1/2 pitch metal 1 lines, it has everything to do with enabling gate oxide scaling again, and creating better performance. Intel chose to get performance using this material at 45 nm, why? Because they figured out before anyone else how to make it work.
This is also not to take away from IBM/AMD engineering, they simply had to either make due with SiO2 or decided against putting resources toward a high-k process, therefore they had to engineer other ways to hit performance goals ... which obviously they did a good job, the 45 nm tech is 10x better than the 65 nm (a botched techology in my opinion).
I don't think amds 65nm was that bad,it just it didn't fit phenom.
Just look at the P4, especial at the 90nm ones. And then look at the P-M. Same process, different architectur with quite a huge difference.
Sure its important to have the right tools at the right time so you can design your process to fit your architectur, but if your whole architectur is botched not even the best process in the world can help you.
Also neither SOI nor HKMG is required to "enable" 45nm, its just that without this additions you can't achieve certain characteristics (e.g. power consumption (leakage), clock speed, transistor density etc.).
TSMC isn't using SOI or HKMG for ther 40nm (45nm) node at all, but you will have trouble if you wan't to produce a CPU on this process that has to reach the same characteristics the the CPUs form amd/intel.
Well, maybe botched is not such a good word, probably -- not the best foot foward -- they did have problems... it lowered power some, but they could not get the clockspeed up (Agena, Brisbane, or otherwise). Their L2 latency suffered a hit as well , though AMD claimed they were 'reserving' for future L2 expansion, it of course never came to pass. The L2 latency hit is probably a good clue, I think AMD ran smack dab into a problem with wire delay in the interconnect network as evidenced by the delay hit in L2 for Brisbane and timing issues on Phenom B2. Hence the concentration on ultra-low K for 45 nm -- and they delivered, that one innovation I think is why their 45 nm came out as good as it did (that, and getting it smack dab right on Deneb/Shanghai design).
EDIT. But you make a good point on the architectural implications. It is even evidenced in Lynnfield vs Nehalem, Nehalem chews alot of power, I was quite surprised actually, but same clock and turn off the QPI links and bing, you are back to Yorksfield power levels on a Nehalem platform (minus QPI). It is very difficult, if not impossible, to deconvolve the process contribution and circuit design to make good apples to apples compare. This is why you typically see the CV/I metric used to judge the capability of a process techology, independent of any architecture. The upshot is a great process will look crappy if the architecture is horrid (90 nm on Prescott for example), where as a great process can look just ugly without a great architecture.
Jack
well it wasn't bad, but it wasn't stellar...Quote:
Originally Posted by Hornet331
not sure, thik it was Hans who've pointed out that AMD cooperated with Motorola on their 90nm tech that proved to be awesome... for 65nm tech they've opted to cooperate with Chartered, and it was what it was... now with 45nm AMD is on board with IBM, and this tech rocks... 32nm and beyond is all done in coop with IBM, and their alliance!
BTW
if this come true, it'll be a bombshell: ARM goes arm2arm with GloFo:
http://www.tgdaily.com/content/view/44102/118/
Quote:
Originally Posted by Mike Magee
are you sure?Quote:
Originally Posted by Hans de Vries
i dont think mike would be that much out of the loop and fall for it that easily... there are many people out there who dont exactly call him a great guy, but everybody respects him for his ability to sort and filter information at a very high rate, boiling everything down to the information that matters within a blink of an eye :D
i think mike knew the catch and he wrote it on purpose to give amd a nudge :D
your comparing intel vs amd 65nm, not the same thing...Quote:
Originally Posted by Hornet331
i too agree that amd 65nm didnt really work very well for them... hard to tell if its mfc process or arch related... but if you consider that 65nm barely gave them any clockspeed headroom and barely dropped power compared to 90nm, at least the initial 65nm from amd seems to have not been working very well at all :)