Bulldozer Die Shot!

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Originally Posted by EvilOne

The new design is fully modular(M-Space), in theory they should be able to swap diffrent core types/GPU cores round in almost any combination.

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Obviously, all they need is Adobe Photoshop.... (it's a joke people, don't throw stones). :)

I don't get the reason of this. If AMD so afraid of its competitors why bother to show anything at all? How are this fake picture can confirm that they indeed have BD taped-out?

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Originally Posted by madcho

Check this two roadmaps :

http://www.xbitlabs.com/images/news/..._2008_2011.png
http://img13.abload.de/img/amd_deskt...map_bil0sg.jpg

I think AMD choosen to Show us the die of Orochi. A BD core seem to be canceled, i would say BD1.
It's clear the second roadmap is less old, with thuban and AM3r2 for BD.

So i think Orochi was BD1, Zambezi is BD2, the real BD incoming.
And lynx maintream have a GPU on die, it's not for only low end. !!!

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What you are looking at is 2 different roadmaps for 2 different years. In 2008 there was probably no code name for the processor so they used the core code name. Then by 2009 they probably had the name.

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Originally Posted by kl0012

I don't get the reason of this. If AMD so afraid of its competitors why bother to show anything at all? How are this fake picture can confirm that they indeed have BD taped-out?

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It was at the glo-fo talk, demonstrating they are well on with the 32nm, rather than an AMD presentation, showing off their tech.

Also, JF said AMD was asked to show a die shot (with this I presumed by an important company, not the thousands of curious enthusiasts). If they can hide all the important bits, then why not? It was probably just to show that they have silicon in house, that Bulldozer is real now, rather than just a blueprint. It was just part of a presentation too - it made for a nice looking slide.

Really, don't make this any more important than it is. :)

Some intresting about die size. Look at the structures, highlighted in the blue rectangle - this is the same IMC at little normalized size. Orochi look's like Agena - this is big chip compared to Deneb. One Bulldozer module (without L2 cache) is about 80-100% larger than the Deneb core (without L2) and probably has 2MB L2 cache. The expected die size of 45nm orochi is about 450 mm2, but at 32nm it will be about 250 mm2. Too many... I expected that it will be no more than 200 mm2.

http://img689.imageshack.us/img689/3586/222am.jpg
Regards. Sorry for my english.

except the modules and L2 aren't to scale...

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Originally Posted by kl0012

I don't get the reason of this. If AMD so afraid of its competitors why bother to show anything at all? How are this fake picture can confirm that they indeed have BD taped-out?

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Darn. Another, evil, nefarious corporation not bending to the demands of a forum of impatient enthusiasts.

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Originally Posted by BatteryOperated

Darn. Another, evil, nefarious corporation not bending to the demands of a forum of impatient enthusiasts.

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I detect the sarcasm in your post, but the poster does have a point. Intel is at the point in Sandy Bridge where it's a little late to add features to take on BD when it comes out. Show the real deal and let your cards fall where they may. :up:

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Originally Posted by freeloader

I detect the sarcasm in your post, but the poster does have a point. Intel is at the point in Sandy Bridge where it's a little late to add features to take on BD when it comes out. Show the real deal and let your cards fall where they may. :up:

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It isn't about putting stuff in SB, It's about adding features to the architecture one or two steps down the line.

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Originally Posted by freeloader

I detect the sarcasm in your post, but the poster does have a point. Intel is at the point in Sandy Bridge where it's a little late to add features to take on BD when it comes out. Show the real deal and let your cards fall where they may. :up:

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I remain as unsympathetic as ever. And allow me to tell you why.
Each time a snippet of information pertaining to Bulldozer or Fusion is released, an veritable avalanche of bad information floods the relevant hardware forums. What follows are numerous threads of ideas, counter-ideas, theorizing, and plethora of ideas from enthusiasts who confidently assume they can predict the future.

Why, on the surface this appears to be good. Everyone is thinking and involved. The downside, as I see it, is that for every mistaken guess, bad idea, and incorrect assumption, is another day members of AMD's marketing staff, like JF-AMD, has to spend debunking craziness.

Well, I am actually the only member out there debunking and 90% of my forum work is after hours. So, in terms of "AMD resource" it is pretty small.

I am releasing details because server customer are making their buying decisions about next year right now. That is why you don't see client info.

Server customers don't need die shots, which is why I was against putting that out there.But I don't control all of the information. Had I not been in meetings solid yesterday I could have gotten to the die shot comments earlier before it started to take off.

I see very particular patterns of people who are deliberately spreading FUD, over and over. I can only guess about their motives.

I look forward to taking a real die shot of bulldozer :D

http://chew.ln2cooling.com/thuban/good%20shot%20.jpg

I can't believe you did that!

You should've done it on Cypress instead! :D:p:

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Originally Posted by -Boris-

It isn't about putting stuff in SB, It's about adding features to the architecture one or two steps down the line.

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which started several years ago. what's your point? i'll say it as many times as i need to. architecture plans are not directly correlated to competition. this is particularly true with intel. they do a lot of research independently.

http://4.bp.blogspot.com/_RvD6UeeI1J...45b86d4d6b.jpg

vondrashek md:welcome:

Hope these are good, if they are, i will be making the switch back to AMD!

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Originally Posted by Zibi

Some intresting about die size. Look at the structures, highlighted in the blue rectangle - this is the same IMC at little normalized size. Orochi look's like Agena - this is big chip compared to Deneb. One Bulldozer module (without L2 cache) is about 80-100% larger than the Deneb core (without L2) and probably has 2MB L2 cache. The expected die size of 45nm orochi is about 450 mm2, but at 32nm it will be about 250 mm2. Too many... I expected that it will be no more than 200 mm2.


Regards. Sorry for my english.

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Your english is fine ... better than mine actually.

Hans is the real expert on deconvoluting die shots and sizes. As has been beat to death, the die shot has been altered for good reasons.

However, Hans did make a guess based on the io pads, which appear to have escaped the photoshop treatment:
http://aceshardware.freeforums.org/p...40.html#p14040

performing the same activity I estimated about 300 mm^2 for a 4 module BD -- so he seems about right, again assuming that the right structures were selected for the scaling. This may seem large to some, but for the markets that this chip would target the margins will be very good.

some day i try AMD :D

First of all, I'm quite sure Intel has a very good idea of what AMD is building. And considering the lack of any drastic changes in Intel's lineup... they're not worried.

The fact alone that AMD named the chip Bulldozer, photoshopping images way before release, etc kind of reminds me of how nVidia behaved during Fermi's year long delay.

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Originally Posted by Andrew LB

First of all, I'm quite sure Intel has a very good idea of what AMD is building. And considering the lack of any drastic changes in Intel's lineup... they're not worried.

The fact alone that AMD named the chip Bulldozer, photoshopping images way before release, etc kind of reminds me of how nVidia behaved during Fermi's year long delay.

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Yes because intel is in the business of doing drastic changes to their roadmap :rolleyes:. Because in semiconductor industry you can make changes in architectures as you please :rolleyes:. This is intel not jensen

Also if my memory is correct i recall Ajaidev saying some time ago that intel DID changes to what was "original sandy bridge" in response of possible threat of amd's new architecture and introduced what we now know is the 8c/16t LGA2011 SB... maybe now that has passed some time he can say something about this.

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Originally Posted by Andrew LB

First of all, I'm quite sure Intel has a very good idea of what AMD is building. And considering the lack of any drastic changes in Intel's lineup... they're not worried.

The fact alone that AMD named the chip Bulldozer, photoshopping images way before release, etc kind of reminds me of how nVidia behaved during Fermi's year long delay.

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Yup. and thats why Intel hasnt done any changes in the first Athlon era, and then with Athlon 64 era.
However if you look how sandy 2011 looks in comparison to 1355 sandybridge you may think that intel IS trying to move as far as quickly as they can.8 cores, Large caches, 4 channel memory(!) thats pretty insane.

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Originally Posted by Andrew LB

The fact alone that AMD named the chip Bulldozer, photoshopping images way before release, etc kind of reminds me of how nVidia behaved during Fermi's year long delay.

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nV showed a not working fake card. AMD showed us the highly distorted original die for understandable reasons. Different stories.

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Originally Posted by Oliverda

nV showed a not working fake card. AMD showed us the highly distorted original die for understandable reasons. Different stories.

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and AMD alway said that this was photoshopped; nvidia claimed the card is the real deal until someone noticed the wood scres :ROTF:

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Originally Posted by generics_user

and AMD alway said that this was photoshopped; nvidia claimed the card is the real deal until someone noticed the wood scres :ROTF:

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Besides, it wasn't AMD who showed it, it was GF talking about 32nm.

Last time i checked ivy bridge was suppose to have Q3-Q4 sampling and minor release in Mid-late Q4 2011. Now that could be because of the state of 32nm process back then idk but if BD does come before Q3 then most likely it will beat ivy bridge to the market. If it samples on Q1/Q2 it can be released by Q3.

So, there will be no high end SB products, the high end products will be IB ones? :confused:

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Originally Posted by Calmatory

So, there will be no high end SB products, the high end products will be IB ones? :confused:

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No. There is a 6-9 months timeframe from SB high end to IB high end products.

From what it looks like, Intel decided to interleave the mainstream with high end and not release it in parralel. So you have SB mainstrean, 6 months later SB high end, 6 months later IB mainstream, 6 months later IB high end and so on.

The high end products will be no different than Xeon DP equivalents, in fact they are the same product using the same socket. Basically, when Xeon products are ready, than will the high end also be launched. Xeon requiere more validation and since dies are larger, you need the process to be already ramped up ( that's mainstream task ).

I wonder if AMD will have serverparts as highend parts as well. That's how they've done with FX in the past. I guess we'll see highend and server bulldozer server first, around late Q2 with the rest to follow later, in Q3 or early Q4.

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Originally Posted by -Boris-

I wonder if AMD will have serverparts as highend parts as well. That's how they've done with FX in the past. I guess we'll see highend and server bulldozer server first, around late Q2 with the rest to follow later, in Q3 or early Q4.

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For that you would need boards with g34 or c32 socket, long time we saw server sockets for consumers from amd.

Here is my image for the die shot, I believe everyone was looking for 8 "cores" and 4 modules when it is actually only 2 modules and 4 "cores". Also used viethanhpro's sectioning of memory for L2/L3 cache's. I believe it is a photoshopped 4 module down to 2, as well as some of the internal bits also being moved around in addition to blurred and scaled.

http://maximusimperium.net/gallery/data/media/1/bd1.jpg

I think you are wrong :).It's 8core/4module die alright,but deliberately altered.

fail. there is no separate memory space for different data types in x86. the L2&3 can hold instructions and data.

there is no point in trying to get any information out of that die shot. they clearly knew what to screw with because it is very confusing.:confused:

It is an 8-core as I have said before. But, as I have also said before, don't do the math on that one, you will only be wrong.

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Originally Posted by JF-AMD

It is an 8-core as I have said before. But, as I have also said before, don't do the math on that one, you will only be wrong.

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let them do some math it's funny :D

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Originally Posted by JF-AMD

It is an 8-core as I have said before. But, as I have also said before, don't do the math on that one, you will only be wrong.

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I count eight cores in four modules with shared L2 cache. How's my math so far? ;)

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Originally Posted by marten_larsson

I count eight cores in four modules with shared L2 cache. How's my math so far? ;)

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L2 is shared on module level,if that's what you meant.L3 is shared between all the modules(a victim cache for L2s).

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Originally Posted by Stukov

Here is my image for the die shot, I believe everyone was looking for 8 "cores" and 4 modules when it is actually only 2 modules and 4 "cores". Also used viethanhpro's sectioning of memory for L2/L3 cache's. I believe it is a photoshopped 4 module down to 2, as well as some of the internal bits also being moved around in addition to blurred and scaled.

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That is not how you build a processor, the FPU is a part of each core, it isn't something you put on other side of the die. Besides, the two interger parts of each module is different in your version, they shouldn't be.
So, each big rectangle in the corners of the die is a module. Including two integer parts and FPU units. if you look at the module in the bottom right corner you can clearly see some small parts of it is mirrored, that is the cores. The parts that isn't mirrored is some cache, decode and other parts that is shared.
And as others already pointed out, you don't have different caches for different data types.

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Originally Posted by informal

L2 is shared on module level,if that's what you meant.L3 is shared between all the modules(a victim cache for L2s).

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Of course. Do you think I'm blind or something?! ;)

On a side note: I'm eagerly waiting for Bulldozer to launch. Looking at how Ontario seems to be performing I believe AMD will be in a good position to gain some market share when Ontario, Llano and Bulldozer have launched (Ontario and Bulldozer being most impressive). Although, I will miss the Formula 1 inspired code names.

From the looks of it, do you guys think BD will outperform Core i7's?

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Originally Posted by HelixPC

From the looks of it, do you guys think BD will outperform Core i7's?

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We don't know,we don't have much information at the moment. But from the looks of it,since you asked,yes I think that this will be the case.The cores are improved,targeted clocks are supposedly higher than with Deneb/Thuban(deeper pipeline,L1 cache changes),number of cores went up(33%),new FPU,complete ISA support,new power gated Turbo etc. All tells a very promising story,but until it launches we can only speculate.

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Originally Posted by informal

We don't know,we don't have much information at the moment. But from the looks of it,since you asked,yes I think that this will be the case.The cores are improved,targeted clocks are supposedly higher than with Deneb/Thuban(deeper pipeline,L1 cache changes),number of cores went up(33%),new FPU,complete ISA support,new power gated Turbo etc. All tells a very promising story,but until it launches we can only speculate.

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that sounds a lot like fermi.:)

seriously, we know the architecture is good. the question to be asked is how well glofo can make their 32nm process from a perspective of time, performance, yields and capacity. is bulldozer focused on design for manufacturing? is it focused on design for yield? with all of the talk of modularity validation and verification should be fast but what if the upper metal layers have cracks or severe fringingor high variablity, resulting in much lower frequencies from skewed clock distribution? personally i wont describe bulldozer in any terms of performance before launch, including ipc.

I think AMD went for DFM with Shanghai/Deneb(and will continue to do so in future). The GloFo slides show better than expected clock targets(N+2) but yields are not where they want them(yet).

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Originally Posted by informal

I think AMD went for DFM with Shanghai/Deneb(and will continue to do so in future). The GloFo slides show better than expected clock targets(N+2) but yields are not where they want them(yet).

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Maybe to an amateur. To professionals, that is a process out of control.

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Originally Posted by Paul Demone

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32nm HKMG / Fmax distribution ?

They seem to be suggesting that they're doing better than the previously expected median of whatever that is...

max frequency of something or other?

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That is max frequency.

It is one of those things that will impress the more technically
inclined AMD supporters who will inform the mouth breathers
and all will cheer and rejoice. It takes an experienced industry
type to read the real message there.

So fmax yield skewing high like that is good right?

Well fmax doesn't happen in isolation. It is highly correlated
to leakage and electric field strength related reliability and
aging effects. You get a lot of fast parts but those parts run
very hot, have high sleep mode power, and high failure rates
in the flat part of the bathtub curve.

That graph is not of a process 1) in control, or 2) meeting its
desired target by a long shot. You *want* a nice tight bell
curve approximately centered around your target median.

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Originally Posted by savantu

Maybe to an amateur. To professionals, that is a process out of control.

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Great.. Paul D. talking to terrace215 on an investor board.
Highly regarded professionalism in relentlessly spamming FUD.:rolleyes:

http://investorshub.advfn.com/boards...ge_id=53966494


Regards, Hans

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Originally Posted by savantu

Maybe to an amateur. To professionals, that is a process out of control.

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And you would be a professional right?

Well, professionalism means being impartial and not judging with your "love".

From your posts i don't see that, your always looking at the bad side of the things instead of looking at both sides of the story and just appreciating what the guys at AMD are working on.

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Originally Posted by Hans de Vries

Great.. Paul D. talking to terrace215 on an investor board.
Highly regarded professionalism in relentlessly spamming FUD.:rolleyes:

http://investorshub.advfn.com/boards...ge_id=53966494


Regards, Hans

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Nice to know you read Intel's invest boards. Btw, your reply also speaks volumes about your professionalism since you attack the speaker and not his arguments.

You claim you have experience in IC design. Do you agree or disagree with Paul's assesement, irrespective of where his preferences lie ? You can also decline if you believe your cannot make this judgement based on your experience. Let's keep the signal up and noise down. Stick to the facts.

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Originally Posted by Florinmocanu

And you would be a professional right?

Well, professionalism means being impartial and not judging with your "love".

From your posts i don't see that, your always looking at the bad side of the things instead of looking at both sides of the story and just appreciating what the guys at AMD are working on.

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Let's get the fact straight. AMD 32nm products are delayed because GF has problems with the 32nm process. ( hardly unexpected given their SOI+gate 1st aproach )
Informal posts a comment about slide 17 from the GF presentation regarding Freq distribution of the parts and considers it evidence of a good process since most parts hit N+2 frequency. ( N being the expected median ).
At first I believed that too, as amateur I thought : " What's the fuss with GF 32nm since it yields above target bins ? " Then I saw a post by Paul who has 30 years experience in IC, both analog and digital, holds several patents for memories,etc and he explained clearly things aren't right.
Distribution should follow a gaussian pattern with a bell centered around the median.
And then you and Hans come and snide about everything but the actual argument. Target the argument and not the messenger rings a bell ?

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Originally Posted by savantu

Nice to know you read Intel's invest boards. Btw, your reply also speaks volumes about your professionalism since you attack the speaker and not his arguments.

You claim you have experience in IC design. Do you agree or disagree with Paul's assesement, irrespective of where his preferences lie ? You can also decline if you believe your cannot make this judgement based on your experience. Let's keep the signal up and noise down. Stick to the facts.




Let's get the fact straight. AMD 32nm products are delayed because GF has problems with the 32nm process. ( hardly unexpected given their SOI+gate 1st aproach )
Informal posts a comment about slide 17 from the GF presentation regarding Freq distribution of the parts and considers it evidence of a good process since most parts hit N+2 frequency. ( N being the expected median ).
At first I believed that too, as amateur I thought : " What's the fuss with GF 32nm since it yields above target bins ? " Then I saw a post by Paul who has 30 years experience in IC, both analog and digital, holds several patents for memories,etc and he explained clearly things aren't right.
Distribution should follow a gaussian pattern with a bell centered around the median.
And then you and Hans come and snide about everything but the actual argument. Target the argument and not the messenger rings a bell ?

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All is not well with Intels 32nm process either and Intel has much more experience with 32nm than GF. Now the problem with Intel's 32nm gives rise to lower production and another thermal related problem "Cant go much further into either"

Anyways Intel is working its arse off to fix the problems and quite soon enough these will be rectified, i know that the thermal problem will be fixed before sandy bridge goes into full out production.

Well the fact of the matter is both GF and Intel has problems with 32nm, maybe GF has SOI+gate 1st approach to thank but that does not dim the fact that "32nm is harder to adopt than 45nm"

Yields is always bad in the beginning of each processes, no news there. How can you possibly try to use this fact against AMD and GloFo?
Was Intel in equally deep :banana::banana::banana::banana: when their 32nm yields was bad? Is every company doomed every time they change a process?

EDIT: I don't think anyone would expect GloFos 32nm to be a mature process yet. That the yields isn't there they want them is what we expect at this point.

Nah, you got it wrong Savantu. The problem is not that you comment quite critically over some things going on at AMD/GF.

The problem is that we don't see you doing the same on Intel matters/threads. If you would be impartial and as hard on Intel as you are on AMD than nobody would care what your attitude is.

I think its ok, some people prefer Intel, some AMD.

If all people were neutral, than they wouldn't bother arguing into detail, and from those details many of us can learn something. :)

It's completely another thing if someone gets carried away too much.

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Originally Posted by ajaidev

All is not well with Intels 32nm process either and Intel has much more experience with 32nm than GF. Now the problem with Intel's 32nm gives rise to lower production and another thermal related problem "Cant go much further into either"

Anyways Intel is working its arse off to fix the problems and quite soon enough these will be rectified, i know that the thermal problem will be fixed before sandy bridge goes into full out production.

Well the fact of the matter is both GF and Intel has problems with 32nm, maybe GF has SOI+gate 1st approach to thank but that does not dim the fact that "32nm is harder to adopt than 45nm"

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What is the problem ? I keep hearing about this on this site, yet nowhere else. Is it a case of " if you repeat something enough times it will become truth " ?
Intel's ramp up and process quality has been astounding since 90nm. Even there, the problem was Prescott and not the process which was excellent. Every assement, either by Intel through presentations at conferences or done by independent reviewers showed no issues.

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Originally Posted by -Boris-

Yields is always bad in the beginning of each processes, no news there. How can you possibly try to use this fact against AMD and GloFo?
Was Intel in equally deep :banana::banana::banana::banana: when their 32nm yields was bad? Is every company doomed every time they change a process?

EDIT: I don't think anyone would expect GloFos 32nm to be a mature process yet. That the yields isn't there they want them is what we expect at this point.

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Yields follow a preset curve on any process introduction and ramp up. The problem is, the 32nm SOI HKMG process isn't following the preset curve and deadlines. That's why 32nm products were pushed 6 months later.
So you're arguing a false dillema. The issue isn't that yeilds are bad at introduction ( which is normal ), but the processes schedules aren't met which inserts delays into products build on that process.

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Originally Posted by Florinmocanu

Nah, you got it wrong Savantu. The problem is not that you comment quite critically over some things going on at AMD/GF.

The problem is that we don't see you doing the same on Intel matters/threads. If you would be impartial and as hard on Intel as you are on AMD than nobody would care what your attitude is.

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Well, there are few things I can be critical with Intel on CPUs since their execution from the Cedar Mill/Presler generation has been excellent.
What else to complain ? The price ? Well, getting the best on time has a price.

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Originally Posted by savantu

Nice to know you read Intel's invest boards. Btw, your reply also speaks volumes about your professionalism since you attack the speaker and not his arguments.

You claim you have experience in IC design. Do you agree or disagree with Paul's assesement, irrespective of where his preferences lie ? You can also decline if you believe your cannot make this judgement based on your experience. Let's keep the signal up and noise down. Stick to the facts.




Let's get the fact straight. AMD 32nm products are delayed because GF has problems with the 32nm process. ( hardly unexpected given their SOI+gate 1st aproach )
Informal posts a comment about slide 17 from the GF presentation regarding Freq distribution of the parts and considers it evidence of a good process since most parts hit N+2 frequency. ( N being the expected median ).
At first I believed that too, as amateur I thought : " What's the fuss with GF 32nm since it yields above target bins ? " Then I saw a post by Paul who has 30 years experience in IC, both analog and digital, holds several patents for memories,etc and he explained clearly things aren't right.
Distribution should follow a gaussian pattern with a bell centered around the median.
And then you and Hans come and snide about everything but the actual argument. Target the argument and not the messenger rings a bell ?

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Investor board business is all about continuous harassment and spamming
FUD. If you are serious about the signal/noise ratio then you shouldn't post
from investor boards on an enthusiast site. There's no better way to ruin
people's hobby.

I won't be lured into discussing FUD. In case you're really taking this stuff
serious: This whole graph doesn't tell you anything: It doesn't give you
any frequency (10% faster or 0.01% faster?) It doesn't give you a sample
count (5000 samples and a smooth curve? or 50 samples an an irregular
curve?) It certainly doesn't tell you that the process is "out of control",
"the parts run very hot" Total bull.....

(ok now I see where the bananas come from:))



Regards, Hans

Yeah, nowhere in those slides there were anything about the curve not being gaussian. So it could very well be that the curve is expected at N but is at N+2.

Fmax may be "max frequency", that diagram means Fmax higher than expected. But we don't know whether there is a STRONG relationship between yield & Fmax.

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Originally Posted by savantu

That's why 32nm products were pushed 6 months later.

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Where does 6 month come from? Why are you saying "32 nm products" when it affects only Llano? Are you trying to make news just by repeating it many times? Dirk Meyer said that they postponed launch of Llano for "a couple of month" not half a year or anything you are implying. It is the only piece of "official" information.

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Originally Posted by savantu

Nice to know you read Intel's invest boards. Btw, your reply also speaks volumes about your professionalism since you attack the speaker and not his arguments.

You claim you have experience in IC design. Do you agree or disagree with Paul's assesement, irrespective of where his preferences lie ? You can also decline if you believe your cannot make this judgement based on your experience. Let's keep the signal up and noise down. Stick to the facts.

Let's get the fact straight. AMD 32nm products are delayed because GF has problems with the 32nm process. ( hardly unexpected given their SOI+gate 1st aproach )
Informal posts a comment about slide 17 from the GF presentation regarding Freq distribution of the parts and considers it evidence of a good process since most parts hit N+2 frequency. ( N being the expected median ).
At first I believed that too, as amateur I thought : " What's the fuss with GF 32nm since it yields above target bins ? " Then I saw a post by Paul who has 30 years experience in IC, both analog and digital, holds several patents for memories,etc and he explained clearly things aren't right.
Distribution should follow a gaussian pattern with a bell centered around the median.
And then you and Hans come and snide about everything but the actual argument. Target the argument and not the messenger rings a bell ?

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Well my friend, anyone from an opposition is hardly someone you would base your facts on. He is no god, plus works for Intel and thus has enough of a reason/ motive to spread FUD on a competitor and their work. Given that he doesn't work for AMD or GloFo or any associated companies, i wouldn't think he has much idea about the state of the process and its development at GloFo. One can make an educated guess, but that is what it remains and going forward should be treated as such.

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Originally Posted by sergiojr

Where does 6 month come from? Why are you saying "32 nm products" when it affects only Llano? Are you trying to make news just by repeating it many times? Dirk Meyer said that they postponed launch of Llano for "a couple of month" not half a year or anything you are implying. It is the only piece of "official" information.

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There's also some media report that 32nm Llano is just postponed 2 months, but I never saw them quote it.

http://www.xbitlabs.com/news/cpu/dis...ch_Issues.html

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Due to issues with 32nm silicon-on-insulator process technology, Advanced Micro Devices had to delay the launch of the highly-anticipated code-named Llano processor that combines high-performance x86 central processing unit with graphics processing unit on the same die. The company said that the postponement may be two months long.

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Quote:

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Originally Posted by tifosi

Well my friend, anyone from an opposition is hardly someone you would base your facts on. He is no god, plus works for Intel and thus has enough of a reason/ motive to spread FUD on a competitor and their work. Given that he doesn't work for AMD or GloFo or any associated companies, i wouldn't think he has much idea about the state of the process and its development at GloFo. One can make an educated guess, but that is what it remains and going forward should be treated as such.

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He doesn't work for Intel and btw, the laws of physics apply to any company. His "educated guess" is much more educated than yours or mine since it is backed by over a quarter of a century experience in semis.

Quote:

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Originally Posted by sergiojr

Where does 6 month come from? Why are you saying "32 nm products" when it affects only Llano? Are you trying to make news just by repeating it many times? Dirk Meyer said that they postponed launch of Llano for "a couple of month" not half a year or anything you are implying. It is the only piece of "official" information.

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What do you understand by "a couple of months " ?
1? 2? 3 months is a Q, he would have said so.

Llano was supposed to ship before Ontario.
Let's see :
-Ontario was planned for Q1 2011
-Llano was Q4 2010
Now :
-Ontario is Q4 2010
-Llano is "shipping for revenue" in H1 2011. Shipping for revenue != launch.

It doesn't take a genius then to figure out that BD is also affected by the delay, it's closely linked to the process and not in a vacuum.

Quote:

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Originally Posted by savantu

Well, there are few things I can be critical with Intel on CPUs since their execution from the Cedar Mill/Presler generation has been excellent.
What else to complain ? The price ? Well, getting the best on time has a price.

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lets see tigertown-dunnington-......beckton anyone? :D

T and D both slow, hot and only selling because of the brandname and Beck well it is released a year after date and not mind braking either looking at price/performance/power.

Quote:

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Originally Posted by savantu

What do you understand by "a couple of months " ?
1? 2? 3 months is a Q, he would have said so.

Llano was supposed to ship before Ontario.
Let's see :
-Ontario was planned for Q1 2011
-Llano was Q4 2010
Now :
-Ontario is Q4 2010
-Llano is "shipping for revenue" in H1 2011. Shipping for revenue != launch.

It doesn't take a genius then to figure out that BD is also affected by the delay, it's closely linked to the process and not in a vacuum.

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you have no idea and you will never know untill there is leaked accurate information (almost never), general public information (what you will read on the internet), FUD where all your comments are based on and what you spread since you lack the main source.

look at xbitlabs info: . It is not clear whether AMD has problems wedding the Llano design to the 32nm SOI fabrication process, there are issues with the process itself or the design of the Llano has certain flaws. In any case, the start of commercial shipments slipped by two months, according to AMD. They don't know either :D and 2 months is nothing.

Quote:

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Originally Posted by savantu

What do you understand by "a couple of months " ?
1? 2? 3 months is a Q, he would have said so.

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Between 1,5 and 3 month.

Quote:

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Originally Posted by savantu

It doesn't take a genius then to figure out that BD is also affected by the delay, it's closely linked to the process and not in a vacuum.

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BD was always supposed to launch after Llano on matured process.
Low yields could be a stop-factor for production of Llano as it is low-margin product. I don't see low yields affecting launch of BD at all, since it is a high-margin server chip.

Quote:

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Originally Posted by superrugal

There's also some media report that 32nm Llano is just postponed 2 months, but I never saw them quote it.

---

Original source of that info is "AMD Q2 2010 Earnings Conference Call". You can read it here:
http://seekingalpha.com/article/2147...all?part=qanda

So exact quotes of Dirk Meyer are

Quote:

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1. Llano production shipments are still expected to occur in the first half of next year.
2. So the effective change if you will doing our internal plans on Llano amounts to a couple of months.

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Anything past that is pure speculation.

At the same time that Dirk said Llano would slip by "a couple of months" he also said Bulldozer was still on track.

People are jumping to conclusions. And if you are going to do Llano math vs. Ontario, don't forget that Ontario was pulled in.

JF-AMD, are there any indications when we can expect launch of bulldozer ready chipset for am3r2 ? I can wait for a cpu,i have a decent six core, however new ddr3 mobo is in order for many still on am2.

Quote:

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Originally Posted by RaV[666]

JF-AMD, are there any indications when we can expect launch of bulldozer ready chipset for am3r2 ? I can wait for a cpu,i have a decent six core, however new ddr3 mobo is in order for many still on am2.

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he's the server guy and i think this information is under NDA for moment.:welcome:

Quote:

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Originally Posted by savantu

Yields follow a preset curve on any process introduction and ramp up. The problem is, the 32nm SOI HKMG process isn't following the preset curve and deadlines. That's why 32nm products were pushed 6 months later.
So you're arguing a false dillema. The issue isn't that yeilds are bad at introduction ( which is normal ), but the processes schedules aren't met which inserts delays into products build on that process.

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your post is so misinformative.

there is no preset function for yields v time or correctly defect density v time although generally they are logarithmic. ramp times accelerate with with moore's law. in fact, even intel fell behind in this metric because there 32nm ramped as fast as their 45nm process. that's not all that great for a process that's only 70% denser.

I have wanna to ask you all about the concept of "yield" since long time ago.
It means what? The defect rate? No, at least not only.
The yield problem is also include, the fab's efficiency, supplement, and so on. When talking about the YIELD, it maybe a very complex technical question. Unfortunately Dirk & other media didn't talk anything about that. All we can do is just wait.

Quoting Paul Demone from investor board,yikes :S. All I see there is he and terrace having back-patting match and dissecting GloFo's slides to find an inkling of "disaster",so that they can assure the rest how the process is screwed and the parts must be running hot(are you serious??).All this from a vague chart describing fmax without any usable information that could Paul in turn use to bad mouth it.But then again,Paul doesn't need a good reason does he?

PS Paul Demone post : The more I post,the lower the yields are!

Quote:

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Originally Posted by savantu

Well, there are few things I can be critical with Intel on CPUs since their execution from the Cedar Mill/Presler generation has been excellent.
What else to complain ? The price ? Well, getting the best on time has a price.

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You make things up, spin and pull out 6 year old quotes to attack AMD, but Intel is so awesome they can't possibly be doing anything wrong. You are a liar and offer nothing but negativity to these threads.

Quote:

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Originally Posted by Chumbucket843

your post is so misinformative.

there is no preset function for yields v time or correctly defect density v time although generally they are logarithmic. ramp times accelerate with with moore's law in fact, even intel fell behind in this metric because there 32nm ramped as fast as their 45nm process. that's not all that great for a process that's only 70% denser.

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The fact that GF is behind schedule with the process ramp by their very own admission is misinformation from my side ?
Interesting.

Secondly, there is no direct relation for yields and defects wrts to time. I don't know how you came up with that BS. The issue however are the deadlines set in the planning phase and the 32nm process failed to reach its intermediate deadlines.As for Intel's process it is obvious they did not target density. A conscious design choice doesn't make it great or not.

Quote:

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Originally Posted by informal

Quoting Paul Demone from investor board,yikes :S. All I see there is he and terrace having back-patting match and dissecting GloFo's slides to find an inkling of "disaster",so that they can assure the rest how the process is screwed and the parts must be running hot(are you serious??).All this from a vague chart describing fmax without any usable information that could Paul in turn use to bad mouth it.But then again,Paul doesn't need a good reason does he?

PS Paul Demone post : The more I post,the lower the yields are!

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You get the award for the least signal in your post and the most noise. GF by themselves admit there are issues and you spin it that it's Paul searching for a "inkling of a disaster". Paul interpreted the slide GF posted. You may like it or not, but at least try to come up with a shred of counter-evidence instead of turning it personal. But that's far more easier isn't it ?
I hope you'll wake up from your dellusion when in the next 3 months you'll see the 32nm products being officially delayed.

Quote:

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Originally Posted by MrMojoZ

You make things up, spin and pull out 6 year old quotes to attack AMD, but Intel is so awesome they can't possibly be doing anything wrong. You are a liar and offer nothing but negativity to these threads.

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Having a bad day ? Try for once to challenge what I say instead of poking in the air and throwing false accusations.

Quote:

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Originally Posted by savantu

Nice to know you read Intel's invest boards. Btw, your reply also speaks volumes about your professionalism since you attack the speaker and not his arguments.

You claim you have experience in IC design. Do you agree or disagree with Paul's assesement, irrespective of where his preferences lie ? You can also decline if you believe your cannot make this judgement based on your experience. Let's keep the signal up and noise down. Stick to the facts.




Let's get the fact straight. AMD 32nm products are delayed because GF has problems with the 32nm process. ( hardly unexpected given their SOI+gate 1st aproach )
Informal posts a comment about slide 17 from the GF presentation regarding Freq distribution of the parts and considers it evidence of a good process since most parts hit N+2 frequency. ( N being the expected median ).
At first I believed that too, as amateur I thought : " What's the fuss with GF 32nm since it yields above target bins ? " Then I saw a post by Paul who has 30 years experience in IC, both analog and digital, holds several patents for memories,etc and he explained clearly things aren't right.
Distribution should follow a gaussian pattern with a bell centered around the median.
And then you and Hans come and snide about everything but the actual argument. Target the argument and not the messenger rings a bell ?

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Professionalism? That guy called AMD supporters mouth breathers. What did Hans do, use an eye rolling smiley?

savantu trolling the forum posting his usual crap without ANY reliable sources is getting extremely annoying, there should be a rule against posting COMPLETE FUD without any remotely RELIABLE sources at all (hell even fudzilla is more reliable than savantu's sources :rolleyes: )...


all normal sources indicated that the bulldozer is on track; llano got delayed by a month (which is an extremely long time :rolleyes:) and that GF 32nm is on track (delay of a single CPU doesn't necessarily mean that the process is broken...)

All companies make bad decisions, and most of them good decisions. Both Intel and AMD have made heaps of good and bad decisions. So I have a hard time taking anyone seriously if he fails to point out any bad decisions one company makes, but see everything another successful company do as disastrous.

As long as Savantu is able to read disaster between the lines in every document referring to AMD I can't take him seriously. And I can definitely not see him as professional about the matter. Just as I can't do that with anyone doing the same with Intel or any other company.

It's OK to point out weak points and express some criticism, as long as it isn't all you do with one company but never do it with their competitors. And it's OK to try to read between lines and speculate, as long as you only read imminent doom and believe in your speculations as truth.


And I can agree with Savantu that some people fail to address his arguments sometimes. But that might be several reasons for that, one being that they just don't stand replying to arguments founded at pure imagination, they don't want to be trolled. Another reason might be that they just don't take him seriously anymore.

Quote:

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Originally Posted by savantu

... lots of now deleted stuff ...

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Can't be so. If it was sincere "I wanna know how it works", you wouldn't have got yourself banned twice from the news section, plus this

Fanboy is a fanboy, turd is a turd. Sometimes they are exact equal.

It's no surprise that there are the handful(5, I won't give names since all of us know them anyway, 3 of them are banned from here now) of people who always wreak the same havoc the second they enter to AMD threads.

Now i'm off. :)

Quote:

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Originally Posted by Calmatory

Can't be so. If it was sincere "I wanna know how it works", you wouldn't have got yourself banned twice from the news section, plus this

Fanboy is a fanboy, turd is a turd. Sometimes they are exact equal.

It's no surprise that there are the handful(5, I won't give names since all of us know them anyway) of people who always wreak the same havoc the second they enter to AMD threads.

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Could it be because there is no chance to actually discuss something here ? Whatever it is posted against the general perception is received with personal attacks only ? If we all agree on something ( like some AMDroids want ) the News section should be closed and some type of newsfeed put in place.

You mention 5 Intel fanboys, I can also count you at least 5 AMD ones which appear in every thread and act as the home guard. The moment you say something which goes against the "the green heaven", you're immediately pounded. There aren't AMD threads as there aren't Intel threads. That's nothing more than an imaginary wall to keep away any dissident thought. Well, sometimes I wish the people who jump with this BS should be beamed into "1984" to have a taste of their own medicine regarding "thought crime".

Quote:

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Now i'm off. :)

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Out and away also.

Quote:

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Originally Posted by savantu

The fact that GF is behind schedule with the process ramp by their very own admission is misinformation from my side ?
Interesting.

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the misinformation is your explanation of why it hasnt ramped yet.

Quote:

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Secondly, there is no direct relation for yields and defects wrts to time. I don't know how you came up with that BS. The issue however are the deadlines set in the planning phase and the 32nm process failed to reach its intermediate deadlines.As for Intel's process it is obvious they did not target density. A conscious design choice doesn't make it great or not.

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once again you show how little you know. i am not going to correct you because you would only use that knowledge to shill intel. just know youre wrong.

Quote:

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Originally Posted by savantu

Could it be because there is no chance to actually discuss something here ? Whatever it is posted against the general perception is received with personal attacks only ? If we all agree on something ( like some AMDroids want ) the News section should be closed and some type of newsfeed put in place.

You mention 5 Intel fanboys, I can also count you at least 5 AMD ones which appear in every thread and act as the home guard. The moment you say something which goes against the "the green heaven", you're immediately pounded. There aren't AMD threads as there aren't Intel threads. That's nothing more than an imaginary wall to keep away any dissident thought. Well, sometimes I wish the people who jump with this BS should be beamed into "1984" to have a taste of their own medicine regarding "thought crime".


Out and away also.

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Yeah, I agree. Ad hominems don't make an argument and should be moderated or ignored, IMO. But your whiny "but they do it too" Tu Quoque doesn't make for a valid argument either.

Some people might jump on your arguments because they are fanboys, but others jump on your arguments because they are wrong. Stick to the facts and don't resort to ad hominem attacks.

Quote:

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Originally Posted by Solus Corvus

Yeah, I agree. Ad hominems don't make an argument and should be moderated or ignored, IMO. But your whiny "but they do it too" Tu Quoque doesn't make for a valid argument either.

Some people might jump on your arguments because they are fanboys, but others jump on your arguments because they are wrong. Stick to the facts and don't resort to ad hominem attacks.

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i tink when dealing with a troll (like savantu), you should just ignore him (ignore lists). i don't know why all of you continue to feed the trolls. they keep spreading the same fud over and over, goading you into responding?

it would be like me saying SB wont come out until 2013 because intel is having problems.....as far as i know they are not but....its an example.

Quote:

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Originally Posted by god_43

it would be like me saying SB wont come out until 2013 because intel is having problems.....as far as i know they are not but....its an example.

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watchutalkinboutson?

Intel aint have no problem because they be rich.:p:

In all seriousness I highly doubt Intel will ever experience delays beyond 6 months due to their current management team and direction combined with their money

Quote:

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Originally Posted by AliG

watchutalkinboutson?

Intel aint have no problem because they be rich.:p:

In all seriousness I highly doubt Intel will ever experience delays beyond 6 months due to their current management team and direction combined with their money

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Beckton

Quote:

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Originally Posted by duploxxx

Beckton

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Larrabee

Quote:

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Originally Posted by Florinmocanu

Larrabee

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Tukwila

Quote:

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Originally Posted by savantu

.....
I hope you'll wake up from your dellusion when in the next 3 months you'll see the 32nm products being officially delayed.
...

---

Not nice to quote myself, but hey, I gave it 3 months, it only took 1 week. I should change my nickname to Nostradamus.


http://www.xbitlabs.com/news/cpu/dis...mmer_2011.html

Quote:

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A high-ranking official for Advanced Micro Devices said that the company would initiate mass shipments of its code-named Llano products in the first half of next year. Partners of AMD would start sales of systems featuring Llano - the hybrid processor that features x86 as well as graphics cores - in Summer 2011.

"Llano will start shipping in the first half or 2011, and products should be available in summer 2011," said Leslie Sobon, vice president of worldwide product marketing at AMD, in an interview with Inside Hardware web-site.

---

Quote:

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Originally Posted by sergiojr

Between 1,5 and 3 month.

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Apparently they are 6+.

Quote:

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BD was always supposed to launch after Llano on matured process.
Low yields could be a stop-factor for production of Llano as it is low-margin product. I don't see low yields affecting launch of BD at all, since it is a high-margin server chip.

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Yeah, Llano being delayed for 6 months has no impact whatsoever on BD. Apparently AMD forgot how to make a shrink of the K10 core but everything if fine with BD.

Quote:

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Originally Posted by sergiojr

Original source of that info is "AMD Q2 2010 Earnings Conference Call". You can read it here:
http://seekingalpha.com/article/2147...all?part=qanda

So exact quotes of Dirk Meyer are

Anything past that is pure speculation.

---

Indeed. :yepp:

Quote:

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Originally Posted by generics_user

savantu trolling the forum posting his usual crap without ANY reliable sources is getting extremely annoying, there should be a rule against posting COMPLETE FUD without any remotely RELIABLE sources at all (hell even fudzilla is more reliable than savantu's sources :rolleyes: )...

all normal sources indicated that the bulldozer is on track; llano got delayed by a month (which is an extremely long time :rolleyes:) and that GF 32nm is on track (delay of a single CPU doesn't necessarily mean that the process is broken...)

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If you have a spine, better show it. Not that I expect you to have one...

Quote:

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Originally Posted by god_43

i tink when dealing with a troll (like savantu), you should just ignore him (ignore lists). i don't know why all of you continue to feed the trolls. they keep spreading the same fud over and over, goading you into responding?

it would be like me saying SB wont come out until 2013 because intel is having problems.....as far as i know they are not but....its an example.

---

Apparently, the only ones spreading FUD is you and other of your kind with green lenses. No problem that they are green, the problem is to have something behind the lenses to actually process the information.

When executive talk about small issues, take note, because they are massive. If they are massive, they are already bailed out ( Henry Richard ).
Some are so gullible that they fail to understand the double nature of executive talk.

AMD late again?

http://www.xbitlabs.com/news/cpu/dis...mmer_2011.html

Geez, who would've thought something like that might happen. LOL....If it was my company, heads would roll.

Quote:

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"Designing and selling to our customers is well underway, since it takes 12 to 18 months for notebook products to hit the market.

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This doesn't mean that desktop models will be summer 2011.IF motherboards hit the market in Q1 2011,CPUs will follow very soon after that. Notebook segment will be covered by Ontario anyway,since we now know there will be 1.6Ghz Dual core version (18W) for mainstream notebook segment.

Quote:

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Originally Posted by freeloader

AMD late again?

http://www.xbitlabs.com/news/cpu/dis...mmer_2011.html

Geez, who would've thought something like that might happen. LOL....If it was my company, heads would roll.

---

QFT

cumon AMD...

It's hard to believe that the ATI and AMD are actually the same company now. Such differences in ability to deliver...

Quote:

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Originally Posted by generics_user
all normal sources indicated that the bulldozer is on track; llano got delayed by a month (which is an extremely long time ) and that GF 32nm is on track (delay of a single CPU doesn't necessarily mean that the process is broken...)

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BD will come to market before Llano--> delay Llano !

Quote:

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Originally Posted by savantu

Not nice to quote myself, but hey, I gave it 3 months, it only took 1 week. I should change my nickname to Nostradamus.

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:yawn2:

None of that^^ changes the fact that you are a troll.

Quote:

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Originally Posted by savantu

Not nice to quote myself, but hey, I gave it 3 months, it only took 1 week. I should change my nickname to Nostradamus.

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to Trollidamus maybe? :rolleyes:

Where you see any delay? They told many times that they put Llano after Ontario and they keep at this schedule. AMD told more than year ago that LLano scheduled for 2011:

SUNNYVALE, Calif. --11/11/2009
...
AMD 2011 Roadmap Overview

Quote:

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Originally Posted by SEA

to Trollitamus maybe? :rolleyes:

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As always, where reason stops, it turns to personal attacks.

Quote:

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Where you see any delay? They told many times that they put Llano after Ontario and they keep at this schedule. AMD told more than year ago that LLano scheduled for 2011:

SUNNYVALE, Calif. --11/11/2009
...
AMD 2011 Roadmap Overview

---

That's your :banana::banana::banana::banana:ing delay, right there.
Llano was supposed to ship for revenue in Q4 2010 and launch Q1 2011. Now it is shipping for revenue in H1 2011 and general release is summer ( that is Q3 2011 ).
A 6 month delay.

Quote:

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Originally Posted by savantu

Apparently, the only ones spreading FUD is you and other of your kind with green lenses. No problem that they are green, the problem is to have something behind the lenses to actually process the information.

---

Quote:

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Originally Posted by savantu

As always, where reason stops, it turns to personal attacks.

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Pot vs. Kettle? :D

An Intel *fan* posting non-stop negativity in AMD threads (isn't this against forum rules? :confused:) calling AMD fans too stupid to process information is complaining about personal attacks. I love it. :up:

Hmm H1 is still Q1/Q2 2011?

Or does AMD has some odd fiscal year?

Quote:

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Originally Posted by MrMojoZ

Pot vs. Kettle? :D

An Intel *fan* posting non-stop negativity in AMD threads (isn't this against forum rules? :confused:) calling AMD fans too stupid to process information is complaining about personal attacks. I love it. :up:

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Only when they have no baisis.

Quote:

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Originally Posted by Hornet331

Only when they have no baisis.

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So its okay to make negative comments in AMD threads based on pure conjecture, but anyone saying something positive about AMD in an AMD based on hopes for the best is an idiot.

Score one for hypocrisy I guess. :shakes:

Quote:

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Originally Posted by Hornet331

Hmm H1 is still Q1/Q2 2011?

Or does AMD has some odd fiscal year?

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maybe they adopted the Valve calender?

Savantu, Ontario was pulled in.Maybe comments on this ? How is it that you only comment on worst possible things about AMD, and even then you only pick worst case scenarios ?
Based on your thought process i could say, sandy bridge will ship somewhere in march (Q1) , will NOT be overclockable AT ALL (hey, i dont have to point out the K series, im still stating facts) ,and IGP will have performance probably around 3 year old AMD IGP`s (picking 6EU parts) ,and oh it has TERRIBLE software support.Basically the image it would present is that sandy will be late, non oc-able, and performance will be sub par.
Jesus, people, at least try being a little bit objective.BTW, the thread is about bulldozer, not Liano.

And where did you get this "summer 2011" figure ? Because H1 ends in summer ? christ.

Quote:

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Originally Posted by MrMojoZ

Pot vs. Kettle? :D

An Intel *fan* posting non-stop negativity in AMD threads (isn't this against forum rules? :confused:) calling AMD fans too stupid to process information is complaining about personal attacks. I love it. :up:

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Huh ? My remarks are pretty civil and I refrain my name calling and other stuff. Strictly following the rules compared to what I get.

Quote:

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Originally Posted by MrMojoZ

So its okay to make negative comments in AMD threads based on pure conjecture, but anyone saying something positive about AMD in an AMD based on hopes for the best is an idiot.

Score one for hypocrisy I guess. :shakes:

---

I must be good in conjecture since somehow, AMD proves me right. But somehow, you are hypocrisy-free when even if my prediction was proven right, you portray it as "negative comments". Is this a denial-of-reality syndrome ?
It isn't negative when later things prove you right, it is being objective. i'm still waiting for your friend, god_43 to answer.

Quote:

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Originally Posted by RaV[666]

Savantu, Ontario was pulled in.Maybe comments on this ?

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The whole problem started with GF 32nm process. GF and the IBM club use a gate first approach which is more problematic to control than the gate-last approach used by Intel. Gate-last requires more restrictive design rules, but if you can live with that, it is doable as Intel proved and offers similar performance if not better than gate-first.

When AMD designed Bobcat, they targeted the low power stuff, basically using small die CPUs for low power consumption and not cherry-picked mainstream large die ones.
AMD choose TSMC because they have experience with bulk ( ATI ) and it is probably far cheaper than GF ( who's FABs are underutilized ). Low cost and low price as with the intended markets, TSMC was the better option.

Not unexpectedly, GF hit problems with the 32nm stuff. Since now, AMD depended with Llano on an external partner, they decided to transfer engineering resources from Llano ( since it is delayed anyway by the FAB issues ) to speed up the validation of Bobcat. That's why Bobcat was pulled in. Llano is probably more or less ready ( it taped out in Q1 ) , but waiting for the fab to solve its issues.

Quote:

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How is it that you only comment on worst possible things about AMD, and even then you only pick worst case scenarios ?

---

How are they worst case when I'm proven right by AMD ?!
Did Llano get a significant delay ? Yet it did. Check.
Did Bobcat turned quite high power compared to Atom ? Yes it did.
Is AMD lacking any close to 1w solution for smartphones ? Yes they do.

Quote:

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Based on your thought process i could say, sandy bridge will ship somewhere in march (Q1) , will NOT be overclockable AT ALL (hey, i dont have to point out the K series, im still stating facts) ,and IGP will have performance probably around 3 year old AMD IGP`s (picking 6EU parts) ,and oh it has TERRIBLE software support.Basically the image it would present is that sandy will be late, non oc-able, and performance will be sub par.
Jesus, people, at least try being a little bit objective.BTW, the thread is about bulldozer, not Liano.

---

All could very well be true. If you're proven right, you were objective and I was a day dreamer. But if I'm proven right, will you respond in kind ?

Quote:

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And where did you get this "summer 2011" figure ? Because H1 ends in summer ? christ.

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AMD lady said it ""Llano will start shipping in the first half or 2011, and products should be available in summer 2011," said Leslie Sobon, vice president of worldwide product marketing at AMD, in an interview with Inside Hardware web-site. "

Quote:

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Did Bobcat turned quite high power compared to Atom ? Yes it did.

---

That depends, when you take into account Atom performance, and whole platform power consumption, then no.
Bobcat will have higher performance per watt than atom.
And realistically, very low power atoms arent used anywhere,or almost anywhere.And AMD isnt competing with that almost non existing segment.
I mean really, what would you rather buy, Dual core pinetrail (still iunreleased i think) Atom 8.5W netbook ,or 9W Bobcat ontario one ?

Quote:

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All could very well be true. If you're proven right, you were objective and I was a day dreamer. But if I'm proven right, will you respond in kind ?

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I dont really believe it will be that bad (although bclk limitation looks serious, all hope in mainboard vendors).Im just trying to get to you the fact that taking worst case scenarios isnt objective.

Youre telling about higher power draw than a low end atoms (you dont pick the ones with comparable TDP yet worse performance).Thats not objective.It looks like AMD has one die ,and theyre making what they can with it, at this moment it looks like nettop/netbook/tablet segment.And thats where the fight is.Not in the smartphone one, where ARM has pretty much all the market share, and it wont change in the near future ,be it with intel or amd chips.

Quote:

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AMD lady said it ""Llano will start shipping in the first half or 2011, and products should be available in summer 2011," said Leslie Sobon, vice president of worldwide product marketing at AMD, in an interview with Inside Hardware web-site. "

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If thats true, than its a 6 month slip, thats bad.Would be better tho if there was some official document about that tho.
By products he can mean whole notebook lineup too, chips itself can come sooner.

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Originally Posted by savantu

Where you see any delay? They told many times that they put Llano after Ontario and they keep at this schedule. AMD told more than year ago that LLano scheduled for 2011:
That's your :banana::banana::banana::banana:ing delay, right there.
Llano was supposed to ship for revenue in Q4 2010 and launch Q1 2011. Now it is shipping for revenue in H1 2011 and general release is summer ( that is Q3 2011 ).
A 6 month delay.

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No arguments anymore and you started playing with words? :)
You are trying to assign new meaning for word "put".
After this you really should not take offense for Trollidamus... :rofl:
AMD created schedule for themselves where they put (=placed, not moved) different products in different order. Initially. They did not move the order.

Too many people are making too many predictions about things that they do not have all of the data on.

Leslie's comments stand.

If people want to get into an argument about products shipping on time, I believe it is best to make sure that their houses are clean first. There have been plenty of "schedule changes" over the years from both houses.

This arguing is getting tiresome.

It might be helpful if people posting had to identify who their employers were and what was in their stock portfolio.