discuss:
http://www.tcmagazine.com/comments.php?id=20790&catid=2
Printable View
blurry pics
Looks like the 45nm's will be more fun than these 65nm, that's for sure. Unfortunately they still can't crunch like Intel can. Overclocked to 3.4GHz, that 45nm Phenom almost does what My C2D does at its 24/7 OC of 3.2GHz. My poor 9500 can't touch my C2D. Then, when I push it to the max @ 3.6GHz, the C2D runs SP1M @ 15.954s and it's light years away. This isn't to ignite a flame war, just stating facts...which I can do because I own both of them and am not just talking smack. :)
amd needs to release all their big guns now
Very true, 12% on a cach dependent bench with three times the cach. Not amazing ipc but if they get say 6-10% ipc, 200mhz clock all with a bit less power then AMD could still be completive at the low-medium end.
To the fanboys, Please don't hype this for AMD. You set expectations of greatness and when they do a good job and get a good bump it looks disappointing.
It's a C0, the C1 revision is supposed to clock much higher :)
Fair enough. Let's compare multi-threaded. At my summer overclocks (9500 @ 2.4GHz and E4400 @ 3.1GHz), when Folding@Home with the SMP client (on project 2665 if you're familiar with F@H), the C2D beats the Phenom by right at 100 points per day. When taken in context with the amount the Phenom produces (~1250ppd with that project), the C2D beats it out by 8%.
Alternatively, on a different project (2653), the 9500 reverses that and beats the C2D by 100ppd. Unfortunately, the average production is higher (~1850ppd), so even when the quad core beats out the dual, it's only by 5.4%.
This could be an incorrect assumption, but I'd think having two more cores crunching should out-do a 700MHz overclock advantage. When you consider a Q6600 can OC just as far (and more) as my E4400, Intel is just superior when it comes to crunching.
All of this is not to denigrate AMD, just prove my earlier point that they have work to do. I want AMD to come out ahead. I like their product and their company. I especially like that their unlocked multipliers don't cost over a thousand bucks. This 9500 build is the first AMD for me and it has made me a fan; I like the 'feel' of it, if you will and believe it or not, I like the challenge of their overclock even if it's not as far as I'd like. They've got their work cut out for them...and I'll be rooting for them all the way! :yepp:
Best I can think of right now to quantify "every day" would be the WinRar benchmark. There are obviously other factors in this bench besides CPU, but it's all I can think of. The C2D system in my sig @ 3.0GHz (haven't run it at 3.1) gets 647KB/s and it takes 2min34sec to process 100MB. The 9500 @ 2.4GHz gets 505KB/s and it takes 3min18sec to process 100MB.
BTW folks, now I'm just answering questions. I feel the need to reiterate I like my AMD rig. :buddies:
hmmm
Heh, ok...that definitely says something is wrong. Unfortunately I have no idea what it is. :(
Running @ 240 x 10, HT Multi @ 9x (highest), RAM @ 398MHz & 4-4-4-15. Moderately fresh install of XP Pro, nothing on it really except anti-virus (avast), firewall (zone alarm) & F@H. :shrug:
tlb fix?
finally phenom has broken 20s Pie
http://www.itocp.com/attachments/mon....jpg.thumb.jpg
Not that it matters that´ much, also nice seeing it done at around 266 bus ;)
Unfortunately not. The TLB is enabled in BIOS. I also downloaded the TLB fix by sam2008 just in case XP SP3 did something it shouldn't have. Other than benching, the system is running optimally. See this SS for how it's set up (the fold just got under way b/c I restarted to verify BIOS settings and to raise my OC back up to 2.5GHz).
Sorry OP, I'm done derailing, many apologies. If anyone sees anything out of whack, please PM me and let me know. :shrug:
That explains it! I have an old version of Winrar. Very good observation; I didn't even know they had implemented that. With the OC reduced to 2.4GHz (PWM was getting toasty), it now gets 1655KB/s & processes 100MB in 1min1sec. By comparison, the C2D rig gets 1,253KB/s & processes 100MB in 1min20sec. Thanks for pointing that out! :up: Now to figure out why F@H doesn't crunch better...
OP I must apologize again, this was not meant to turn into a derailment. If you want, feel free to have an admin delete my posts from Winrar on; I won't be offended. While SP might be moot b/c of its single-threadedness (no, that's not a word), I still stand by the F@H issues. Carry on. ;)
That sounds better,... I got 1882kbs @ 2.9ghz 2400mhz NB on the 9850BE
For AMD, that's good, (even though it is a pretty pointless benchmark IMO :p:). I'm looking at CPUZ though and hoping that either it is misreading the voltage or that the retail chip will not need such a huge amount, 1.568V :eek:
hokiealumnus, as far as F@H being slower on AMD compared to intel, I've heard it said that it is because F@H uses the intel compiler, and the intel compiler just simply isn't as 'friendly' to AMD CPUs. Now that's just what I've heard someplace, don't know if it is true or totally way off :shrug: Probably more due to architecture design differences probably, I know the A64 did better at F@H than the P4 did, by quite a bit (though netburst just sucked overall lol) because of that.
I wonder where they got that sample from. Can even be an separated model from binning, which would explain the high voltage requirements for 45nm.
Super Pi 1m does not say much about stability, but a +10% boost in that benchmark looks good.
The results in terms of voltages and frequencies look similar to 9950BE's on the edge. Good to see the chip can handle high voltages at 45nm. I think they did not look for the lowest possible voltages they simply started at 1.225V.
It's a nice glimpse, but to reason anything beside an speed boost in super-pi out of this preview is useless.
SuperPi needs to DIE. Vanilla FP instructions are used about as much in real applications that are processor intensive as nails are to build a space shuttle. SP doesn't use MMX, SSE, or 3DNow. It's straight ghetto x87.
Hi, hokiealumnus Well I'm quite bussy with folding and I can tell you that the multi core client for folding, isn't doing much intercore communication.
It's not like the ps3 client that does do a litle bit of work on each spu.
the folding multicoreclient behaves like a client that can work on a grid of computers, so it doens't need the big intercore bandwith (it's not like the intel intercore communication is as slow as ethernet ;)) That's why folding smp needs the MPI service for multicore! So phenom will only outperform Core 2 if folding would implement somthing like the ps3 core, but that doens't make much sens for a normal x86 cpu.
greetz
this is on a MSI K9A2 platinum if anyone was wondering and with :banana::banana::banana::banana: ram
http://www.techpowerup.com/img/08-07-11/g.jpg
This makes complete sense, thanks for that.
I should point out that the F@H results I was quoting were from Windows XP 32-bit. I have been having issues with Ubuntu (64-bit) and this rig, but when it actually folds right, it gets significantly higher ppd. It's been a while since I tried (trying again and typing from Ubuntu now), but IIRC project 1753 got ~2,200ppd, which beats the C2D by just over 300 on that project. I guess it just needs the right application to take advantage.
I guess the conclusion one can draw from this is that the C2D/C2Q platform isn't necessarily better (when ignoring the overclock potential of course), it's just different. Were more applications tailored specifically to AMD's architecture and not to Intel, we may see the reverse happen and Phenom beat Core2.
So, this has helped me learn some about why my Phenom isn't as bad as I thought. Thanks for everyone's input. I feel slightly better now. :up:
Now, let's all continue to cheer on and support AMD. They'll get over the hill and beat Intel again; they have before. 3.4GHz (even if at insane Vcore for a 45nm chip) is a definite step in the right direction. Go AMD! :clap:
Very nice to see that oc on a SB600 system. One can only speculate how well these chips will oc on a SB750 system if everything that has been shown is accurate.
Who cares about SPi? Personally I could give a rats ass about pretty much every benchmark out there and benchmarking in general. The only time I run them is when Im first setting up my overclock to test for stability and some additional minor tweaking as needed and maybe the occasional reference of scores to my own systems in the past to see how things have come along (first system I had scored 5300 on 3DM01) on systems that Ive built.
Now fast forward 6 months later on a fragmented hard drive and see how windows is performing doing every day things, file transfers and program opening etc. Thats all I really care about.
don't folding clients vary???
anyways... I know I seen a few where phenom was higher then core 2 quads like two of three of them but when there 7-8 lost no one took time to see why it won the others.
how so? pi is all about low latency & bandwidth from cache & system memory. example 1mb l2 has about 200 mhz advantage vs 512kb cache, assuming ram timings & speeds are exact( on amd ). how's it unrealistic? wasn't so bad years ago when amd was spanking intel in that app. ( unless you had a pentium m, wich was on par, if not exceeding amd in more than just pi ) you need to talk to the super pi god, aka one page book ( opb ).
super pi may seem inaccurate because all the sudden we have hardware that has implimented micro ops fusion & can do calculations in a sinch. it's called, progress. so is 3d mark '01 useless? every bench has it's place, even synthetic.
Why is it taking 1.56v to hit 3.4ghz on 45nm when we can do it at about 1.4-1.5v on 65nm?
I have a 9950 this took 1.48v.....cpuz shows that +.025.
http://img.techpowerup.org/080712/3.48ghz.jpg
I would think theyd be doing that at 1.45v or something?
Well again it is first run silicon, which does tend to need more "oomph" to run, so to speak. Nice overclock on that 9950, is that 100% stable or just a quickie run?
Definitely not 100% stable I set a goal of not going over the 1.48v setting in the bios and thats how high it went. it completed super pi but it wouldnt finish 3dm06. the highest I got that let me play games run 3dm06 and super pi was 3.34ghz.
heres the thread with my overclocking results results start on post 100
http://www.xtremesystems.org/forums/...d.php?t=194058
Folding on the GPU allows for 4 PCIe cards on the 790fx boards
4 cpu cores for 4 vga cards
I see some people running 240 bus speed.
I cant do more than stock 200 with my 9850,9850,9950 but did 275 with my
6400BE
So that is a mobo issue i guess when it comes to the Quads ?
if you have low winrar scores remove everything USB from your platform, This means any memory sticks, mouse, keyboard etc and try again...all my issues with this bench were usb related.
SuperPI isn't useful in the context of a general performance indicator benchmark. The reason for this is that SuperPI uses only x87 instructions to do its workload. This was a good test long ago, but the trend has been for any computationally intensive program to use optimizations--substituting vanilla x87 instructions for MMX, SSE, SSE2, 3DNow, etc instructions wherever possible. In the context of modern applications (at least for five years now), many if not most or all of the popular compilers and frameworks utilize these special instructions without the programmer even knowing about it. This includes C, C++, CLIs (like C#, J#, and VB.NET), etc. A developer basically has to explicitly decline the use of optimizations or write their code in ASM to develop an application that will stress the same pipeline as SuperPI. Because of this, testing only x87 instructions isn't going to be a good indicator of general processor performance. Relatively few (if any) applications a user is likely to actually run will be using the same pipeline so heavily. Since performance of a processor is different when using SSE, MMX, etc and x87 instructions, a valid transposition between the results we see is impossible. However, if you just want to see how fast a handful of x87 instructions are between processors, by all means use SuperPI. It would be a valid indicator of that. That's just not the context we user SuperPI in, which is why it isn't a good choice or indicator.
For similar reasons, this is why 3DMark06 isn't a good benchmark to run anymore. 3DMark06 is more processor intensive than most modern games. The ratio between CPU and GPU power yielding increased framerates in these modern games is much different. You could call 3DM06 CPU-colored, as its score will increase unrealistically with increased CPU power. You will not experience quite so drastic of framerate increases in real (modern) games as it would seem to indicate.
I've never really understood the 3d06 criticism. When the latest version came out, no one said anything, but when Intel releases faster GPUs it becomes a more CPU-intensive benchmark...that doesn't make any sense to me. Games scale like 3d06...it all depends on how you test CPU scaling in games. Not to mention, every game scales differently, how on earth can you just say ''games'' like they all scale the same with higher CPU frequency :shrugs:
Perkam
its not hard to push over 240 this is on my K9A2 platinum
http://img.techpowerup.org/080714/Ca...2-20080714.png
thats my 24/7 speed
maybe its just a DFI issue :shrug:
Maybe its just the Issue of Phenom not interacting well with High HT when will you folks come to terms with this?
Every game's ratio is unique, but it doesn't take a genious to see a general shift of trends (in games that people give a crap about at least, I won't pretend to be familiar with ALL games ever made).
I will elaborate a bit on some of the possible reasons for this. Modern games using modern features tend to do more work on the GPU instead of the CPU. Newer games also tend to try and delegate work to threads instead of just running entirely on one. These kinds of trends decrease the importance of how fast a single, given core is. 3DMark06 pre-dates the level of threading and offloading that modern A, AA, and AAA titles have.
the k9a2 tops around 2400 NB/HTT if on a 9850BE that means 240 for the HT for a 9500/9550 that means into the 250's - 260's HT to reach 2400 NB/HTT overall because the multi starts at 1,800 instead of 2,000 on 9850BE
Hey Hokie... Even EA6's winrar scores are a little weak.. ;)
The X4 needs alot of finesse which in my opinion only makes it more fun!
Here's my Winrar score:
Clickable
http://i30.photobucket.com/albums/c3...715_Winrar.jpg
Just wanted you to know the ~1850 wasn't a fluke.. :up:
BTW: Achim, that is with an ULTRA USB Hub/Card Reader attatched, so far I haven't seen any ill effects from it..
Winrar loves 1066MHz ram. :) Nice score Dave!
If it made only a second of difference, I'd have to say whoever made the SSE version did an exceptionally :banana::banana::banana::banana:ty job.
I don't just say this as a speculating user. I say this as a programmer for the last decade.
wow... well if ur such a good coder ... make it better than a second improvement. sse2 is the code.
http://www.xtremesystems.org/forums/...42&postcount=2
tell craig how crappy of a job he did. you are a jerk.
edit
http://i4memory.com/AMD64_tools/supe...er_pi_SSE3.zip
the sse3 version takes of 2 seconds off of the sse2. so that's 3 seconds. ran it right now with all my apps running.
1 or even 3 second(s) off of a 33 second run is pretty good, what did you expect 5? does not scale the way YOU are thinking
Jeez isn't that 1.55v a little too much for a 45nm chip (on page one?)
JM
i think it's cuz the sb600 thingy. maybe a long shot?
i doubt it i just went froma SB600 to a SB700 board and they both needed the same volts at the same speeds
And you say I am the jerk. :down: :shakes:
If you want a good example of the kind of performance increase SSE-enabled apps provide, take a look at ffdshow. It's easily 20% quicker. 1 second off of a 33 second run is a 3% improvement. The workloads aren't identical and thus they aren't directly comparable, but you get the idea. Pfft. Ten years of MMX and SSE development hasn't brought us a 3% increase in performance for floating point workloads. You aren't even a programmer. How can you possibly think you're qualified to criticise my opinion in any kind of valid way? You just jump all over me about how I'm a terrible person for suggesting an SSE enabled program possibly isn't up to snuff.
If you just don't like me for some reason, that's fine, but please PM me about it instead.
I'll give you that one. And the three seconds or so savings is more like I'd expect. :)
ok .... are you gunna encode sse 3 pi with milliseconds? you should..
just some random thoughts
the 45nm is ~3s quicker than the 65nm posted by someone on here, when there both in the 3.4ghz range, thats great to know that extra cache is working wonders. looks like 10% more power with the die change, this might be enough to make it equal or beat the intels on real thinking applications
dont know why, but i like 3dmark06 cpu bench, its an easy way to see about how much more powerful cpu to cpu comparisons are. that and cinebench, i think is where people should do much more comparisons instead of pi.
when it comes to cpu scaling in games, the reality is everyons computer is different, and they have adjustable settings to fix that. i just play with fog or shadows or max viewable distance until i find out which is the real bottleneck. i play Grid at 1920x1200 with max textures and lighting, but couldnt care less about how much smoke a burnout does, or how the shadows from trees look. so to me it looks just as good as everything being maxed out, cept 40-60fps. but benchmarks have a standard and i wonder how much higher people could score in 3dmark06 if they were running it to be less cpu dependent. i have a 2900xt and 5000+BE, so for me 11k pts on vista is great, but if i drop in a 4870x2 and get only 13k, does that mean i wasted 500$ for 15% more performance, or does it mean i should tweek it so that my 80$ cpu isnt holding me back any, and then compare how i should see up to 300% increase by swapping the cards.
*randomly streamed thoughts ended*
Agreed. 3DM06's results for my single vs. crossfire examination didn't reflect what I was seeing in real games like HL2, Crysis, Company Of Heroes, etc at all.
dont worry i dont dwell on it at all, i like using benchmarks to see the before and after of my overclocking. even if they arnt perfect they are much more reliable across reviews as they have standards. if i depended on a site to tell me what kind of fps i can expect when i go pick up the next big game, like fallout 3, i would just go to futuremark and compare to the 1000 people who have systems like me, instead of going to site after site looking for one that might be close and hope they did a good test.
back on topic, does this 45nm version seem to be WAY better than the 65nm by comparing these to screens
45nm
http://www.xtremesystems.org/forums/...7&postcount=16
65nm
http://www.xtremesystems.org/forums/...1&postcount=35
Dated 0821... so they had these chips sometime in May?
Perhaps they found some problems with the SB750 and these 45nm chips and that caused a further delay with the SB750 release?
AND: It would be VERY cool if they sent out 45nm ES samples to testers at the same times as the SB750 becomes available.
(Just some random thoughts... based on nothing but speculation.)
Check this out. (translated)
The early C0 stepping has 24W lower power consumption on full load than B2 at the same voltage. :)
Clearly, this Deneb sample is showing a definite improvement over the current Phenoms clock-for-clock, at least in SuperPi. The biggest question though, at least to me, is whether or not this additional performance (seems to be ~14% or so) is caused because of the additional cache or if there were other significant improvements made.
Unfortunately, because all the current Phenoms use the same amount of L3 cache, it makes a direct comparison of the effect of additional cache almost impossible. However, K10 is largely based on the pre-existing K8 architecture, and there were Athlon X2 varieties with 512kb/core and 1024kb/core cache sizes. The benefit from the additional cache could serve as an indication of what to expect from adding cache to Phenom.
Here's the first run with the 5000+ (512kb cache) @ 3.3GHz: (Originating thread)
http://img.techpowerup.org/080627/33...ith%20sp1m.png
Another run has an overclocked Athlon X2 6000+ (1024kb cache): (Originating thread)
http://img88.imageshack.us/img88/5223/spizg6.jpg
For a K8-based processor, going from 512kb to 1mb of cache results in a speedup of 1.118 seconds or about 4.3%. But, the difference in bus speed between the two is about 4.67%, which is also going to effect the result as well. Taking that into account, the difference in SuperPi times from 512kb additional cache on a K8 is probably less than 4%.
The additional cache didn't do much at all for the K8 architecture, so a similar effect should be seen on K10. While it's true that there's no Phenom models with varying levels of cache, there was the whole TLB bug issue. Although the BIOS workaround patch doesn't disable the L3 cache entirely, one of the effects was a large increase in memory latency:
http://www.techreport.com/r.x/phenom...9600-notlb.gifhttp://www.techreport.com/r.x/phenom...00-withtlb.gif
If the SuperPi dataset is filling Phenom's cache @ 2mb, then there has to be some main memory access involved. I've read that SuperPi is very sensitive to latencies, so this should be very obvious in the results.
http://www.techreport.com/articles.x/13741/2Quote:
Originally Posted by Tech Report
So if the 2mb of L3 cache isn't big enough for SuperPi, we should see a difference that is much greater than 10% from enabling the TLB patch:
http://img168.imageshack.us/img168/1839/superpi1us7.jpg
(Source)
The 9600BE only suffered a 3.9% performance penalty from the TLB patch, not even close to the 10% mark. To me this suggests that the additional cache would not have a huge effect on SuperPi at all, and certainly not the 14% increase that this test would suggest. If the speedup isn't due to the cache size, that means tweaks were made to other parts of the core or cache subsystem as well. So it's possible that Deneb could be a nice improvement over Agena, perhaps even in applications that aren't cache dependant.
Nice first post there resar!
Also Deneb features a 48-way set associative cache compared to Phenoms 32-way. Now what ever that means, maybe its faster?
But seeing that the faster lv1 and lv2 cache has even fewer n-way cache, it should be slower with higher n-way cache.
http://img2.zol.com.cn/product/21_45...g9YhvctxrY.png
http://img2.zol.com.cn/product/21_45...hgJ2qLz0IU.png
Nice find...
Found that about cache associativity. Taken from wiki: http://en.wikipedia.org/wiki/CPU_cache#Associativity
The replacement policy decides where in the cache a copy of a particular entry of main memory will go. If the replacement policy is free to choose any entry in the cache to hold the copy, the cache is called fully associative. At the other extreme, if each entry in main memory can go in just one place in the cache, the cache is direct mapped. Many caches implement a compromise, and are described as set associative. For example, the level-1 data cache in an AMD Athlon is 2-way set associative, which means that any particular location in main memory can be cached in either of 2 locations in the level-1 data cache.
Associativity is a trade-off. If there are ten places the replacement policy can put a new cache entry, then when the cache is checked for a hit, all ten places must be searched. Checking more places takes more power, area, and potentially time. On the other hand, caches with more associativity suffer fewer misses (see conflict misses, below), so that the CPU spends less time servicing those misses. The rule of thumb is that doubling the associativity, from direct mapped to 2-way, or from 2-way to 4-way, has about the same effect on hit rate as doubling the cache size. Associativity increases beyond 4-way have much less effect on the hit rate, and are generally done for other reasons (see virtual aliasing, below).
In order of increasing (worse) hit times and decreasing (better) miss rates,
* direct mapped cache -- the best (fastest) hit times, and so the best tradeoff for "large" caches
* 2-way set associative cache
* 2-way skewed associative cache -- "the best tradeoff for .... caches whose sizes are in the range 4K-8K bytes" -- André Seznec[2]
* 4-way set associative cache
* fully associative cache -- the best (lowest) miss rates, and so the best tradeoff when the miss penalty is very high
If each location in main memory can be cached in either of two locations in the cache, one logical question is: which two? The simplest and most commonly used scheme, shown in the right-hand diagram above, is to use the least significant bits of the memory location's index as the index for the cache memory, and to have two entries for each index. One good property of this scheme is that the tags stored in the cache do not have to include that part of the main memory address which is implied by the cache memory's index. Since the cache tags are fewer bits, they take less area [on the microprocessor chip] and can be read and compared faster.
One of the advantages of a direct mapped cache is that it allows simple and fast speculation. Once the address has been computed, the one cache index which might have a copy of that datum is known. That cache entry can be read, and the processor can continue to work with that data before it finishes checking that the tag actually matches the requested address.
The idea of having the processor use the cached data before the tag match completes can be applied to associative caches as well. A subset of the tag, called a hint, can be used to pick just one of the possible cache entries mapping to the requested address. This datum can then be used in parallel with checking the full tag. The hint technique works best when used in the context of address translation, as explained below.
Other schemes have been suggested, such as the skewed cache[2], where the index for way 0 is direct, as above, but the index for way 1 is formed with a hash function. A good hash function has the property that addresses which conflict with the direct mapping tend not to conflict when mapped with the hash function, and so it is less likely that a program will suffer from an unexpectedly large number of conflict misses due to a pathological access pattern. The downside is extra latency from computing the hash function[3]. Additionally, when it comes time to load a new line and evict an old line, it may be difficult to determine which existing line was least recently used, because the new line conflicts with data at different indexes in each way; LRU tracking for non-skewed caches is usually done on a per-set basis. Nevertheless, skewed-associative caches have major advantages over conventional set-associative ones.[4]
They basically increased the hit rate of the L3 it seems.
So by increasing the hit rate of the L3 along with adding 4 more megabytes, AMD seems to have improved upon the work done with each clock cycle (more IPC maybe), right? The CPU is simply more efficient because it makes less mistakes it seems.
Can we get an engineer or somebody in the "know" to explain this to us?
Don’t look too much into cache associativity. It could be a (small) advantage or a (small) disadvantage in some cases. AMD engineers may have found that increasing the L3 cache associativity to 48 works better for the Deneb design with 6MB L3 cache. Having a larger cache and higher associativity can increase latency also. So the question now is this:
Did AMD manage to lower the L3 cache latency on Deneb even though it’s 3x larger and highly associative?
I think they did just that, but the NB has to be clocked higher than 2GHz this time around. I wish it was running 1/1 with the CPU clocks, but heat and power issues may be the problem.
watch this;):up:
http://www.overclock.net/attachments...5nm-4.0-2-.jpg
with default cooling (box?), real Vcore was 1.475V.
flank3r is that stable?
i dont know, its from any user (but possible yes)
I doubt that shot is genuine,but hey who knows.Red flag was when he stated it's a C2 stepping...No way he got a production stepping in July,at least not from AMD.But if we give it slight chance it's real,it could be done on C0 or C1 Deneb and SB750 board,that's possible.
link?
Actually, Phenoms did leak out (Agena) and that was a big flop (B2 that is)
AMD has learnt to shut up, but maybe in the face of Nehalem, one image can speak enough.
However I still think this is an unintentional leak. Very unintentional. Or the poster has access to the fabs/ is an OEM partner.
I mean, RV770 was gawdawesome and most of you guys didn't knew it until the benchmarks came. Even the partners didn't know! :p:
Remember the GT200 superiority and nVidia blowing ATI off planet earth? :rofl:
Yeah,the GT200 was hyped up and declared winner before market even saw the RV770 numbers(and they were a "small" surprise :) ).
Anyhow,i do hope the shot is real,especially given the fact that AOD is running stress test in the background and the 4Ghz was done with 1.47V :).
If we suppose Deneb is 10-15% faster than Agena,then at this clock ,45nm Phenom can be a formidable opponent not only to Penryn,but to Nehalem too.
let's hope like sb750 this confirms too, i'm gonna see many intel fanboys cry imo
omfg that would be TOTALLY amazing:shocked::shocked::shocked::shocked: :shocked:
I´m not sure but, is that font supposed to look like that in AOD, in the 4GHz screenshot?
hint: frequency first core smaller font than the others, should it be like that?
Can´t check myself as I´m still running K7 here :cool:
I think so, mine is the same way
http://img227.imageshack.us/img227/2685/amdtl6.png
http://img227.imageshack.us/img227/2...8244ffdc96.jpg
holy cow... if 4ghz is possible on stock even if unstable, it should be doable on even just good air cooling. if that is the case, i'm selling my intel/nvidia junk, and getting my hands on some 790fx/rv770 goodness. looks like amd might be back in the game...
Even if it was technically stable, the voltage is too much for 45nm. If you look at Intel's 45nm chips, anything above 1.4V is dangerous. HK/MG may play a role there but still 1.475V on 45nm is like ~1.55-1.6V on 65nm.
If that is true though then a stable overclock to 3.7-3.8GHz should be possible with reasonable voltage. That's a huge improvement over 65nm B3.
indeed... but 1,475v or comparable 1,55-1,6v whatever is not too much for testing or just a 4ghz screen.. ;)
Don't get my hopes up! I will eStab you with my iStab v1.04, FlanK3r!
Seriously though, if Deneb can do 4Ghz@1.475 with a stock cooler then its time to buy a little AMD stock.
I choose to believe that screen is a fake in order to not get my hopes up.
Why not believe it? I can pull 3.51GHz out of my 9850BE right now, so another 500MHz really isn't asking too much from a new fab process...
http://valid.x86-secret.com/show_oc.php?id=391344
I don't believe for a second that it's *NOT* real - for 3.51GHz, my 'golden' JAAHB 0816 GPMW only needs 1.375V, so the jump to 4GHz on the new 45nm process could possibly require a bit more voltage to be stable there - oh, and a chipset that allows it along with the new ACC (can we say 790G/GX w/ SB750??? ;))
I, for one, am ALL OVER this (both the new 45nm and the 790G/GX/SB750) when they come out!!!
Psychlone
Well, Psychlone, aren't you VERY lucky with your Phenom batch? Because 3.5GHz with only 1.375V is nothing short of spectacular. Or is that kind of achievement much more common than I have thought it was? I'm reading stories of 9850BE everywhere that could only reach 3GHz-ish, regardless what voltage.
But next to your overclock, the oc in the pic seems very doable. At least with some cherry picked phenom that is. It's best not to think of this as your average 45nm overclock, right?