cool JC, you got next anything interesting? :D
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cool JC, you got next anything interesting? :D
man you're like the kid on the block that always has the newest nikes.
hopefully some sort of indication of performance will be "leaked" soon. -_^
I think the reason for the short life span of the 1156 is that Intel changed their roadmap due to economic recession/lack of competition/piles of 775's.
Lynnfield was supposed to show up earlier, and a 32 nm 4C successor was planned, then they changed their plans and messed up the tick-tock strategy.
To me it's quite obvious that those late change of plans wouldn't change the plans of SB back then, IE maing it backwards compatible.
Sandy bridge is a fresh start and I guess it's too early to tell if the 1155 will work with Ivy Bridge, but I think it's likely.
the only new thing that should come from Intel is reduce in prices,
that would be REAL big news for everyone, yet, doubtfully, it would come of a single company and not as a new approach in the whole market.
except from that (not complaining), we've seen 2/4 core chips and 4/8 core chips,
a bit more cache or some better bclk, open multiplier, or an IGP, is all kid stuff,
on the paper,
nothing too glossy or impressive seems to come out of intel's hand, from my pov, @ the next gen. sandy bridge.
maybe except from that 8 core xeon which is a linear advance,
the market seems to go on on it's same old way.
Well said, in with the new and out with the old! I wonder if all sandybridge chips will use the same socket? This is a dual core, I would suspect (wild-assed-guess) that the hexa's and quads will use a different socket (and 22nm octo's may use a diff socket too.) I wouldn't be suprised if sandybridge has 2 sockets for their entry level chips and enthusiast/workstation chips much like 1156 and 1136 now.
大脯!
He is not alone....
http://vr-zone.com/articles/intel-sh...ples/8860.htmlQuote:
Intel have been producing Sandy Bridge samples in volume since Q1 2010, and have begun shipping thousands of Sandy Bridge CPU samples to its customers.
pff... it never really worked on a 12month cycle, especially in the beginning lol... just check the release dates... but it doesnt matter if its exactly 12 months or 14 months sometimes or even 16months... intel does a really good job with their cpu cycles imo... although recently they have been taking it mighty slow updating their architectures and do baby step after baby step... first integrate on the same package, then on the same die, then actually merge the blocks... just look at pineview it still has the fsb interface for block to block communication within the same die... LOL :ROTF:
i wonder if sandybridge still uses qpi for block to block communication... :D
"AN INFAMOUS ENTHUSIAST at XtremeSystems called "JCornell" has posted what seems to be the first information about Intel's next generation processor codenamed Sandy Bridge. Sandy Bridge is Intel's 32nm tock and is essentially a Clarkdale 32nm CPU with the 45nm GMCH shrunken to 32nm and merged onto the CPU die. Thats right, while AMD has been talking a lot about fusion for half a decade, Intel seems to be getting there first."
http://www.semiaccurate.com/2010/04/...bridge-rumors/
JC on semi accurate radar :up: hhehee
Actually pineview has no FSB and both (mem controller and graphics) are integrated in on the same silicon die. But this dosn't matter because they still comunicate through a main memory. Cache coherent buses (like HTT or QPI) only make sence when cores have a similar cache subsytem. BTW, this applies also to AMD fusion which means that althrough GPU and CPU cores are integrated on the same die, the data exchange will go through the main memory. If I recall correctly, upcoming SB is the only cpu which has different type of cores connected to the same L3 cache. I wonder if Intel will furter improve their GPU drivers to get some help from a SB cores in heavy vertex/geometry calcultions (especialy that SB has doubled its floating point performance relatively to nehalem).
really? whats misleading?
btw, thats me... i wrote that thing yesterday night... at 3am... so please dont burn me for getting something wrong ^^
really? according to anandtech intel told him it does... and it perfectly explains the memory latency?
i thought they are hooked up to an internal switch? like the xbar between cores and imc on amds multi core cpus?
would make sense... but that would be tricky to load balance with turbo on both cpus and igp... and did it really help a lot on the current implementation? it helps a lot in benchmarks where the cpu is idle, but in games it only gave a 5% boost or so iirc?
hey :P
at least tell me what i got wrong then :P
its not like i want to spread nonsense... please lmk! :)
They don't realize that our words should be treated as :fact: :ROTF:
Quote:
Originally Posted by ajaidev
I haven't noticed the author..
Oh Sascha :slapass:
You know how to find me... But you also know I'm not allowed to give any details/info.. :nono::censored:
Quote:
Originally Posted by saaya
So is this a new budget platform for when they finally retire 775?
Weird part is that Intel keeps releasing new LGA775 CPU´s.
Just wondering.
New pr0n. Nice :)
--Snip--