one of my friends got to do this at work a few days ago and he posted a pic of each. thought i'd share, this is the first time i've seen pics with the ihs' removed but haven't looked for them either so i dont know if theres others floating around here.
http://ambiguiccoherence.wordpress.c...of-quad-cores/
so its true that the C2Q is 2 dual cores and under all the solder the Phenom is 1 chip
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Uhm, I don't see anything new in that article, and it's wrong about the L3 cache being exclusive for AMD, Intel and IBM have used it for a lot longer.
Show me an intel chip that has L3
That guy really destroyed those chips getting the IHS off. And that phenom die is huge.
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There were P4's with L3 as well, and technically some P3 Xeon's as well IIRC.
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Intel Gallatin Extreme Edition 3.2Ghz & 3.4GHz to name just two.Originally Posted by SparkyJJO
Show me an intel chip that has L3
.I know becasue I had one. 512L2 and 2MBL3.
http://www.hothardware.com/articles/...d_P4_EE_34GHz/
See the bottom.
Last edited by [XC] riptide; 02-17-2008 at 05:39 AM.
I stand corrected.
Looks like it was used in a different way though. AMD uses the L3 across all cores, intel had it either on a single core w/HT (strikes me as a bit odd) or in the case of itanium, it was off-die, per core. Not entirely sure of the benefit of that, what would another level of cache per core instead of shared among cores doBut then, they are the engineers, not me, there must have been a reason.
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Did they use a chainsaw to take the IHSs off?
Or they used dead chips and didn't care...
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No matter if they're dead...you can take it off just as easily without damaging it and frankly that just looks disastrous.
And I just read the text...the single-die banter is literally the definition of FUD.
IN terms of the EE P4's I listed above it gave the chips on approx ~10% better performance over their 512L2 only Northwood brothers, at same clock speed.I stand corrected.
Looks like it was used in a different way though. AMD uses the L3 across all cores, intel had it either on a single core w/HT (strikes me as a bit odd) or in the case of itanium, it was off-die, per core. Not entirely sure of the benefit of that, what would another level of cache per core instead of shared among cores do
as far as i know, they were working prior to removal. i didn't ask what he used to remove the ihs and i assume it was the first time he removed one
XS WCG Rules: #1: don't pull fart_plume's finger #2: Dave aka Movieman, don't give him your phone number if you like your hearing
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I have a 3.2EE that has 2mb L3...Show me an intel chip that has L3
That guy really destroyed those chips getting the IHS off. And that phenom die is huge.
Yes. Reading his post nearly made me cry. What a goddamit NOOB/Fanboy.
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I looked at the pictures and just closed the window. I really could care less about what a person has to say when the product of their work is near abysmal.
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Looks like it, lol!
Worst IHS removal job ever
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god in heaven.....how do u even do that?Worst IHS removal job ever
I have never removed one myself, but he has chips and small pieces missing around the edges... I think he did too much prying and not enough heating?god in heaven.....how do u even do that?
The P4 EE Gallatins had L3 cache.Show me an intel chip that has L3
That guy really destroyed those chips getting the IHS off. And that phenom die is huge.
http://en.wikipedia.org/wiki/Pentium...eme_Edition.29
And yes, it's kind of common knowledge that the current Intel quads are dual-dual cores. Same happened with Smithfield and Presler--two Prescott and Cedar Mill single cores, respectively, on the same package. REALLY old news is so exciting.
Edit: Damn you rip, you beat me to it. Oh, well. I knew it off the cusp anyway.
Last edited by Omastar; 02-18-2008 at 01:00 AM.
gallatin.Show me an intel chip that has L3
That guy really destroyed those chips getting the IHS off. And that phenom die is huge.
I remember the old Pentium II Xeon's (or was in Pentium Pro?) had L3 cache you could actually add on in sticks that looked like ram but smaller.
I beleive that was L2.
on another note, athlon plus ss board = LIII cache
Ouch...
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Funny to see how brutally you can ruin an IHS removal though.
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rofl!!!
hope those cpu were dead before ihs removing!!!
what he use to remove??? axe??
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