I don't know, but isn't anything above 1.6v PLL a bit unsafe?Quote:
Originally Posted by Pntgrd
I really wish we had a chart for this stuff.
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I don't know, but isn't anything above 1.6v PLL a bit unsafe?Quote:
Originally Posted by Pntgrd
I really wish we had a chart for this stuff.
See quote below.Quote:
Originally Posted by playground
Quote:
Originally Posted by CryptiK
I was directing my answer to you as well. Since you only have 3 options, select 0.65x as it is the most appropriate for either 1.10 or 1.14 Vtt. You could keep 0.65x selected up to ~1.5v Vtt without going over the ~1.0v limit. However you should try all 3 options, and see which one gives you the best stability at any given Vtt, every cpu is different and the lower 2 choices may yield better stability for you.Quote:
Originally Posted by CandymanCan
GTL tuning is trial and error and what works for one person may not work for you. The formulas provide a starting point but you should experiment to find what works best for your hardware.
I know it was high but that is the formula put forth in this thread, as far as I can understand. What's funny is I decided to put everything on Auto and see what the RE would put for voltages, and I was quite surprised. :shrug:Quote:
Originally Posted by Dee
nope. 1.5v is the base vCPU_PLL. It needs to be independant of other voltages and thus higher than the rest. 1.8v for the CPU PLL voltage would probably be the maximum you'd need to go when using 1.5-1.6v vCC. I notice for the current C2D chips the differential is 0.2-0.4v between vCC and vCPU_PLL. Stay within that window from vCC and you won't damage anything long term.Quote:
Originally Posted by Dee
I was wondering, for CPU GTL Ref voltage the ideal range is between 0.80v and 1.005v as was stated earlier in this topic.
But what's the ideal range for the NB GTL Ref voltage? I get the impression that it's lower than CPU GTL Ref voltage because most of the time is has to be set with a (much) lower multplier (e.g. 65/65/63 or 63/63/58) Is this assumption correct?
ideal nb gtlref for standard Intel values is 0.666x vTT, but there is an extra value for the NB called FSB_SWING which is 0.25x vTT nominal, this is set by the manufacturer and it determines the distance for logical 0 / 1 from gtl ref voltage. it's the swing distance for a switched voltage. It may be that this is based off a divider from the GTLREF NB voltage which has already been reduced by a set of 1% resistors, it would make sense to do something along these lines as too high a vTT would cause too large swing between ground and power, perhaps thats the reason why we use smaller NB GTLREF multipliers or values.Quote:
Originally Posted by DemonEyez
Hello! i have a P5Q3 Delux Q9550
and with this settings:
vcore: 1.40
CPU GTL freq 0/2: 0.620
CPU GTL freq 1/3: 0.620
vPll: 1.60
FSB Term: 1.46
Vdram: 2.10
Vnb: 1.40
GTL NB: 0.620
vSB: 1.10
PCie: 1.50
so i have a 45m can some one please help with GTLs, because i tried the mat but it doesnt work i can start but doesnt pass Orthos...
with math i change bouth CPU GPLs or only the one 0.670 (cpu gtl 1/3)?
i do i calculat the value?
tks
vox
Quote:
Originally Posted by vox
From what I have read and I read everything. You need to have your NB settings lower then your computer setting so the signals don't bump heads which you have your's identical and my guess is that is why you are having issues. I tried the same thing the other night and had the same issue the signals were getting crossed and thus was unstable. Am I right people?
True, I sure hope thats wrong, my NB voltage is higher than either the vcore/vtt. Interested to hear the answer to this one. I however did not read this whole thread, think I missed about 8 posts or so :D
Larry
yes something along those lines, theres always leakage in circuit board designs and because those particular voltages are being oscillated, similar voltages may be cross talk with them.try and keep voltages that are near each other to slightly different values and never the sameQuote:
Originally Posted by truehighroller
Yeah, I learned something see.. :up:
I missed that too. That explains why I'm having problems with my next OC. I have NB > VID -- and I'm fairly certain that my CPU is stable, so I've been bumping NB and VTT and tweaking GTL Ref!Quote:
Originally Posted by truehighroller
I don't have a CPU PLL. I do have a CPU clock amplitude auto-set to 800 mv. Maybe it's time to play bump that and see what happens!
Not saying I understand all this stuff, but just using the basics does wonders.
Before using the GTL Ref adjustments I could only get my E8600 to 4.65G (465 x 10).
No matter how much voltage I pumped into the CPU.
Now using just the basic GTL Ref adjustments I have can get the E8600 up to 5.22G (522 x 10) with substantially less voltage.
http://valid.x86-secret.com/cache/screenshot/431599.png
I also like to keep the formula very simple and just use -0.032 x VTT.
This is probably not exactly the way to do it, but it works for me.
Thanks for the help.
cpu clock drive amplitude.Quote:
Originally Posted by davidk21770
it may be beneficial to add 100-200mv if you are out of all other options. a higher drive amplitude for the address clock signal will probably only benefit if either the drive amplitude is too weak for the vCC being pumped into the cpu, or if you have cross talk on the vCC line, it may help to stabilize and true the formation of the clock waveform for the address strobe clock signal (bclk0) (which you would need to see with an oscilliscope and logic analyzer) which if the data strobe begins at the correct position during the opposing bclk1 then the overlap may cause timing issues between the address strobe doing the low level oriented tasks such as handling address mapping, bus traffic priorities, etc, and the data strobe throughputting the actual data. there is timings which they need to abide by to allow sufficient strobe periods for a given amount of clocks to complete the assigned op.
so basically if the amplitude deskews the address and data strobes too much in either direction the end result will always be incomplete / incorrect data or address locations. read that as very bad. sometimes at high fsb's (500+) the strobes deskew just from their frequencies possibly also due to weak or deformed waveforms at the extreme from lack of shielding in the design (ie. never designed to do those frequencies on paper!)
Hi,Quote:
Originally Posted by vox
I've got the P5Q3 Del. myself and a Q9300. Some of your voltages are off, tho, you don't even mention your FSB clock.
1) The Northbridge's ideal voltage lies around 1.26-1.32V between FSB 400 and 500. 1.4 has always been unstable for me no matter what the FSB clock was.
2) FSB Term.: Part of the 45 nm quadcores feels well around 1.34-1.38V. The rest usually lies quite a bit below. Keep this above VCore to reduce the risk of killing your processor.
3) GTL References. To my experience they should be around 0.67-0.69. My GTL Ref. 0/2 is at 0.69, GTL Ref 1/3 is around 0.67
4) VCore is definetly too high unless you are pushing your chip to FSB 600 MHz, which is basically impossible with quads on this board. Keep it around 1.3V for FSB 460. The board usually hits a FSB wall at 470.
5) DDR3 RAM on this board usually requires a tRRD timing of 8-10 while ASUS defaults to 5. And a tRFC of 82 or higher. Default is 60.
6) Try setting the PCIe frequency from 100 to 101. this improved my system's stability greatly, but might not have any effect on other setups. Many have tried it ever since the P965 boards like the P5B.
Hope that helps
Hello Amurtigress!Quote:
Originally Posted by Amurtigress
P5Q3 Dlx
Q9550 C1
Ram GSkill 2x 2GB DDR3 1600 CL7 1.9v
HX 1000wts
Sory for the no specs! here they are updated:
Overclocker Tuner: Manual
CPU Ratio Setting: 8.5
FSB Frequency: 485
PCIE Frequency: 100
FSB Strap To North Bridge: Auto
DRAM Frequency: ddr3-1459
DRAM CLK Skew on Channel A1: Auto
DRAM CLK Skew on Channel A2: Auto
DRAM CLK Skew on Channel B1: Auto
DRAM CLK Skew on Channel B2: Auto
DRAM Timing Control: Manual
CAS Latency: 7
DRAM RAS to CAS Delay: 7
DRAM RAS Precharge: 7
DRAM RAS Activate to Precharge: 18
RAS TO RAS Delay: Auto
Row Refresh Cycle Time: AUTO
Write Recovery Time: Auto
Read To Precharge Time: Auto
DRAM Static Read Control: Disabled
DRAM Dynamic Write Control: Disabled
DRAM Read Training: Disabled
DRAM Write Training: Disabled
MEM OC Charger: ENABLE
Ai Clock Twister: auto
AI Transaction Booster: AUTO
CPU Voltage: 1.40
CPU GTL Voltage Reference (0/2): 0.620
CPU GTL Voltage Reference (1/3): 0.620
CPU PLL Voltage: 1.60
FSB Termination Voltage: 1.46
DRAM Voltage: 2.00
NB Voltage: 1.40
NB GTL Voltage: 0.620
SB Voltage: 1.10
PCIE SATA Voltage: 1.50
Load-Line Calibration: Enabled
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
CPU Clock Skew: AUTO
NB Clock Skew: AUTO
I have bios 1406 can boot and run Orthos for 10mts.
Just for bench i can make 8.5x500!!!
What adjustments do think i can make here?
tks
vox
2) FSB Term.: Part of the 45 nm quadcores feels well around 1.34-1.38V. The rest usually lies quite a bit below. Keep this above VCore to reduce the risk of killing your processor.
I ha ve never seen anyone say this? Is this true??
As far as my knowledge goes I believe that to be the case also, there is a weak pull up resistor as part of the CPU but it does very little once you increase vCC above VID and from what I can determine disabling the pull up resistor by maintaining vTT above vCC acts as a limiter / safety against periods of transient overshoot that are more than 10ns or spike above vOS_max which is around 1.1 x vTT iirc.
And yep I've also come to the conclusion that the RF has a couple of voltage bands where vTT works most effectively across the board, 1.34-1.38v for 45 or 65nm and 1.42-1.46v for a heavily oc 45nm or moderate 65nm cpu. I use 1.42v vTT in bios for my q6600 and its the most consistent vTT for my particular setup, 0.63x NB gtlref multiplier for this vTT seems to give a cleaner voltage line when using 1.5-1.6v vNB, and definitely makes using 400mhz strap ( 4:5 divider ) backed with PL of 7 pulled in to 6 on the corresponding phases achieveable at 450+ fsb with a quad core.
So but, I thought that I seen some one say that intel doesn't recomend going over like 1.25 vFSB? Am I wrong? If so then you are saying that it is ok to go over this any way? I'm not saying you don't know what you are talking about because obviously you do but, just making sure I am taking this in right.
:eek:Quote:
Originally Posted by mikeyakame
Would it really be? Atleast Intel has not said anything about vtt should be higher than VID
But well we all know Intel :p:
Remember that Intel specs are not based on overclocked systems, but a set of variables that allow other hardware makers to design hardware that will work with their cpus...as such, anything posted does provide for some variation, and Intel does not mention how things can be run at the bleeding edge..that's for us to figure out.
All the specs stated provide for the full product range as well. 3000mhz is going to require slightly different settings in bios than 1.8ghz, 200FSB is different from 400FSB, and the data we have is applied to all ranges...
the ones I mentioned before. those values you had there are seriously wrong, to my experiences.Quote:
Originally Posted by vox
tRRD refers to RAS to RAS delay (Set to 8-10, AUTO sets it to 5!), and trfc to 82-88.
And limit the FSB to approximately 460 for now until you get stable. The P5Q3s seem to hit a FSB wall at roughly 470.
Specs are always to be taken with a grain of salt. There are quite some diferent motivations behind them.Quote:
Originally Posted by truehighroller
Intel does not guarantee other settings to work. But they MAY work.
Lifespan can degrade, reliability can suffer. Whatever measures of reliability we have. One must also bear in mind that Intel is testing and making CPUs With other objectives in mind than only us overclockers. Their chips could potentially end up in servers with extremely high reliability requirements, or in an overclocker machine. Or in a stupid blonde secretary's PC that only runs Word on a daily basis. On top of that, Intel has other means of testing if certain parts of the CPU are still running well that WE might not even notice with our comparably poor Orthos and Inteburntest tools. or whatever WE do to cheat ourselves into believing we're stable. :D;)
Ok at night i will give it a try.Quote:
Originally Posted by Amurtigress
But if there´s a FSB wall at 470, i shouldn´t get success doing boot to vista and runing ex: cpuz???
tks
vox