[NEW STUFF] Intel LGA1155

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Originally Posted by saaya

so you think dropping the L1 latency by 25% will result in a 10% performance boost?

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Did I say that? No.

I merely suggest you might consider some of the already known changes (L1 latency, for one), in addition to the black box "completely reworked microarchitecture", along with Intel's exec VP stating "significantly improved IPC", before you make claims like: "SB will only improve IPC over Westmere by 2%, on average."

Just because Merom, Nehalem, and probably SB all stick with variants of the P6 *pipeline* doesn't mean there haven't been, and won't continue to be, significant IPC bumps along the way. There's more to the microarchitecture than the basic pipeline.

You probably haven't realised how important the chipset's Management Engine (uC) plays in later series.. It's dependant on CPU and CPU depends on many its services.

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Originally Posted by saaya

i dont think the chipset is that important... they could make the new cpus work with the old chipset easily i think... as a matter of fact the "new" chipsets arent really new, they have barely been modified from the current ones...

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Originally Posted by saaya

Snip.

i dont think the chipset is that important... they could make the new cpus work with the old chipset easily i think... as a matter of fact the "new" chipsets arent really new, they have barely been modified from the current ones...

its all about the igp data and pwm protocoll as far as i know...

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Mmmkay.

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Originally Posted by Mumak

You probably haven't realised how important the chipset's Manageability Engined plays in later series.. It's dependant on CPU and CPU depends on many its services.

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Saaya is a troll, but I respect his opinion, even if it's mostly based on what he thinks in stead of the facts.

--Screen removed--

Pls note L3 is wrong working with author for fix...

EDIT: Results of HWiNFO32 3.44.650 Beta / 3.43.623 and thus has error pls wait for update.

There's something weird on that screen.. Either an older HWiNFO32 build was used or aliens attacked the system...
Anyway, I still need to tweak few things for these platforms.. Will release a new build soon (for those interested running SNB) ;)

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Originally Posted by ajaidev

Pls note L3 is wrong working with author for fix...

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lol turns out you are correct Mumak its beta but not the current beta...

Here's the new beta release I promised (with enhanced SNB support):
HWiNFO32 v3.46-709

Cool! Sandy Bridge looks to be good so far.

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Originally Posted by saaya

i think sandybridge will be 2% faster than clarkdale on average... the important points will be lower power consumption, more features (avx,better turbo,tweaked igp) and price...

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I think all the performance speculations are useless at this stage. I'll bet you have no appropriate background to estimate a performance bust from an additional L1 load port, much bigger loop detector buffer, lower cache latencies, larger L3 bandwidth (and other Sandy Bridge features which yet to be disclosed). What Intel does disclosed is a performance speedup (1.42x - 2.57x) for AVX vs. SSE for various FP workloads. Also confirmed on actual Sandy Bridge silicon.
http://software.intel.com/en-us/arti...lation-slerp//

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Originally Posted by terrace215

Did I say that? No.
I merely suggest you might consider some of the already known changes (L1 latency, for one), in addition to the black box "completely reworked microarchitecture", along with Intel's exec VP stating "significantly improved IPC", before you make claims like: "SB will only improve IPC over Westmere by 2%, on average."

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thats not what i said...

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Originally Posted by saaya

but i dont expect even that, i think sandybridge will be 2% faster than clarkdale on average...

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so how much faster do you think sandybridge is going to be vs clarkdale at a clock per clock comparison?
i mean non avx code, common games and apps...
no video and audio en and decoding...

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Originally Posted by terrace215

Just because Merom, Nehalem, and probably SB all stick with variants of the P6 *pipeline* doesn't mean there haven't been, and won't continue to be, significant IPC bumps along the way. There's more to the microarchitecture than the basic pipeline.

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good point... they might have changed tons of stuff, it just didnt improve ipc a lot...

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Originally Posted by pixie

If you have read the article... Sigh nevermind. Here, I'll quote it right here. This is what they wrote:

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lol what?
i did read it, and what did i say to make you think i havent?

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Originally Posted by pixie

Even though they were specifically talking about the extreme platform, I wouldn't be surprised if the rest of the line work the same way.

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atom will stay vrm 11.1, and 1366 will move to vrm12 later iirc

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Originally Posted by pixie

Again, a BIOS flash is not going to give you a whole new regulation scheme. It requires hardware change.

Others in the thread have also mentioned power savings this new scheme enables. You also need new hardware for this, and it's probably not just at the bare chip level either. A BIOS flash isn't going to change that piece of PCB the chip rests on, either.

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who are you talking to? :confused:
nobody said a bios flash would enable compatibility between the old and new platform?

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Originally Posted by OhNoes!

Saaya is a troll, but I respect his opinion, even if it's mostly based on what he thinks in stead of the facts.

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well im out of the loop for a while and things start to blur... why should i promise anything even if i THINK i know something for sure? so i get ripped on by some trolls that interpret something into my posts i never said? plus intel probably changed the one thing or the other, so im not 100% sure about any of this... i still think my comments are useful to get a rough idea of what to expect...

if thats how you define trolling, fair enough, yes, im a troll...
i define trolling as bear posts vs bull posts like in the stock markets... there are people that provide new infos and comments, and then there are people that disagree and try to discredit them...

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Originally Posted by kl0012

I think all the performance speculations are useless at this stage. I'll bet you have no appropriate background to estimate a performance bust from an additional L1 load port

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your right, i dont... so what is your estimation then?
and i dont want to hear any comment to later call you out on it, im just curious about it... i plan on getting an SB laptop, i cant wait to get my hands on one tbh... :D i just dont expect a big perf boost... in a laptop thats only secondary for me tho, hence my unbroken enthusiasm for this new platform :D

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Originally Posted by kl0012

much bigger loop detector buffer

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sweet, that should boost actual ipc vs theoretical ipc and be quite useful in a laptop...

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Originally Posted by kl0012

(and other Sandy Bridge features which yet to be disclosed).

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well how am i supposed to make any conclusions whatsoever from stuff intel is hiding even from some of their devs and partners? :D yes, there might be much more to sb that intel hasnt talked about that will result in notable ipc boosts... but since intel hasnt talked about it... at all... how are we supposed to know about it?

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Originally Posted by kl0012

What Intel does disclosed is a performance speedup (1.42x - 2.57x) for AVX vs. SSE for various FP workloads. Also confirmed on actual Sandy Bridge silicon.
http://software.intel.com/en-us/arti...lation-slerp//

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hmmm they said this particular code was very easy to port to avx... i wonder how easy it will be to actually port games and actual applications to avx... they also mention the speedup is sort of a best case scenario, still, its very impressive...
thx for the link, that article was very informative...

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Originally Posted by saaya

your right, i dont... so what is your estimation then?

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I have no idea. All features Intel will add to SB may look good on the paper. But at the end all depends on the actual implimentation.

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sweet, that should boost actual ipc vs theoretical ipc and be quite useful in a laptop...
well how am i supposed to make any conclusions whatsoever from stuff intel is hiding even from some of their devs and partners? :D yes, there might be much more to sb that intel hasnt talked about that will result in notable ipc boosts... but since intel hasnt talked about it... at all... how are we supposed to know about it?

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Not always intel discloses all the micro-architecture impementation before the official intro of the new arch. Most of the features intel does not discloses at all. Not every low level micro-architecutre implimentation is required to be known by programmer for writing optimal code.

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hmmm they said this particular code was very easy to port to avx... i wonder how easy it will be to actually port games and actual applications to avx... they also mention the speedup is sort of a best case scenario, still, its very impressive...
thx for the link, that article was very informative...

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There is more code snippets on Intel's AVX page. MKL 10.2 also partialy optimized for AVX (DGEMM, FFT, Vector Math Library (VML))

One question: can LGA1156 air coolers be used for new socket? I want to switch back to Intel on next arch and I don't wanna get rid of Mugen 2 :D

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Originally Posted by amdsempron_xs

One question: can LGA1156 air coolers be used for new socket? I want to switch back to Intel on next arch and I don't wanna get rid of Mugen 2 :D

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I think I saw a post in here that said no, but I dont want to read the thread again...

Well isnt its just the pin design that is changed but the socket dimension are actually the same so they could use the some heatsink mounting hole.

That's the point I really want to be clarified :D

Don't want to unmount again the plates I'm gonna build for my SS ;) Wish the mountig holes to be the same as s1156 !!

ill see if i can find out...

and kl0012, thx... too bad you havent heard more details either... :/
i really dont think the ipcs will go up a lot man... if it would, dont you think theyd brag about it like they did with core and core2? they even bragged about it for nehalem and it didnt really improve at all for games and normal desktop apps :D
most of their talk is about avx... and itll boost fpu perf in general by a few percentage points i guess... thats probably what they mean with ipc boost...

i did some more research about this and came up with the following:
http://www.fudzilla.com/content/view/17713/1/

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the top high end Sandy Bridge should end up around 20 percent faster than top currently shipping Core i7 based on Arrandale 32nm dual-core

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the fastest arrandale chip is this, the i7-620 2.66ghz with turbo boost up to 3.33ghz
http://processorfinder.intel.com/det...px?sSpec=SLBPD

2666mhz+20%=3200mhz
3333mhz+20%=4000mhz

the latter sounds unlikely, especially considering that there are rumors of sandybridge clocking to between 3200-3800mhz max...
so i think sandybridge will enable around 20% higher clocks within the same tdp limitation, which sounds very reasonable, especially considering the die shrink of the gmch which probably makes up half of arrandales power consumption.

^
faster =! frequency alone... :p:

i predict a 15% improvement with sandy bridge over nehalem same amount of cores threads etc....

That's a good bet Snowm@n. SB will have better/more aggressive turbo mode though.

As i have said before the main features of sandy bridge as a whole is turbo and power saving. The high end sandy bridge will have better c2c execution than the current gulftown but that is not the whole plan. Imagine a bloomfield with a turbo like you find on the lynfield and to top it of the benefits of the new system agent.

I cant stress enough the importance of system agent and another monitoring system in sandy bridge and the future cpu's.

well from the math ive done if nehalem has 25% higher perf then current K10 cpu .. then amd only needs a 40 or so more % to be even with intel ????

It's not that uniform so to say.The lead varies a lot depending on the workload. Also ,40% is a big big jump but not impossible. If AT is to be believed,a 2 module(essentially QC BD chip) will have 10-35% better perf. than QC Deneb(clocks undisclosed in both cases).It's hard to tell this early but a 35% jump + better multicore scaling (from say QC Orochi to 8 core one should net excellent scaling) could bring AMD close to SB in high end desktop market.

even 5% behing SB in ipc wouldnt be that bad considering they might scale great on cold .... my expectation might be high but then again ive been keeping my upgrade to the bare minimum so i could get a top end build once orochi comes out

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Originally Posted by Sn0wm@n

i predict a 15% improvement with sandy bridge over nehalem same amount of cores threads etc....

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up to or average? cinebench or some other benchmark or actual apps like games and office and itunes?
up to yes, average for cinebench, i dont think so, average for common apps, i dont think so..
i hope intel really did focus on power and efficiency this time around and not more performance at the same power... we're at the same power levels for a loooong time now, and quadcores and 4 threads in a laptop are nice but really not nearly as important as battery life...

as soon as a laptop can run at full speed and really crunch on some work for 6hours or more, THEN its time to improve performance, cause improving battery life more will be pointless as it will last all day for 90% of users...
but right now most laptops have their batteries sucked half dry just by watching an hd movie...