Indeed, eveyone shouting 4 module BD is not 8 cores just says the exact opposite of what that head markteing guy of the server section is saying. :ROTF:
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And I agree since Zambezi has 8 cores. They are just organized in the way that a basic building block is actually a very optimized dual core(a module).
As for "next year intel trouncing" and "3d transistor revolution",how about we wait and see what both companies have 1 year from now and what kind of performance and perf./watt they both get out of those products.
with AMD using GF now, who would we expect to hear such technology come from? my first assumption is that its going to be GF since they have the fabs and just offer such things for AMD to use.
Informal,
I am a consumer that likes computer technology. Thatīs about it.
I think Zambezi is an 8 core CPU but something comes to mind and, if possible, Iīd like to know how both Intelīs Sandy Bringe (2600k) and AMDīs Bulldozer (Zambezi) would behave if they have to handlle more than four 256bits instructions at the same time (is it even possible?).
Edit: 4 x 256bit floating point instructions
Thanks.
No, BD has 4 modules each consisting of 2 int cores and 1 256bit fp core and a shared frontend. There's no logical cores in BD although it's not really a full 8 core CPU either. Tbh describing BD with the traditional 1 int core = 1 cpu core is not really accurate but on the other hand using a different nomenclature without confusing the avg consumer is also impossible.
I thought I'd pop this up here to encourage even more stimulating debate :D
http://i716.photobucket.com/albums/w.../bulldozer.jpg
My understanding is the L2 is not shared between modules, but the L3 is shared between modules.
I'm not really the guy to answer this but my understanding is even though AVX provides 256-bit executions a single-precision FP command is 32-bit and a double-precision FP command is 64-bit.
So, essentially, the module above could execute 4 64-bit commands per cycle or 8 32-bit commands per cycle.
Here is the JF-AMD 'blog' on AMD Flex FP that explains it better ...
Where is it? I'm sick of this here it comes debate. I want it now. For god sake. They are good at GCard's why not CPU's. They beat NVIDIA to releases why not Intel. Intel are starting to scare me.
Pimp my CPU lawl
same as any other operand. If it cannot be sheduled at the same cycle it will be sheduled the next cycle.
So if cpu 1 needs 6cycles for one AVX instruction it will need 7cycles to do 2 AVX ops
Also with FMAC BD can do 8. SB can do 12 if they are different types but that rate is not sustainable.
Guess that means I should put an LCD monitor inside my case door, and swap out all my Noctua for LED fans :P
Exactly, at 32nm now AMD finally caught up on the design side but they didnt have a fab to actually produce the design into physical chips until now...:rofl: and then Intel will move on to 22nm :rolleyes:
I mean, Core 2 at 45nm was kind of the step AMD took with Phenom II...in all reality AMD was trying to market essentially a competitor to Core 2 Quad against Core i7 @ 45nm...some how they did it successfully...no doubt, they are fun chips to play with and are great for most people, but they were behind the competition as far as a pure performance standpoint. I think Bulldozer will be AMD's "Core i7" competitor, but can they compete with Sandy Bridge? If you look at the past, 2006 to now, you could almost safely say the chips will be at Nelahem/Westmere level. Sandy Bridge, as much as I love AMD I believe will be a challenge...Sandy-E even more.
Yes there are 4 256bit FP units.But why is this important? AMD also supports 256bit FMA IIRC,so if both chips are running software which supports all of their capabilities(FMA and AVX) then benchmarks will show which approach will return better performance. It's performance and perf./watt what matters.
The throughput of a core does not define the number of cores.
Core is an abstract concept. No core is equal so it cannot be used as a measuring stick.
Also it would be very simplistic because a single core (1Thread) will have mispredicts, bubbles, dependant operands (have to wait on others) so not all the resources will be used. This is the concept where HT tries to improve, they use leftovers to execute another thread. So having 2threads over a certain unit will most likely give a higher throughput than 1thread would.
That is the wrong way to think about it. You have integer execution and FP execution.
90% of what happens in processing is integer. Especially in games.
Where, exactly, are you looking to use these 256-bit instructions? Software needs to take advantage of them and it needs to be rewritten. If they can't take advantage then they will not recompile.
Those applications that will be recompiled will probably take advantage of the FMA4 instructions as well, which will present an even more efficient way to handle complex math.
Suffice to say that if you need 256-bit, then you can bet your apps will be there, but without the need, you'll be in 128-bit mode. And in 128-bit mode, we have double the capability in Bulldozer.