Originally Posted by
cantankerous
Hoping someone can sort me out with an answer on this. When dealing with parameters such as memory timings, and more importantly Read delay phase adjust/TRD Phase adjust settings, do these settings directly rely on the memory itself being able to keep up, or is more of a chipset dependability for stability when adjusting these settings? I am sure the memory has to keep be able to keep up but I am seriously thinking the chipset has more of an impact unless someone can tell me otherwise. The reason I ask is this. After many, many lost days due to issues with prime failing I copied the Anandtech article settings quite closely and achieved some success, however, they are using settings that just don't agree well with me at all. At 445 x 7 I can run prime for up to 10 hours as long as sub timings and TRD Phase adjust settings are left at auto. If I try and change any of these, even slightly, I will fail prime, even if it still isn't as aggressive as others have set them with more voltage to boot. I am trying to narrow down the problem so I can solve it but I am wondering if I am wasting time assuming it is on particular part of my setup when it could be something else completely different. Raising volts does squat and I am really hating tuning the GTL's to their ultra sensitivity when being fooled with. My TFRC is 42 default, most have theirs down to 30 to gain some bandwidth without problems yet I can't even do 40 without prime failing. The TRD Phase adjust settings were adjusted just like the article suggested with all set to auto except one on channel two to allow 'breathing space' for the chipset yet it still fails prime. I would really like to get more from my system though it seems 445 is about max without having to go crazy on the volts which makes my already hot temps even hotter. Cpu is at 1.325 in bios, VTT at 1.60 and chipset at 1.61. My GTL's are 115/114/117. If anyone has an idea what is going on please sort a brother out before I punch this thing and give up. I am loving this setup but its not a smooth ride at all for me. Rest of parts are as sig lists. Sorry for being long.