It did for Anand, check out the link?Quote:
Originally Posted by Shintai
I don't care if it is a BTX_LX chip, the end result all that matters. Don't want any chip like nVidia's any mobo I buy.
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It did for Anand, check out the link?Quote:
Originally Posted by Shintai
I don't care if it is a BTX_LX chip, the end result all that matters. Don't want any chip like nVidia's any mobo I buy.
I know, you were playing devil's advocate, I was just playing along. :)Quote:
Originally Posted by Donnie27
Cool!:DQuote:
Originally Posted by bowman
The bridge chip is absolutely not needed, the lock is in the drivers. That, and also the fact that the cards work better without the chip, this is just a dirty solution to enable SLI on X58, just like in Skulltrail. An unneeded chip in the chain can only make things worse.Quote:
Originally Posted by Donnie27
I don't know about the 4870X2 until I test it, but I'll tell you one thing: the 3870X2 does NOT work well. You get about the same FPS of 3870CF, and you get the exact same problems and incompatibilities. Now I have hopes for the microstuttering problem after looking at the early Sampsa's tests, but the 'you need a CF profile for each game, and it has to work well' thing still scares me, and I bet I'll face the same situation I faced when I used 3870CF and 3870X2 for a few weeks with 4870CF and 4870X2. The Crossfire Sideport has nothing to do with this, as it's only a connection between the cards.
I know, remember I called it a DRM ROM chip? I also complained about it down grading Skulltrail's PCI-E's PCI-E 2.0 support back to PCI-E first Gen or 1. Either way, I wouldn't want it on an X58 when I'd planned on using at least a 4850 X2 card. But thank you very much for the info:up:Quote:
Originally Posted by STaRGaZeR
Yes, I remember now :up: Ah man, sometimes I see the day when multi-GPUs will not be driver dependant and appear as a single chip to the OS... then I wake up :( :D
This bridge is just another example of how good NV is at business, earning money for everything. And how they don't care a :banana::banana::banana::banana: about customers dealing with their non-GPU chips crap.
The worst part is that there's a crowd ready to lap it all up and probably even think of it as an 'improvement' on the X58's PCI-E capabilities, because it says Nvidia on it.
Imagine if Nvidia made a laptop, a really really thin one, and a fancy looking phone. :rofl:
I'll wait and see on the 4870x2. I think a lot of folks are leery of driver issues and quality issues, that I'll watch some testing before leaping. But, I don't think the X58 is going to be good with the NF200 on it. New chipsets get their kinks and the last thing I want to track down is some problem that has nothing to do with the X58, just because of some crazy add on chip. If AMD/ATI and Intel can both do (or will do soon) dual GPU devices based solely on plug in x16 slots then Nvidia needs to keep up or shut up.
And there is one thing always to remember, no matter how much you might love dual ANYTHING right now, 6-8 months from now you'll be staring at the newest card and drooling and wondering why you were so crazy to buy dual cards the year before. Anyone remember the dual 7900's? The industry advances quickly so sometimes picking your current poison in a single format and ditching it in 6 months is better strategy.
Anyway, Nvidia is mucking around trying to make a buck and they will end up making less than will have been worth it by mucking around. And ATI has to prove they really have it together this time around. Profiles for every game is ridiculous as well.
I hope the Mo$#@%fu@#ing Mother Board makers are listening to some of us.Quote:
Originally Posted by STaRGaZeR
I hope like hell they ship a no non-sense X58 board/s with one PCI-1 2.0 slot and void of any stupid crap-o-la.
i dont think you will see a board with one pci-e 2.0 slot, i think 2 will be the minimum, remember its a highend chipset for highend boards. :up:Quote:
Originally Posted by Donnie27
So we will have to wait until 2009 for mainstream chipset (P55) and mainstream boards? :shrug:
Mainstream uses PCIe ondie on the CPU....its just coupled with a southbridge.Quote:
Originally Posted by Kingcarcas
But yes, 2009.
Just a wish, I know it is unlikely! As was said already, at least ship some with two slots and no nVidia crap on it.Quote:
Originally Posted by Hornet331
Very sad and very true!Quote:
Originally Posted by bowman
So is 6gb 2x3 going to be an optimal format for Nehalem? If there are 6 memory slots 2 for each mem channel then it seems it would make sense to either populate 2 slots at a time and fill each channel up to it's dual capacity or else fill 1 slot for each channel.
Trying to sort this out.
Anemone, it will be better to fill each channel with just one module to keep Command Rate at 1T.
ty :)
you can run 1T even when you have 2 modules on one channel, at least on the X38/X48. :yepp:Quote:
Originally Posted by doompc
Haven't 1T always worked even with a single module? I remember it did back in the s939 days. I have read that Intels current 1T aren't the same as AMD's back then. This could matter little, but have T1 ever had anything to do with multiple modules?Quote:
Originally Posted by Hornet331
It's not the same because Intel uses faster larger cache setups. Then if that fails, Intel uses Smart Cache and Smart Memory Access. 1T or 2T just is not that critical on Core 2 of any kind. These features almost remove most of the negative effects of Intel's FSB.Quote:
Originally Posted by Seraphiel
Nehalem is supposed to have even faster cache and less of it since large Caches also removed dependence on the FSB. No FSB means less cache is needed.
well, the entire point of cache is that you hope that the majority of your data is in your cache which is one die so you don't have to go off die and search for it in memory. That's where prefetching came in for Intel
You said that if the larger cache failed, then they'd use smart cache. but the only thing that smart cache was...was the ability to divide the L2 cache up among the cores.So i don't see how that would take over if your data wasn't in memory.
True but I meant failed as in couldn't hold all of the data. Then there's using it to assist new features that aren't even talked about much. Running two OS simultaneously, encryption, safety features and etc..... Just look at Vista sucking up CPU cycles and RAM. It eats up cache as well.Quote:
Originally Posted by Fuji
Little exposure again :clap:
http://i245.photobucket.com/albums/g...m/WPrime_G.jpg
...
Quote:
Originally Posted by JCornell
Only 17Ghz NB :p:
You need a wider task manager :eek:
lmao, when i looked at that screenshot for the first time i was just like "wtf, what program is this" and then i realized it's the task manager :rofl:Quote:
Originally Posted by STaRGaZeR
looks so alienating :p:
nehalem is really an impressive architecture, but there are so much things i'm confused about and i don't like the way of intel seperating performance/mainstream the way they're with nehalem.
with this platform you can't to that and with this one you don't have this and that and whatnot...
i think i'll skip the first nehalem wave and just wait lol
So they greyed out the 'rated FSB' field.. But the NB is now 16GHz.:rofl:
I wonder how long till CPU-Z detects Nehalems properly?
lol, movieman better should prepare at least 6 new pants. :ROTF:
but seriously 6secs in wprime is insane. :eek:
Will this translate to higher performance in 3d apps though.Quote:
Originally Posted by Hornet331
Perkam
That was awesome indeed...never saw such a thing :)Quote:
Originally Posted by Hornet331
na, i dont think so games are far to gpu limited when you crank up the res (1920x1200 and up).Quote:
Originally Posted by perkam
But it will do wonders for crunching/rendering/encoding. :yepp:
I suggests MovieMan no need to wear any pants while seeing this ... So he won't need bother to wet his pants or prepare a new one :rofl:Quote:
Originally Posted by Hornet331
j/k :)
Still working on it though :up:Quote:
Originally Posted by bowman
Nice work JC!
perdy :)
...
http://i245.photobucket.com/albums/g...rueCrypt_G.jpg
Quote:
Originally Posted by JCornell
holy **** nearly a 1gb/s in ASE encryption :eek:
JCornell: Very nice TrueCrypt results. Thanks!
CpuZ is working now :clap: , someone care to bench the HWINFO32 ? :D
http://i245.photobucket.com/albums/g...em/cpuz_hw.jpg
...
Wow @ Truecrypt results.
as you wish. :up:Quote:
Originally Posted by JCornell
http://img292.imageshack.us/img292/9138/hw32nk5.th.jpg
lol....Quote:
Originally Posted by Hornet331
i almost gave him a heart attack yesterday. :T
cant say more.
JC, you make me jealous. :rofl:
I want a gainstown!!!
Doubling the cores from Yorkfield to Nehalem gets us :Quote:
Originally Posted by Hornet331
4x the CPU benchmark ( Int ?) - more ALU power
3x the FPU one - the IMC does its work, FP likes BW
2x the MMX one - as expected with the same units , not sensitive to BW , scaling is good
The memory score of Nehalem is very low , though , should be over 30GBs.
Thirdly , looks like Nehalem is in SpeedStep mode , NB running at 2.66GHz , core is 1.6Ghz. Strange...
What about full speed , is NB frequency equal to core frequency ?
yeah i wonderd the same, mem score is kinda low...
Quote:
Originally Posted by Hornet331
THX Hornet311Quote:
Originally Posted by savantu
I'll perform it on Bloomfield to compare ... ;)
@Hornet311 : what disk you uses ? My result is already uses SAS HDD though ... :rolleyes: weird ...
1.6G is EIST enabled ...
About the Memory, No idea really, hope next BIOS can enhances more ... or the initial software doesn't really work for triple channel or QPI ... :shrug:
FYI, previous BIOS was sucked, enable HT potency is lower than HT disable :rofl: Unfortunately latest BIOS has been modified well enough ... but still crippled, can't install more than 12Gb RAM :mad:
Actually still wait for Tylersburg Rev.B1 ;)
But I don't saw his appearance ... :ROTF:Quote:
Originally Posted by NaeKuh
Or He's still busy to dry his pants ? lol :rofl:
j/k
Quote:
Originally Posted by JCornell
nice looking forward to that. :up:
Nehalem is like Barcelona: its NB frequency will be different than it's core frequency.Quote:
Originally Posted by savantu
Can you snap pictures of the BIOS (just for curiosity's sake) or is that too sensitive?
Sorry, I think that's too much :p:Quote:
Originally Posted by bowman
Curious from what exactly ? Maybe I can try to describe it ... ;)
Well, nothing specific actually, just wanted to see how they implemented new stuff like SMT, IMC, QPI.Quote:
Originally Posted by JCornell
I realize that it's a bit early to expect all the software to work properly, but do the temps recorded seem to be correct? I'm not sure exactly what your benching setup is (aka what cooler you use), but temps of 50C or so while at idle are kinda high. Addition of the IMC, etc. would sensibly increase the temperature of the chip, especially as speeds increase. If this seems correct, then water-cooling will become even more necessary for decent overclocks on these chips.
http://www.digitimes.com/mobos/a20080724PD205.html
Thought this may be of interest.
Yes, Intel has already stated as such....http://techreport.com/discussions.x/14950Quote:
Originally Posted by Shadowmage
The difference is that AMD uses FIFO buffers between the L3 cache and and the other cores to absorb the clock skew... this causes the high latency observed with the Barcelona L3 cache.Quote:
The processor runs all of its internal components—the CPU cores, memory controller, and I/O—in a decoupled fashion, so one can tune their respective frequencies and voltages independently. This isn't a new idea, Kumar stressed, but Intel's implementation is new in that it uses a synchronous interface between those components. Most past implementations have asynchronous interfaces, he claimed, which result in both higher latency and indeterminism—"if you test five different systems, you will get five different results."
It seems GTN boards have a mux on the SMBus SPD, that's why HWiNFO32 and CPU-Z read only 1 channel's memory modules.. Should be controllable via ICH10, but no idea which pins..
QX6850 @3.66 GQuote:
Originally Posted by JCornell
The score in HWiNFO32 is so high, because it's multithreaded and uses all available CPUs (cores and HT units) so it assumes an application is capable of well using all resources.
You might try to run HWiNFO32 benchmark in single-thread mode and compare the results. Then you get the pure single-threaded performance gain.
Anyway, don't expect too much from this B0 early sample. There are still many errata inside...
Quote:
Originally Posted by JumpingJack
I will re-run it... I bumped down to 3.33 Ghz just now. I just finished putting the rig together -- notice speedstep was on in CPUID.Quote:
Originally Posted by Mumak
Dman Asus, buggy BIOS and all ... I only dinked with multipliers, if I set multipler to anything but auto, the speedstep diable option disappears. Setting it to auto and disabling speedstep, then upping multiplier re-enables speed step.
EDIT: Yeah, Nehalem looks too large from JC's run. It scales correctly at 3.33 Ghz to expected.
http://www.youtube.com/watch?v=OMnwpbQ4AHw
This might be of interest too..
Basically, Pat says his keynote is going to make you :banana::banana::banana::banana: your pants and you suck if you miss it. Ha. I agree, though. :yepp:
Quote:
We're gonna disclose the next level of details around the microarchitecture, some of the way cool technologies that we've kept a secret 'till now, and finally, some of the productization plans for Nehalem coming to the marketplace.
To compare: QX6700 @ 3466 (13 x 266 MHz) ; 800 MHz CL4.4.4.12 T2 DDR2 ; RaptorX 150 GB
Quote:
Intel brings forward Nehalem launch
Originally scheduled to launch in November or December this year, Intel's Nehalem-based Bloomfield processors will now launch in September along with X58 chipsets, sources at motherboard makers have revealed.
However, the sources pointed out that CPUs and motherboards will not officially appear in the channel until early October.
Since Bloomfield CPUs are not socket compatible with previous Intel platforms, the accelerated launch is not expected to cause competition between the company's own products, although the same cannot be said for AMD's scheduled AM3-based CPU launch, noted the sources.
DigiTimes
:up:
Hot damn! time to start saving my pennies ;)Quote:
Originally Posted by mascaras
Bloomfield 2.93Hz @HWINFO32 Multithread
http://i245.photobucket.com/albums/g...halem/HW_B.jpg
...
Nice result compared to Hornet's system (2.93Ghz vs. 3Ghz).
Maybe a new Everest beta can run on your platform?
http://www.lavalys.com/beta/everestu...vcal8ksjdc.zip
Already try it over and over again everytime Everest released the newest version, Gainestown/Bloomfield platform all blue screen :rofl:Quote:
Originally Posted by Ruroni
@ JCornell
can you do the HWInfo32 benchmark single threaded?
Thanks
Chris
A couple people have now mentioned that B0 is "old silicon", and they are waiting for B1, etc.Quote:
Originally Posted by Mumak
Anyone know when B1 will tip up in the hands of our "early reviewers" :) ?
Is the only-using-1-memory-channel issue a B0 problem, or a motherboard thing, and does B1 fix it if the former?
There won't be a B1, but a different one..Quote:
Originally Posted by terrace215
C0? C1? I guess it must've qual'd at this point if they are bringing the launch into Sept/early Oct.Quote:
Originally Posted by Mumak
Hmm...6sec in Wprime32 @ 2GHz is a little bit weaker then a Skulltrail at 4Ghz :D
^LOL
:D:D:D
xTreme
I'm also curious if the memory channel issue is CPU or board related... any insights JC?
-Chris.
i dont know how reliable hw32 info is in this department, just look that the compare table, all values are rather strange...
Everything is relative in the benchmark area. There are too many factors that influence the performance and in fact you cannot say: CPU1 is 30% faster than CPU2. You must consider how a particular benchmark is build, what kind of code it contains and how it's compiled.
Let's say you have a benchmark for CPU integer operations compiled with Visual Studio 6, optimizations for P6. Since every CPU generation brings new instruction sets and new kind of optimizations, such code cannot tell you a real performace increase for a new generation. You also need to consider what kind of instructions are present, memory operands, branches, loops, how are the instructions and operands aligned. Very important is the compiler and optimization option. You can perfectly optimize code let's say for the Conroe family, but other families (e.g. Nehalem or K10) might require different optimizations in order to perform even better. So what's the best option? Different code for each family :brick:
I personally don't trust any benchmark because it simply cannot give you real numbers. The only usable comparisons are real world applications.
Quote:
Originally Posted by Hornet331
I am guessing C2,3 maybe even in a D series. This is a pretty aggressive lurch for Intel.Quote:
Originally Posted by terrace215
Why start with 2 or 3, when you can with 0 ? ;)
Quote:
Originally Posted by JumpingJack
...btw, how is nehalem pronounced correctly? ne-ha-lem? ne-hale-em? am just wondering all the time :p:
http://de.youtube.com/watch?v=fet-Tr...eature=relatedQuote:
Originally Posted by RaZz!
7 secs in to the vid.
Some preliminary typo for ref ... :shrug:
http://i245.photobucket.com/albums/g...lem/Type_B.jpg
...
i wonder how much performance impact the faster QPI has.
Nothing I say. Or close to nothing. Maybe if you have 4 GPUs and 12 disks and 12 USB devices :p:Quote:
Originally Posted by Hornet331
For uniprocessor platforms probably none. HyperTransport clocks doesn't make much of a difference for AMD at least. Besides, either one of those are on an entirely different scale than the FSB.. If it turns out to make a difference, just overclock. It's not stocksystems.org is it? ;)
Now JC is just making me wonder what he's blanked out above 'Turbo' there... :cool:
Also, does this mean 'Turbo Mode' is confirmed in some way on the desktop or are they still deciding whether or not to include it (TBD)? It seems like it'd fit their 'dynamic, scalable' thing quite well.
Shintai?Quote:
Originally Posted by Movieman
^
lol way to go, start your posting career here. :rofl:
lol. wrong :p:Quote:
Originally Posted by Shintai
NO WAY MAN!!! Wrong, just how some people called it fe-num, while i stand by Pheee-nom. :p:Quote:
Originally Posted by Hornet331
Pronounce phenomenal and leave off the enalQuote:
Originally Posted by Kingcarcas
fe - nom (short e)...
Pheeeenom sounds like a urinary disorder.
Call the city chamber of commerce:Quote:
Originally Posted by RaZz!
http://en.wikipedia.org/wiki/Nehalem,_Oregon
ask them how they pronounce their own town. It is near the Nehalem river, which Intel will often (not always) use river names geographically located near one of their sites as code names.
Sorry, that blanked part is SMT :p:, My mistake to cover it wrong ... :ROTF:Quote:
Originally Posted by bowman
TURBO is still TBD for 1S, but 2s is already fixed ...
Nah, I got 5 sec 920ms with a dual harpertown at 3603mhzQuote:
Originally Posted by Monstru
That Nehalem score is impressive as all hell at 2ghz
Probably i'm wrong :p:,but wasn't it actually a 2S geinstown@3Ghz that scored 6s in wprime?I'm looking at page 30 i think.Quote:
Originally Posted by Movieman
They are 24-32GB per link, 12-16GB/sec per direction.Quote:
Originally Posted by Cooper
So something like 2 cards wont do squat for sure. We dont even have much problem today with some 8-12GB/Sec link with memory on top (FSB).
'Turbo' is this thing I read about where it will clock down other cores and increase the clock on one or two cores to boost performance in less threaded apps while staying within the TDP? Or something different?Quote:
Originally Posted by JCornell
jup.Quote:
Originally Posted by bowman
Exactly.Quote:
Originally Posted by bowman
The NHM is the 1st CPU that is aware of its own TDP. This is a very interesting feature, but that also limits the "external" control on it. Whatever clock and voltage setting you apply, the CPU keeps having the last word.
In HWMonitor I tried to show the CPU TDP as it sees it, but I'm not completely sure how accurate this is.
http://www.cpuid.com/pics/nhm_03.png
Sounds like a candidate for BIOS makers to me.
If the greatest achievement of Nehalem is less control for the user I'll have to wait until they figure out something clever before I jump on it.
I remember reading this:
http://www.bit-tech.net/news/2008/06...t-on-nehalem/1
Brrrr. :(Quote:
Intel's EIST and C1E states for clock changing to save power will now work 56 percent faster in Nehalem and the chip frequency will also adapt to power supply voltage changes and vDroop - this should make a system ever more stable, but we think it might push enthusiasts into looking for the best motherboards and PSU combinations that completely minimise this clock down effect, especially if it affects performance figures.
Intel even dropped an interesting titbit that it was thinking about completely decoupling itself from rated frequencies because of the constant clock changes, however it found customers and retailers were very much against this move. Despite the fact that, internally, the CPU is constantly adjusting its clock speed, from the outside it appears like a fixed frequency due to overall averaging. No doubt this continual variation will surely make our job testing hardware reliably that much more difficult though - it depends on the level of clock changes and the quality of motherboard and power supply.
Finally, Intel also mentions in its documents that the Duty Cycle adapts to transistor variation and lifetime stress - does this mean that even if your CPU isn't made as well as the next guy's, instead of dying outright it will reduce the time that part is working. Does this translate into reducing the core frequency over time?
Dual Barcelona @2156MHz for comparison
hmm so single socket nehalem beats dual socket phenom in cpu/mmx and loses in fpu... this benchmark sure acts strange. :p
Yep strange benchmark,but it ends quickly, at least :).Quote:
Originally Posted by Hornet331
Anyone care to comment what system scored 6s in wprime?I see you people are talking about 2Ghz 2P Geinstown but all i see is 2x3.07Ghz system in that screenie (page 30) with power saving on...