[FUD] Nehalem also has a TLB bug

Next rumor by FUD: "Next Nehalem stepping will be 10% faster due to TLB bug fix".

Can't get the point why people are wasting their time reading FUD.

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Originally Posted by savantu

Huh ??

AMD's problem was huge compared to this nitpickin an errata list.AMD's problem was that K10 failed validation at major OEMs , that's HP,IBM,Fujitsu,etc.When that happens you're royally screwed.Those major OEMs didn't want to touch K10 with a 10 ft pole.
When you ship servers in mission critical areas ( industry, banking,etc ), a once in a while system crash ( which wasn't so rare in virtualized environments it seems, which btw is the current hottest trend ) is simply not acceptable.

Chips can have hundreds of errata , as long as they pass the most stringent validation requirements you're fine.
The difference is that with K10 people in the industry started whispering and gossip sites picked it up ; in this case a dude searched an errata list ( guess what genius, that's published after validation => wasn't considered a game stopper ) and sent a link a FUD.

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I might be mistaken here, but I remember that they passed validation after disabling L3, didn't they?

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Originally Posted by m^2

I might be mistaken here, but I remember that they passed validation after disabling L3, didn't they?

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Major OEMs started shipping K10 servers only with the B3 stepping.

Considering every processor has faults and that Core 2 was just the same, I see no problem here.

Do any of the older people here (35+) remember being taught in school that computers don't make mistakes, people do. Hmmm, I guess those teachers were very wrong.

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Originally Posted by freeloader

Do any of the older people here (35+) remember being taught in school that computers don't make mistakes, people do. Hmmm, I guess those teachers were very wrong.

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People make computers, and people are not perfect : computers are not perfect.

Nope. The designer or human made the mistake. The computer is doing what it was designed to do.

edit - Zucker beat me to it.

http://download.intel.com/design/mob...pdt/320121.pdf - page 52
http://download.intel.com/design/pro...pdt/318733.pdf - page 47
http://download.intel.com/design/pro...pdt/313279.pdf - page 71
Just compare and see.
This TLB bug issue just doesn't exist and there won't be any BIOS fixes...

Found with xoqolatl, who ehen have written some small news about that ;)

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Originally Posted by Ghostbuster

"isles" or "aisles"? :D

Anyway, which reminds me http://www.theinquirer.net/en/inquir...l-ceo-confirms Charlie in the bunny suit is much funnier... :rofl: :ROTF:

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I identified myself and the publication, The INQUIRER, now partially owned by the Carlyle Group, [...]

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huh, didn't know that.

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Originally Posted by kl0012

How does FUD assume that this is a bug? In the linked document it is labeled as "clarification", not errata.

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It's a disease of the lobe of the brain that controls cognition and reasoning. They don't have a name for it yet, and there is no cure, but I'm sure scholars are studying it. Maybe they will find a cure one day. :ROTF:

Nehalems do not have TLB bug :) ... FUD is just being ordinary, posting BS ... :shakes:

http://www.guru3d.com/news/core-i7-has-a-tlb-bug-/

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Core i7 has a TLB bug ?
By Hilbert Hagedoorn, December 2, 2008 - 5:18 PM




Yikes .. it's a deja-vu as the same thing happened with AMD's Phenom processors. The colleagues over at Fud Zilla reported that Nehalem procesors has a Translation Lookaside Buffer bug. Intel actually officialy states in its Intel Core i7 Processor, Extreme Edition Series and Intel Core i7 Processor - Specification Update PDF, that the CPU has a TLB bug.

If you open Intel’s official document here, on page 37 AAJ1 Clarification of TRANSLATION LOOKASIDE BUFFERS (TLBS) Invalidation part, you will see that Intel says that in some rare cases improper TLB invalidation may result in unpredictable system behavior and can hang your OS or result with incorrect data.

"In rare instances, improper TLB invalidation may result in unpredictable system behavior, such as system hangs or incorrect data. Developers of operating systems should take this documentation into account when designing TLB invalidation algorithms. For the processors affected, Intel has provided a recommended update to system and BIOS vendors to incorporate into their BIOS to resolve this issue."

The BIOSes to workarround the TBL bug already are in place and it seems that this fix has very little effect on overall performance. AMD at the time simply switched off the entire TBL, and as to what Intel precisely did to address the issue .. is not yet known.

The BIOS update was issued on 14-11-08, before the products actually hit retail. In Intel's defense, so far everything we tested .. was 100% stable and extremely fast. But we'll report more once we hear more.

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Closed...