My guess still stands for 8150 @CB11.5 --> 8.75pts.
Printable View
My guess still stands for 8150 @CB11.5 --> 8.75pts.
Why should you care? Feel hit by the post of mine? There are 2 people in last pages that I meant and one of them was you. Quite amazing. Bullsh1t? Oh no. The difference is that I don't buy all for a dollar and knows whats lie and not (yeah JF will confirm under my post). But yeah please continue with the facts of your and your "reliable" friend.
Ohh thanks for the bright news! I don't think and I have the info to make me silent and not making fun of myself, especially with that attitude you have, but I understand why ;)Quote:
Are you aware that AMD has sent confidential datas to some press ? Do you really think that data directly from AMD are indeed faked data ? :confused:
Everyone here needs to understand that marketing =/= PR.
The room was full of press guys, I was there. Anything that came out of the room was shared with everyone in the press. It was all captured on film.
Yes, back in august there were all kinds of benchmarks on "final" silicon. I could not mention that we had not reached production silicon either.
The funniest thing is that I could give 2 people (an intel fanboy and an amd fanboy) the exact same piece of silicon and both could give you different benchmark results. Why would anyone assume that all of these fake benchmarks, if they were real, were actually on an optimized system? Couldn't you run a 4200RPM HD, 800MHz memory, and play all kinds of BIOS tricks? I know that I could probably get about 80% of the optimizations done to get the best performance out of a platform, but I know I could do 100% of the things that would sabotage performance. If you think about it, AMD is not releasing info, so the stuff that is floating around (if it is even real) is probably from people not friendly to AMD. And somehow everyone is trusting those results. Nobody ever questions the motives of the people supplying this info, but to be fair, because it is third or fourth hand (some guy I know who has a friend who has an uncle that knows a guy in...) how can anyone vouch for the results.
Well you need to refresh your memory. Zambezi is launching soon.
And no,I don't have anything in common with those guys. I'm just being a realist now,not an optimist who based his expectations on power point bullets.
Actually those sisoft numbers are quite good in SIMD department and not THAT bad in integer part,IF Turbo was off. If Turbo was on,then integer is abysmal (compared to Family 10h) and SIMD is still good. All this on "unoptimized" platform.And all this if the test is even real.
No I needn't. Empiricism means nothing to me, history was history.
There's a word that better than realist and optimist - neutral, and you could post less. And I will post less, everybody should post less.Quote:
I'm just being a realist now,not an optimist who based his expectations on power point bullets.
These days I'd love to silent myself but often couldn't bear some weird comments flying around my ears and eyes. I'm tired.
too bad we can't have everyone see the glass either half full or half empty
instead we get half screaming the glass is full and the other half screams the glass is empty!
where the hell is reality when you need it?
Quoted by JF-AMD
Quote:
Yes, back in august there were all kinds of benchmarks on "final" silicon. I could not mention that we had not reached production silicon either.
The funniest thing is that I could give 2 people (an intel fanboy and an amd fanboy) the exact same piece of silicon and both could give you different benchmark results. Why would anyone assume that all of these fake benchmarks, if they were real, were actually on an optimized system? Couldn't you run a 4200RPM HD, 800MHz memory, and play all kinds of BIOS tricks? I know that I could probably get about 80% of the optimizations done to get the best performance out of a platform, but I know I could do 100% of the things that would sabotage performance. If you think about it, AMD is not releasing info, so the stuff that is floating around (if it is even real) is probably from people not friendly to AMD. And somehow everyone is trusting those results. Nobody ever questions the motives of the people supplying this info, but to be fair, because it is third or fourth hand (some guy I know who has a friend who has an uncle that knows a guy in...) how can anyone vouch for the results.
I can't speak for anyone else around here, but I sure am upset that AMD can't even tell us when the NDA lifts. What financial damage is going to happen from releasing such a date? The NDA is under NDA, what a crock of :banana::banana::banana::banana:. Share a little information with your "loyal" customers for once. I would understand if you had no idea when you were going to release the product, but you must have a concrete date by now for BD's release.
because that date has probably changed as the release date has changed. the moment someone says the NDA is up, chances are it means the product is coming out in that next week. theres no need to feel hurt because they have a business to run. why not be happy they showed us what kind of air/water OC we can expect.
Partially agree on that. Organizing that OC event was public relations (the action of a company in promoting goodwill between itself and the public / the community etc).
But then, setting a new world record and letting anybody know was marketing (the total of activities involved in the transfer of goods from the producer to the consumer, including advertising, shipping, storing, and selling). ;-)
Maybe because you can't OC a CPU that's not available and even more because that CPU was supposed to be available somewhere between one month and a half ago and two weeks ago but instead it doesn't even have a launch date (not to mention availability :rolleyes:).
so we go look at concept cars because we want them, and the moment they say its not going to be anymore than a concept we call them horrible names and buy the competition, but all AMD is doing is trying to get things finished up, and theres so many things going on here. new arch, new node, new company building these chips, its ALOT of risk. the fact that opteron is shipping means they wont just make this product go away like larabee, it will be here, people just need some patience.
Some new info from OBR. This is something interesting to talk about, IMHO:
"Little secret: In Windows 8 (Development Release) is not Bulldozer chip as "8 Core - 8 Threads" but 4 Core - 8 Threads! AMD went out with the truth ! ! !"
IF Windows scheduler thinks this is an octo-core, and the threads go to whatever core is free, then you could have 4 threads running on 2 modules, which is far from optimal performance. Don't you think? It would be better to treat the CPU as a 4c/8t, the same way Intel HTT works.
A core can be called a thread, but a thread might not be called a core. It depends on how 'big' the thread is. Some latest leak(despite the score) show that it only has 4.8x speedup in cinebench, if it's not a bug or crippled then the second integer core is much 'smaller' than expected, in this case I think it might be called a thread.
EDIT: I won't assert anything cuz something we can see now is weird, not only the crappy benchmark, but something,...
Depends if you want to use Turbo mode or not. I.e. that feature might be interesting for OC, but not for the typical Joe Sixpack enduser.
@JF-AMD:
Just found that comment from the x264 lead developer, they are interested in hand-coding for XOP:
http://forum.doom9.org/showthread.ph...43#post1507243Quote:
XOP: possibly, but I need SSH access to a Bulldozer to do such optimizations.
Contacts: http://x264dev.multimedia.cx/about
It is an old message from June, but just in case if nobody @AMD knows him, still: Please help that guy.
I guess I do not need to tell you something about x264 and its importance ^^
Thanks
Opteron146
You asked "why not be happy they showed us what kind of air/water OC we can expect." and i answered.
Why should i be happy about how it overclocks if i don't even know how it performs.
As for your concept car stuff... sorry, i couldn't make any sense out of it :shrug:
Windows has been multithreaded aware (SMT at least) since XP, however, aware and 'optimized' are two unrelated terms. Vista did not improve on that, but Windows 7 implemented SMT parking (google it, you will find several references). While not nearly perfect, the improvement in performance in lightly threaded applications can be quite high. Though completely different architecture, BD may or may not benifit from scheduling threads across modules as opposed to within module, but it would make sense that Windows may initially view a module as a dual threaded 'core' and enumerate the contexts as such and take advantage of better scheduling. Total guess but it would make sense. I, personally, would take this with a healthy dose of skepticism until both final silicon and final Windows builds are actually released.
Yes, it's an anagram of DNA. What did I win ? :)
For me, it's the same thing as movieman (or whatever his name) saying that AMD has a winner etc...
Why is there still an on going discussion of core's modules.........
I don't give a rats ass what Marketing calls the chip.
AMD's patent draws a clear picture. They say a picture says a 1000 words right? AMD's own picture for there own patent.
Note core 100 not module 100 aka core 0, and then inside core 0 is 2 clusters A and B.
Case closed.
Attachment 120124
I guess it doesn't matter how marketing calls it and you are right chew*. What matters is performance. If it fails to beat X6 thuban in multithreaded workloads then it doesn't warrant an 8C marketing name IMO. They would be better off calling it 4C/8T part since in this case they would get praised for being much faster than X4 in many applications. But this way,equal or barely faster than Thuban with sky high Turbo clocks ... It is not going to bring them much praise in reviews.
Only reason I have tried to point this out many times so far is due to peoples expectations. Those expecting 100% native 8 core multithreaded performance have unrealistic expectations. Hopefully this gives them a better idea so they can have more realistic expectations.
a good marketing team can take anything and make it sound good
8 cores for the price of intels 4 cores
vs
our 4 core chips are faster than intels 4 core chips (pending perf results)
see.
Well to be honest,they already said so @ Analyst Day presentations. They stated "80% of CMP" approach while having less die area and less power draw. So this 80% means 0.8x the performance of "native" X8 Bulldozer,done the old way of stacking cores next to each other. In other words,without knowing if they actually improved the "cores"/clusters versus K10,the speedup is a far cry from 33% more we have on paper and in marketing slides.
tell that to apple, but your absolutely right that only engineers create the product, while marketing create the demand.
but you need both, and some companies depend on one more than the other. we all hope that a great product will sell itself, but that just isnt true these days with how much marketing affects our lives. and i dont mind some of it where they try to push the good features of a great product, but i cant stand commercials which make their products appear as a necessity rather than a luxury, or convince someone they are inferior until they buy it.
the benchmark im waiting for is OCed gaming perf for a price range vs the competition. Cores and Hz dont mean crap until then.
So...example 4C/8SMT> 6C/6T ??? Efectivity 6C is about 5.5x example, then 4C/8SMT could be about 6.3x?
Well 80% of CMP is 1.6x to be exact ( or 25% lower than perfect scaling). 4 "real cores" as chew said,both with 2 hardware threads running on them,should therefore get you around 6.4x or 6.4/5.5=1.16x speedup over 6C Thuban,provided same clock and same IPC. We have hints that IPC may be lower sometimes and higher sometimes. Also we have 9% higher base clock than 1100T. All in all,20% faster than 1100T should be the expected result,but as we can see from cinebench result for example,it is not faster. Maybe there are corner cases where modules don't perform so weel and some cases where they perform exactly like 2 cores. So it averages to say 1.5x or so.
80% is the second thread, so it would be 1.8x not 1.6x. i asked this to JF on an AMD blog he did a while back.
Ok ,think about it like this : 100pts is a base number for 2 full core performance running some workload,so performance without any "compromises". Call it hypothetical dual core bulldozer done the old way. 80% of this is how much? 100x0.8=80pts. How slower is this than the CMP BD used for comparison? 100/80=1.25 or 25% slower. Or if you want to use 100pts as a base for single core and even count non-perfrect scaling(95%) due to software scheduling limitations : 1 hypothetical BD core 100pts,2 of those in CMP design 195pts. 80% of this is how much exactly? 195x0.8=156pts. How much slower than the hypothetical BD is this? Yes, 25% : 195/156=1.25 .
How about official AMD slide? Is that way off too?
Attachment 120134
Read carefully what it says at the bottom. Where does it say exactly ,in official AMD presentation,that second core adds 80%? The whole module has 80% of CMP performance while having less die area and less power. CMP approach is 2 cores done the old way,or if you want another AMD slide ,here it is:
Attachment 120135
http://blogs.amd.com/work/2010/08/30...ge-1/#comments
Quote:
Manicdan August 30, 2010
the 80% thing is still confusing many,
If I have 2 cores, I get 100% ontop of the 100% of the first core = 100% each
If I have 2 BD cores in 1 module, do i get 80% ontop of the 100%, for 90% each
Or do we get 60% ontop of the 100%, for 80% each?
Considering the 50% performance increase over MC, there really is no wrong answer here, but it does play a very fun role in the conspiracy theory math we like for trying to determine single threaded performance
John Fruehe August 30, 2010
It is all about throughput. To your question it is like 90% each.
One thread on one core = 100 units of throughput
Two threads on two cores in the same module = ~180 units of throughput
Two threads running on 2 cores in 2 different modules = ~200 units of throughput (I know Amdahl’s law says it won’t be straight scaling so it is actually less than that, just relax on that one for a moment.)
The point is that there is a small penalty for a shared environment. But, what is the payoff for that? How about more cores. If we did not share resources, that same die space that holds 16 cores might only hold, perhaps 12 cores, or so. (NOTE TO CONSPIRACY THEORISTS: this is just for example, don’t start making die space assumptions….) Would you give up 20% performance (or less) in order to get 33% more cores? If your application was highly threaded you would do that in a heartbeat.
People are fixating on what you give up by sharing and not what you gain. Think of SMT. You share integer pipelines. But in the example above, you would only get ~120 units of throughput vs. the 200 units of two full cores. So that penalty is 80% for sharing. Funny that nobody ever brings that up.
Well he is marketing guy,the presentation I linked was done by the chief architect,Mike Butler. Who do you think knows better?
Note also that it was said that it was average figure. This means performance can be equal or better to CMP (so yes 1.8x applies) or 1.5x or even lower in some corner cases. It all depends on micro benchmark used. What matters is an average and it is 80% (of dual core CMP approach).
or it means that on average the second core gives 80% when looking across many benchmarks. which makes sense to me because its talking about die size and power in the same sentence. why say 80% perf when your comparing one module to 2 cores, it makes more sense that the extra core costs less area than a traditional core and uses less space.
EDIT
btw if the second core is really that weak then it means single threaded stuff should be very strong.
Because the whole presentation was about a module and not about a single core running on it.... You can even see it,it's so painfully obvious. It talks about 2 hardware execution threads,the good predicatbility of their performance(which they estimate to be 80% of the "old" CMP dual core approach). Read the first bullet point: "What it(:module) is? A monolithic dual core building block that supports two threads of execution" Then at the end: "Customer benefits: Estimated average of 80% of CMP performance(this is 2 cores by the way) with much less die area and power" .It clearly speaks about the module since the module now has much less die are than 2 cores done CMP way.
edit: sorry for bold parts,I just had to point out the obvious in the slide since it somehow escapes you guys.
edit no2:
Single thread should be definitely stronger when running alone on the module,similar goes for SB and Nehalem. The difference is that this single thread should be a lot stronger than a single thread of SB (not directly compared but compared when both run on isolation on their respective cores/modules).Quote:
Originally Posted by Manicdan
SB sees 0-30% speedup with SMT on. Bulldozer module sees around 1.6x speedup on average.This tells us that there is no erratic behavior with module approach and that is at least predictable. You can expect 10-15% better single thread result than what you would get from multicore scaled result.
The question is : is that single core running on a module alone still noticeably faster than K10 core? If it isn't than multicore result will be a lot less better and you won't see 33% better scores over Thuban at similar clock. You may see 10-20% better ,depending on application. Maybe even less than that (as cinebench indicates-no better than Thuban ...).
This again?
I can hardly wait to hear the kind of arguing that will ensue when they subtract the FP unit out of the module and send all the FP/SIMD work to the GPU. How many cores will it have then?
i tried to get clarity on what the 80% was because its clearly confusing people,
i got an answer, and i trust that answer until we are told it was a mistake.
I have no problem with that :) . But you have hints now,by a several users (chew* being the most respected one) that this "8C" part performs more like 4C/8T part,which is perfectly in line with Analyst Day presentation. And you have some benchmarks too,although on non final hardware,that shows similar behavior (100x mentioned cinenebench). Note that the cinebench score from far east matches what *M* said in the press briefing some weeks ago.
BTW Manicdan,from the same link you posted ,I have found this:
There you go,even JF said it.Quote:
Originally Posted by John Fruehe
Frankly, I think you guys are trying to extrapolate too far from too few data points. These statements like "80%" and "IPC increases" aren't enough information to derive a statistically useful prediction, IMO.
bulldozers front end isn't bigger then a phenom II x4.
it still the same 2 way 64kbytes. In the instruction cache.
.....:wth:
Get it here, if you have the AsRock 990FX Extreme4 board:
http://www.asrock.com/mb/download.as...xtreme4&o=BIOS
Thx@Ronny145.
Should be now really the final version, last version that I saw in the wild was V0.0.9.2
I hope all the testers will get that an Update soon, too.
@xsecret:
Which Agesa were you using? Did you already have a beta BIOS for your board with V1.1.0.0?
Do you think new Agesa version is going to bring any difference? How much of a difference did the previous change bring? (sorry I didn't track the numbers but I know chiphell user did post something related to this;IIRC he got somewhat better numbers,primarily due to Turbo functioning better).
The first leaks were done with an Agesa 0.0.4.X, these were the ones around April, cinebench score was @4.8X with that. Currently we are around a score of 5.8, with 0.0.9.X. So it gave a nice speed-up, however there was also the change from B0 to B2 silicon. So it is not clear if it was due to the BIOS code or due to the revision.
In any way, I do not expect lower scores ^^
Furthermore, do not forget Movienan's comment here:
http://www.xtremesystems.org/forums/...=1#post4950183
Would fit ;-)
Ok at least that is encouraging :). Further lowering of the scores would be indeed bad^^. We are now at thuban's level or somewhat above it. Not very good but not slower at least.
Actually, in my opinion that slide tells the same, second core adds 80% compared to cmp on average. Think about average usage case, its not using full power of cpu really.
You are taking it out of context.Quote:
BTW Manicdan,from the same link you posted ,I have found this:
There you go,even JF said it.
So to it can be rearranged to the abbreviation of the words "do not answer?" I'm glad we've reached an agreement my friend.Quote:
Yes, it's an anagram of DNA. What did I win ? :)
Except that movie-man said he "thinks" they have a winner, and didn't specify (name) any benches where the product fails/wins. Right? Right. You can gladly correct me if I'm wrong.Quote:
For me, it's the same thing as movieman (or whatever his name) saying that AMD has a winner etc...
I've enjoyed participating in this intelligent discussion.
From "noname man" (we know person) blog
Some Bulldozer comment from my reader Franck7511:
Well, please publish my comment in the name of "Franck7511".
First times, I didn't believe in your leaks.
But I had documents from AMD on Bulldozer performance.
Performance is so poor that it can compete with the 2600K only in multi-threaded benchs...(otherwise, Intel Sandy Bridge processors will be WAY faster !).
Despite a higher frequency, and 2 times more cores ! (A Bulldozer Module should be renamed as a "Core"...)
My estimations are that a Bulldozer Core is only 80% of a Stars Core at equal frequency : that's why a FX4 at 4.2 GHz only compete with the 955...
The overclocking is the only thing good...
???What do u think about it???
I think that he doesn't know how to configure his rig and that drivers/magical bios are not up to date (according to JF-AMD). :)
I think that any info other than what I or AMD have personally offered which is not much if any can be discarded until further notice.
There are still peices to the puzzle missing that I can assure you 99.9% don't have yet regarding CPU rev and bios support and agesa.
To sum up BD facts
BD is physically a 4 core 8 thread part.
It has no coldbug
Samples can bench at 5+ on stock cooler, 6+ on phase change and 8.4 on lhe.
And most important of all SATA works
Like i said before the joke is on that guy we won't name, he was sent intentionally quite possilby the worst chip ever produced. 6.4 on ln2,
or he needs to learn how to OC, 6.4 is my validation speed on phase change......he who laughs last laughs best.............
What I remember from this long thread is Chew's comment regarding the 8 cores. It's quite funny how people look at the performance as this 'eight-core' chip and scream it's really bad, but if it were 'four-core with HT' people would say it's doing okay price/perf comparing to 2500K/2600K.
Even though it's the exact same product, opinions are different.
FlanK3r, I think it makes sense.
Still, power consumption will be make or brake deal for BD. It should be better than Phenom X6 in a lot of cases, but we won't get ST killer we all hoped for.
Anyway my AM3+ socket will part away with Phenom X6 in few days, so I hope to fill it with decent performance chip soon.
According to VR-Zone CB10 results, BD module scales very well with threads ~70% with second thread on module.
For eg. there is xCPU result for FX8 17800 CB10 points. For 1CPU is only 3450-ish points. It is ~5.16x scaling factor. Six core Thuban without turbo has scale factor ~4.9-5. According to Amdahal's law hypothetical 8th core Thuban could scale approximately ~6.25 for eight full cores. That is 21% more than CMT, which means that CMT scale pretty well. Problem is obviously with IPC or low/inaccurate frequency or something other. Per module with single thread execution, according to VR-zone result 3.1 GHz without C6 has same or little lower performance than K10 core, per clock. To reach hypothetical X8 K10 multithread performance, BD module must have 20-22% better IPC than Stars core.
Attachment 120136
chew* Which stepping was used for OC and benching, B2F?
By the way when will we get a reviewers guide for B2G :ROTF:
It just occured to me, that most games do have only few heavy threads on them. With 8 core bd, smart os putting heavy threads on different modules and using rest for light ones... Turbo all time for heavy ones and light ones getting processing power they really need not more... That is not bad. Now only if ipc is on spot.
I think the os plays most important thing in here for results.
IIRC, that 1.75 or 1.8 or whatever was a comparison between a module, and two theoretical, complete and separated BD cores. The latter doesn't exist.
The problem is that most people replace those theoretical cores with K10 cores. . . this theoretical talk is too much to grasp for average joe.
I have permission to release some home stuff now.
http://www.youtube.com/watch?v=7QWh2D9Tgh8
http://www.youtube.com/watch?v=OWWUF-7LuqU
Enjoy :up:
Nice!! Thanks for posting that chew*!! :D
nice!
can you show what you get on air cooling?
please :)
Chew just gained even more respect from me for rocking a 480
Nice, that Run MC's SS can hold 6Ghz 8C/8T @ 1.7Vcore idle:up:
Very cool, Chew. Are you able to discuss with us the temperatures you were hitting chasing 5ghz on the stock cooler?
thanks chew* for posting this
soon some benchmarks,yes?
6805 on dice:D Excited now, can't wait to bench again.:yepp:
If I didn't know better, I'd think BD was going to be released on Sept 19th. :p:
5+Ghz on stock cooler,yikes. That is some serious clock potential :) . Also I bet there is a ton of stuff to tweak,starting from IMC and L3 cache. Should be very fun.
If most users get close to 5Ghz on good air cooling for everyday use and benchmarking,then I suppose the new FX may indeed earn its name. Especially with that aggressive pricing strategy.
Thanks Chew* !!!!! :D
Could you see if you can get permission to post a video of clocking it on air only please :)
Simple calculation based on Newegg price...
MIVE+2600K = $650
CH5 = $230
$420 difference which can be applied to FX8150 price ranges:D
Nice, these chips have lots of potential.
No, it's only modulating it. I didn't wrote boosting it, as there is a thing called bad marketing, as well. F.ex. when you don't accentuate or emphasize enough the benefits of your product. But, it's also bad marketing when you blatantly overrate it! People don't like it at all if handled as fools... It's rather contraproductive (or counterproductive).
I'm very positive towards Bulldozer and even protesting for it in our local forums, because I've found the architecture clever, and also because what we have been told by JF. Though, lately it's changing. I'm starting to feel perhaps I was misleaded? And if yes, how much?
Anyway, look at these:
- A very strong 4-core CPU.
- A very poor 8-core CPU.
Which one sounds better...? If it turns out it barely beat even X6, not mentioning the 4-core of the competition, then I think it was a very bad move calling it a 8-core... And so I will refuse to call it that way, because it will be then the object of derision for some people. And who likes if laughed at? And rightfully, because really it isn't it, to be honest, and so this is marketing language, not techical. And I'm not a marketing guy. Even less one from the Tele Shop...
BTW, they're saying it brings +xx% with only 33% bigger area, right? Well, +33% over a single thread BD module. But, what about 10h cores? A 2-thread BD module is almost twice the size of a 10h core! I didn't counted about but it's roughly as much powerful (c2c) as much it's bigger, isn't it?
What's the rationale behind it, then, one could ask? I think these:
- It allows for higher clocks, and so higher performance. In theory, at least. I wonder how much...
- It allows for turning off the whole FPU, gaining even more frequency headroom. We will see, how much, as well.
- It allows for replacing the FPU with some GPU-like compute units. I don't know it it's the plan, but I think this one is the most encouraging.
- ...?
BTW 2, I was speculating on the possibility of clocking the integer clusters higher that the rest of the module. When they were to reveal some "BIG secrets" a few days back I was thinking is it perhaps about this...? :) More so that I've heard something like if they were trying to solve some issues, but failed, for now. I still wonder if it makes sense...? We know the prefetch and decode logics can handle 4 instructions per cycle, forwarding 4 macro-ops. Then, each integer unit can receive 4 micro-ops, which is essentially 2 macro-ops, so half of the amount the front-end forwards. And it's allways half of it. (In contrast to SMT...) But, what if there are 3 or even 4 independent instructions in a thread? I know it's rare, and so the average IPC is around 1.00 (many times even less), I was also playing with performance counters. But still, it's an average amount, with high and low borders...
Of course, I know about the importance of the front-end in achieved IPC, and I hope the Bulldozer is advanced in this respect, as well.
All in all, I still count on Bulldozer, and I know it can be a surprise (a positive one). Well, if not the current implementation, then the next one (Piledriver). :) (Unless should it turning out to be too weak, from the basics of it, but I don't think so.)
EDIT: Having 5+ GHz with air sounds good. Indeed, that I have a reasonably good water cooler. :)
Even if SB is capable of 4-5 GHz with air, as well, having higher IPC, and all, I won't feel as much back with Zambezi, this way.
Thanks chew*!
Please with air cooling!