=>metro.cl, hutch (and everybody :) ): use this version: MemSet33
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=>metro.cl, hutch (and everybody :) ): use this version: MemSet33
Soliciting feed back from others...
Abit IP35-E/E4300 CPU combo. 1st pair of Kingston DDR2 800 (chips on both sides, 1GB x 2 with SPD 5-5-5-18/1.8V) is set at 5-4-4-9-2T in BIOS. Memory clock speed is 480MHz (overclocked CPU with 1:1.25 memory divider). Memtest 86+ V1.70 shows bandwidth of 5628MB/s.
MBENCH:
-INT read 6896, write 3534
-MMX read 7534, write 3531
-SSE read 7865, write 6938
Swapped these RAMs with 2nd pair of Kingston DDR2 800 (chips on one side, 512MB x 2 with SPD 5-5-5-18/1.8V). Same memory settings as the previous pair. Memtest 86+ V1.70 shows bandwidth of 5197MB/s.
MBENCH:
-INT read 6891, write 3077
-MMX read 7484, write 3051
-SSE read 7769, write 6939
Not sure why the speed of the 2nd pair (512 x 2) is lower than the first pair (1GB x 2) when all other parameters in BIOS are the same. Both pair are stable up to a minimum of 576MHz.
Memtest reports a bandwidth of 4358MB/s when all four sticks are added to the MB (dual channel...1+3, 2+4).
Went back to BIOS and manually set the RAM settings to 5-4-4-9-30-3-4-3-4 to remove any AUTO RAM dectection mode. Re-tested both pairs. Still no change with the bandwidth numbers. BTW, all sticks passed Memtest86+.
Booted to Windows to check the performance of the RAMs using Super Pi. The 1st pair (higher bandwidth per Memtest) yields marginally faster time (within 1 to 2%).
Can a single-sided RAM module be slower than a dual-sided stick by that large of a margin? Is the BIOS having issue with proper detection of the single-sided modules? Has anyone seen a similar drop in memory bandwidth with 4 sticks vs 2 sticks? I'm aware that adding more RAMs will place a higher load on the memory controller. That's why most rigs will drop from 1T to 2T with four modules in place.
TIA,
F
Been playing with 33beta on P5K3 Deluxe and Kingston PC11000 DDR3.
I find it reports incorrect memory speed (not 0, but some other value).
Also, when i set my tRP to 9 in BIOS it causes memset not to be able to function (some values not editable, and Apply / Save button are greyed out completely).
LockMCH had no effect.
T_M: try this version
Yes, it's the final version; Tell me if you find bug or problem...
PL is working on my P965-DS3/S3 as far as I can tell. Will run some benches in a little.
@FELIX:
1st of all, thank you for this great program :). I am AM2 user ATM. Could you add more advanced timings/settings for AM2 DDR2 controller, please? My wishlist:
- tRFC0-3 for DIMM1-4 (separate for each slot - preferably in ns as in BIOSes or converted to number of cycles)
- Read Preamble (is Read Delay different thing?) (in ns)
- non-SPD timings like: TrwtTO, Twrrd, Trdrd, Twrwr, tFAW
- Twcl (Write CAS Latency)
- Dynamic Idle Cycle Counter - Enable/Disable
- DRAM Drive Strength and various other drive strengths
ps why do you call "RAS# to CAS# Delay" - tRTC and not tRCD? Is it intentional?
ok settings I was waiting for with this program has been shown to me via the bios on the gigabyte board.
Main bios screen hit ctrl-f1 and then head into the M.I.T screen and you have the options to adjust the memory settings.
Felix, I have been using this tool for a while on my laptop (since it has NO options in BIOS). Version 3.2 seemed to work fine, however, sometimes it would reset my alpha timings to SPD on bootup. Version 3.3 has seemed to fix this problem, however, it now reports my memory speed wrong.
BTW, I am using an nForce 430 chipset with a Turion 64 X2 :p:
awesome....thanks for the 3.3 update.
can someone please upload 3.3 beta 2 for me please.....
http://rv.page.cegetel.net.perso.ceg...mSet33beta.exe
not working......:(
nm i have it now...thank you coolice :toast:
just a reminder to everyone...
the final version is available at the authors site here:
http://rv.page.cegetel.net.perso.cegetel.net/
-thanks
here you go:
http://www.overclocking-jp.eu/public/Tweakers/
Hey Felix I noticed on the latest 3.3 version that it doesnt show 1T or 2T in the list of timings. The beta 3.3 did but not the final version. Or is it possibly just my board the abit ip35 pro. I am running the latest bios with the option for different command rate. Thanks.
AFAIK, he removed it in the final version ( don't know why though )
It shows up and is working fine on 3.3 Final for me?! :confused:
2x1GB PC5300 5-5-5-12-16 2T
Turion 64 X2 (laptop) :ROTF:
Changing Command Rate on P35 under windows have no effect on performance,
it's why I disable it on beta version and replace it by an other timing on final version.
Felix is there anyway you could put TRC as an option for P35? Performance impact on reducing TRC can be very big.
->Hutch: tRC is not present in P35 chipset.
->Kamerat: I send you an mp.