Quote:
Originally Posted by GFORCE100
Can you confirm there is even a C1 let alone a C2 975X? I see no revisions of steppings on the 975x
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Quote:
Originally Posted by GFORCE100
Can you confirm there is even a C1 let alone a C2 975X? I see no revisions of steppings on the 975x
has anyone updated their 975x chipset drivers? It appears they have addressed the SMBus device not installing correctly. It's been a while but it's finally fixed.
http://www.xtremesystems.org/forums/...ighlight=smbus
http://www.xtremesystems.org/forums/...ighlight=smbus
http://www.xtremesystems.org/forums/...6&postcount=44
even the P4GD1 has this problem LOL
Well, even though the driver updated (have to do it manually) the irq conflict is still there.
Sidnote:
I have more success manually updating (using the zip version) then using the setup file. It's tedious but I checked each system device and ide ata/atapi controllers to see what will take and what didn't. You usually have to check the universal serial bus controllers but I already updated that. (found in device manager).
I will have to check whether CPU-Z reports C0 or C1 on mine. C2 sounds like a P965 indeed, sorry.Quote:
Originally Posted by MarcusTaz
Quote:
Originally Posted by GFORCE100
Cool you got me really nervous there. After searching Intels site and various other sites, I could not even find a C1...
SLACR@333FSB x 9, Vcore at AUTO with EIST/C1E activated - note the rather low Vcore on this mobo detected as by the onboard sensor, rather bad news for those like me who have to use AUTO Vcore for EIST/C1E. Thought someone did say 2206 gives 1.4V at AUTO (kindly confirm) which may make o'cing with EIST/C1E easier.
http://i173.photobucket.com/albums/w...48_OCCT_OK.jpg
http://i173.photobucket.com/albums/w...3h03-VCore.png
Mine here is C0Quote:
Originally Posted by MarcusTaz
Ah, found the 2206 1.4V reference here but sadly, the poster isn't using a quad.
http://vip.asus.com/forum/view.aspx?...Language=en-us
So is it true that with the 2004 bios update the P5W DH supports Intels 45nm?
Got my Q6600 G0 but I'm on baby duty (watching my daughter) so my wife can go take her test (College) and my daughter refuses to take a nap so I will not get a chance to play with it today. I go to bed early because I have to be @ work @ 4:30am -- so maybe tomorrow.
Please let me know how she OCs. I have my G0 on order and would love to know how it does compared to the BxQuote:
Originally Posted by nicepun
lawry has a 2004 bios that will work with the 45nm cpus and the go.sQuote:
Originally Posted by RangerXLT8
Not sure if you were looking for Q6600 G0 only, or just any quadQuote:
Originally Posted by MacClipper
- 2206 BIOS; C1 and EIST enabled
- QX6700 B3 @ 3g
- OCCT v1.1.1.b04 (short 10min test)
I tried the 2004 modded and regular and 2103 and for some damn reason all I get is Auto for vcore (I know to disable EIST and C1E).
Q6600 G0?
My bios works fine otherwise yeah? No microcode errors or anything.
No idea why it's doing that though. Did you load setup defaults first?
I'm reflashing through DOS with old Afudos 2.11 and the /pbnc /n switches.Quote:
Originally Posted by lawrywild
Edit: Just tried with 2103 and no go. I will try with the 2004 modded later or tomorrow.
Thank you very much for the info bichi, precisely what I wanted.
Tried out 2206 on my G0 Q6600 but too bad, Vcore values remained exactly the same as 2205 previously, varying between 1.15V idle and 1.25V load. So it looks like they upped the Vcore for B steppings only. Or perhaps diff. P5W revisions play a part, mine is the earliest 1.85V revision.
Enable it then need to disable Speed Step againQuote:
Originally Posted by nicepun
I was reading the documents before.Quote:
Originally Posted by nicepun
Flash with
Quote:
afudos /i2004.rom /p /b /n /c /reboot
Quote:
Options
The optional field used to supply more information for flashing BIOS ROM. Following lists the supported optional parameters and format:
�� /P Program main bios image
�� /B Program Boot Block
�� /N Program NVRAM
�� /C Destroy CMOS after update BIOS done
�� /E Program Embedded Controller block if present
�� /K Program all non-critical blocks
�� /Kn Program n’th non-critical block only (n=0 - 7)
�� /Q Quiet mode enable
�� /REBOOT Reboot after update BIOS done
�� /X Do not check ROM ID
�� /S Display current system’s BIOS ROM ID
�� /Ln Load CMOS default (n=0 - 1)
L0: Load current CMOS optimal settings
L1: Load current CMOS failsafe settings
L2: Load CMOS optimal settings from ROM file
L3: Load CMOS failsafe settings from ROM file
�� /M<MAC Address> Update BootBlock MAC address if exists
�� /R Preserve all SMBIOS structures during NVRAM
programming
�� /Rn Preserve specific SMBIOS structure during
NVRAM programming
Whatever you read is wrong. The bios reads the VID of the cpu under load and uses 1.1625v idle. These are the EIST values. P5WDH Bios revision never changes stock vcore. The cpu itself determines this via the VID, which can be read in coretemp or everest. And by the way, lower VID is generally better.Quote:
Originally Posted by MacClipper
... except when it comes to trying to o'c it higher cos this chip is confirmed stable at 3.2GHz at 1.30V on my Commando (lovely independent Vcore/EIST-C1E options).Quote:
Originally Posted by lawrywild
Nonetheless thanks for the consolation, lawry. :D
3GHz is enough, 3GHz is enough, 3GHz is enough... my new chant. lol
Coretemp with EIST/C1E, load vs no load
http://i173.photobucket.com/albums/w...R/Coretemp.jpghttp://i173.photobucket.com/albums/w...etemp_Idle.jpg
Dude, there are no exceptions... (EDIT: Oh nevermind, I understand you now, you were talking about the lower VID is better comment. The information below is still useful though, so I'll leave it)Quote:
Originally Posted by MacClipper
The change in vcore your getting from the VID is the result of Vdroop.
You can do what I did and Vcore mod the motherboard. Thus, I can run EIST but increase vcore above stock. (this also increases the EIST vcore by the same fraction too)
for example. The vcore mod provides a vcore 18/15 x Your VID.
So 18/15 x 1.300v = 1.56v under load (without vdroop)
EIST VID is 1.1625v so you will get 18/15 x 1.1625v in IDLE mode which = 1.395v
Did the Vdroop for my Commando test mobo (easy, works great) but the P5W is casing installed so kinda PITA to pencil it so willing to live with 3GHz for now. Waiting for the incoming X38 anyway.
:)
Not vdroop, vcore mod. Solder a pot on ;)
Lookie here:
http://img3.shareavenue.com/getimage...b97b7732aa7e21
FYI:
- whether P5WDH BIOS can override processor VID values is another story, assuming all manual
- tough to defeat/exceed PROCHOT# and Tj and override processor shutdown limit with BIOS, Vmods, in any case
- and QX6700 VID is higher than Q6600 B3 and appears to be even lower with Q6600 G0
From Intel Q6000 Series Datasheet, page 18:
3. Each processor is programmed with a maximum valid voltage identification value (VID), which is set at
manufacturing and can not be altered. Individual maximum VID values are calibrated during manufacturing such
that two processors at the same frequency may have different settings within the VID range. Note this differs
from the VID employed by the processor during a power management event (Thermal Monitor 2, Enhanced Intel
SpeedStep® Technology, or Extended HALT State).
REF LINK:
Intel® Core™2 Extreme Quad-Core Processor QX6000Δ Sequence and Intel® Core™2 Quad Processor Q6000Δ Sequence Datasheet
http://www.intel.com/design/processo...hts/315592.htm
Tried but luck.Quote:
Originally Posted by lawrywild
Tried but no luck.Quote:
Originally Posted by sbinh
I think this is where the problem lyes....:shrug: :shakes: Mine is an earlier version 1.85v Rev1.02g. Dammit I don't feel getting another mobo right now.Quote:
Originally Posted by MacClipper