K10 Scores starting to surface

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09-03-2007, 08:01 AM
KTE

Nice analysis going on although it's becoming very offshoot to what I stated and did. Scaling wasn't shown in the true mathematical sense, little time to do it. This was data I already had for some time now, copied it over. All that was meant to be shown is the % change in SPI 1M times as frequency rises above the 1800MHz time, which is projected as 100%, or stock. Call is 0% if you like and anything on-top is the gained percentage.

K10 comes in where people state affirmatively that something they do not own nor have seen perform from a released product, cannot react in a certain way, for whatever musings. I've seen erratic jumps before in processor performance, and I'm showing one of them right here.

It''s not to "argue" anything but a viable possibility you cannot on any grounds reject yet. You have no evidence to. Or we'd like to see it. :)

Quote:

Originally Posted by JumpingJack

He is using to argue non-linear scaling, but he misinterprets the data..

First, there are two typos, or atleast I think they are typos, the first is at 2205 Mhz, he says 73.455 but I think he meant 93.455, this is in line with what would be expected.

No typo, I clearly state it's experimental results. I predicted linear scaling, as most people would. But investigation speaks otherwise - something I cannot explain but I experience.
Conditions are exactly the same for all but >3500 (unstable), in fact I'm sure they were ran one after another on the same day, with minimum services/processes running in the background. One thing I clearly stated I didn't and couldn't do, is keep the memory asynchronous. RAM timings/divider is kept the same. But the rest I'll show it you and I've repeated it time and time again from around 4 months back. All of the data stands final. ;)

I'll try and find what I still can, one second. Hmm... there's data missing here. I only seem to have a few of the run results saved but have more info in the text file saved instead. Anyway, the interesting ones are all still there, the rest of the missing +100MHz sampling points are progressive and linear as you would expect and I'll try finding them on the other drives. Here ya go.

1800MHz = http://img212.imageshack.us/img212/5...00spi1mlx8.jpg
2000MHz = http://img406.imageshack.us/img406/8...00spi1mus3.jpg
2100MHz = http://img510.imageshack.us/img510/6...00spi1mgc7.jpg
2200MHz = http://img205.imageshack.us/img205/1...00spi1mwn9.jpg
2300MHz = http://img250.imageshack.us/img250/8...00spi1mqk4.jpg
2500MHz = http://img508.imageshack.us/img508/7...00spi1mhm8.jpg
2600MHz = http://img209.imageshack.us/img209/3...00spi1mlb0.jpg
2800MHz = http://img510.imageshack.us/img510/2...00spi1map4.jpg
3000MHz = http://img515.imageshack.us/img515/1...00spi1mod1.jpg
3200MHz = http://img265.imageshack.us/img265/4...00spi1mnr5.jpg
3300MHz = http://img250.imageshack.us/img250/8...00spi1mzk4.jpg
3360MHz (3400 is the same) = http://img210.imageshack.us/img210/4379/spi48qg8.jpg
3500MHz = http://img250.imageshack.us/img250/2747/sp47dm3.jpg

3500MHz is quickest = after that, there's hardly any change if the processor runs it (memory bottleneck). If I had similar memory and system now, I'd repeat them now again just to refresh, but I don't and I didn't know this was coming to prepare but just did it for my own personal investigating back then.

BTW, science doesn't equal "we expect this and this all that can be true." Broken logic is to expect linear scaling and when something other occurs you start the conspiracies. Science broadens your horizons to accept observational finding, like the new colossal area devoid of matter found in space, even devoid of dark energy, which was NEVER predicted nor expected at those sizes and changes acceptance of many beliefs and idea's held by physicists beforehand.

Scientific experiment = controlled conditions + variable factor + experiment + observation + repetition + results

I've just given you results of some of my findings, enough for a genuinely interested person to see what's happening for themselves.

Quote:

The other is 3301 or 3201, I looks like he ran the same run twice at the same frequency but recorded a different speed. Here is a plot of his SP1M time vs frequency

Conspiracy theories and conjectures will get one no where. All you have to do is ask for evidence before the insinuating. :)

Quote:

In short, he data shows nothing but a handful of mistakes and that indeed SP1M scales linearly with clock speed.

That's what you want to believe Jack, not what the evidence shows. I'm sorry but you haven't proved how my finding ties in with your belief.
09-03-2007, 08:08 AM
gbjorn

Hi there

I was just looking at the forums at coolaler and saw this. This is K10 in Pi B0 stepping I think. And from the picture it does Pi in 32 seconds at only 1800Mhz. By the way, I'm new here.
09-03-2007, 08:09 AM
gbjorn

sorry , forgot the link

Here is the Link http://forum.coolaler.com/showthread...161127&page=30.
09-03-2007, 08:39 AM
freeloader

Quote:

Originally Posted by CoW]8(0)

You're thinking in the time domain again. The number of clock cycles for code to execute will always be the same regardless of how long those clock cycles are.

So to answer your question, no. It will not affect the scaling.

So basically you're telling me that a 2ghz Barcelona would have the same L3 cache latency (any cache latency for that fact) as a 3ghz Barcelona? Thanks for helping out with this stuff, it's interesting.
09-03-2007, 08:51 AM
Sampsa

Quote:

Originally Posted by gbjorn

I was just looking at the forums at coolaler and saw this. This is K10 in Pi B0 stepping I think. And from the picture it does Pi in 32 seconds at only 1800Mhz. By the way, I'm new here.

Quote:

Originally Posted by gbjorn

Here is the Link http://forum.coolaler.com/showthread...161127&page=30.

CPU-Z-window has different theme than SuperPi window? Yeah right, nice photoshop.
09-03-2007, 08:54 AM
BeardyMan

Quote:

Originally Posted by Sampsa

CPU-Z-window has different theme than SuperPi window? Yeah right, nice photoshop.

i thought superpi theme was customizble :D
09-03-2007, 10:25 AM
Lightman

Quote:

Originally Posted by freeloader

So basically you're telling me that a 2ghz Barcelona would have the same L3 cache latency (any cache latency for that fact) as a 3ghz Barcelona? Thanks for helping out with this stuff, it's interesting.

I would say opposite, but this is only my opinion....
For me it will be like doing SuperPi with DDR2 667 4-4-4 and DDR2 800 4-4-4 on same CPU.
With faster K10 cores you will get differently clocked northbridge which clocks cache L3. It also will be possible to change cache frequency...

Don't take it as a certain, this is just speculation :) .
09-03-2007, 10:38 AM
informal

Sice due to heavy trolling and OT by Donnie27 and others in news "30K" thread ...

....people didn't get the chance to notice my post there,i will repost it here :) :

Quote:

AMD Phenom X4 can do 3GHz and above

Quote:

By normal air cool, the AMD Phenom X4 can go beyond the 3GHz mark by overclocking. Although this can be done, there are some stability issues at such high speed.

Currently, there aren't any options to turn off one or two of the cores. Running it in single channel memory helps to stabilise it.

http://my.ocworkbench.com/bbs/showth...200#post420200

Bluetooth is one of those guys who is credible and who got the one of the 1st GA RD790 mobos to test.So this is very good news coming from them!

Note he says air cooling is used and it's a X4 ,so all of the cores must work at the same clock since something is wrong(bios?) and they can't use separate PLLs to clock the cores individually.
09-03-2007, 10:56 AM
Lightman

That's very good news....
With platform stability they have a bit of time to work out issues so I'm looking ahead to Phenom launch :) .
Bear in mind all this is on pre-production silicon ;)

BTW K10 is designed to hit 4GHz......
09-03-2007, 10:58 AM
JumpingJack

Quote:

Originally Posted by gbjorn

Here is the Link http://forum.coolaler.com/showthread...161127&page=30.

This 'image' was created by someone who was claiming that the Coolaler K10 data was faked, by producing a 'see how easy I can fake something post' on this thread:
http://forums.vr-zone.com/showthread.php?t=181755

I can't read Chinese, but likely someone referenced to this is similar discussions we are having here.
09-03-2007, 11:05 AM
informal

Yeah that "SPI score" of 31 is a bad fake.Best we ignore that and concentrate on the OCworkbench news.
What could have made them unable to individually clock the separate cores in Phenom ES?Something in the ES chip itself or the bios bug?Very good news about the beta silicon,mobos and bioses hitting >3GHZ OCs with air cooling.This speaks a lot about the potential of the core and at the same time amazes me what AMD managed to do in such a short time from the first reports of clock problems(speedpath issues in the chip).They conquered the whole GHz in a couple of respins(source :dailytech).
Still we can expect 125W spec for first retail 3Ghz version of X4(whenever they are out)

edit:

Latest info from AnandTechStaff:

Quote:

Originally Posted by G.Key@AT

Throughout the entire prototype and pre-production (as stated in my last message) process, certain features on the CPU, in the BIOS, or on the chipsets have been turned off/on, latencies have changed, etc, etc. This is a normal part of the engineering process as the design is fleshed out and finalized. It does not represent final silicon capabilities and performance.

As I said earlier, I used a poor example as it was not meant to be taken literally spec for spec when comparing engines and CPUs. Regardless of the example, the point was that the platform performance improved significantly as the core speeds improved and this included performance per watt among other indicators. There is a myriad of reasons as to why this occured but considering the early silicon, BIOS, and chipset designs, we could only speculate as to why and I tried to present a few reasons that we honed in on.

If you compare a B00 chip from May to a B02 today, there is a significant difference in performance in all areas (26 seconds in SuperPI 1m for one) and my comments represent observations of what has occurred over this time period. We have final silicon now and results will be posted in the near future. My observations today are different than they were two weeks ago and as the platform matures they will change again.

Once we see the HT 3.0 capable chipsets and Phenom cores mature then we will have an even better indication of the performance of this core design in the consumer market but for now the initial release is Barcelona in the enterprise market.
09-03-2007, 11:49 AM
BeardyMan

26 seconds in SuperPI 1m for one

that's allot :)
coming from 39secs to 13secs would be great though :D
09-03-2007, 11:56 AM
JumpingJack

Quote:

Originally Posted by KTE

Nice analysis going on although it's becoming very offshoot to what I stated and did. Scaling wasn't shown in the true mathematical sense, little time to do it. This was data I already had for some time now, copied it over.

However, you did try to calculate a scaling factor and concluded on a data set that has 4 of the 14 data points fall away from the expected trend. There are two possibilities, either those points repesent something real or you made a mistake (no harm admitting a mistake). It is poor analysis to see such weird behavior and publish it as 'this is the way it is', without vetting those anomolous data points through repetition and attention to some detail and not expect to get challenged on those anomolies.

Quote:

K10 comes in where people state affirmatively that something they do not own nor have seen perform from a released product, cannot react in a certain way, for whatever musings. I've seen erratic jumps before in processor performance, and I'm showing one of them right here.

But is that due to the CPU or the person using the CPU? Do take offense to this, I can show you anomolous results by the very nature you go into below, where the conditions were not fully understood by which the tests were conducted.

Quote:

No typo, I clearly state it's experimental results. I predicted linear scaling, as most people would. But investigation speaks otherwise - something I cannot explain but I experience.

This is the failure of your approach, when you do see such anomolous behavior, there is always the cause and effect. I will show you an example,
http://img339.imageshack.us/img339/9...usesp1mjv1.jpg
54.328 seconds
http://img504.imageshack.us/img504/2...usesp1mcu1.jpg
58.766 seconds

Looking at this one data point, man, what the heck.... some variability... but, wait... the difference is in the first case I started the run and left alone, in the second I started the run but moved my mouse around.... ahhhh, so is there something wrong with CPU, not reproducible or was there something wrong with the way I ran the bench?.... hmmmmmm.

Quote:

Conditions are exactly the same for all but >3500 (unstable), in fact I'm sure they were ran one after another on the same day, with minimum services/processes running in the background. One thing I clearly stated I didn't and couldn't do, is keep the memory asynchronous. RAM timings/divider is kept the same. But the rest I'll show it you and I've repeated it time and time again from around 4 months back. All of the data stands final. ;)

This fine, it stand final but still flawed.

Quote:

1800MHz = http://img212.imageshack.us/img212/5...00spi1mlx8.jpg
2000MHz = http://img406.imageshack.us/img406/8...00spi1mus3.jpg
2100MHz = http://img510.imageshack.us/img510/6...00spi1mgc7.jpg
2200MHz = http://img205.imageshack.us/img205/1...00spi1mwn9.jpg
2300MHz = http://img250.imageshack.us/img250/8...00spi1mqk4.jpg
2500MHz = http://img508.imageshack.us/img508/7...00spi1mhm8.jpg
2600MHz = http://img209.imageshack.us/img209/3...00spi1mlb0.jpg
2800MHz = http://img510.imageshack.us/img510/2...00spi1map4.jpg
3000MHz = http://img515.imageshack.us/img515/1...00spi1mod1.jpg
3200MHz = http://img265.imageshack.us/img265/4...00spi1mnr5.jpg
3300MHz = http://img250.imageshack.us/img250/8...00spi1mzk4.jpg
3360MHz (3400 is the same) = http://img210.imageshack.us/img210/4379/spi48qg8.jpg
3500MHz = http://img250.imageshack.us/img250/2747/sp47dm3.jpg

Thanks for the screen shots, so my guess that you typo'ed was incorrect, no big deal ... it was one plausible explanation for the outlier data, so now we should look for other explanations, perhaps more experiments.

Quote:

3500MHz is quickest = after that, there's hardly any change if the processor runs it (memory bottleneck). If I had similar memory and system now, I'd repeat them now again just to refresh, but I don't and I didn't know this was coming to prepare but just did it for my own personal investigating back then.

You need to be careful making this conclusion because your data set is inconsistent to begin with....

Quote:

BTW, science doesn't equal "we expect this and this all that can be true." Broken logic is to expect linear scaling and when something other occurs you start the conspiracies. Science broadens your horizons to accept observational finding, like the new colossal area devoid of matter found in space, even devoid of dark energy, which was NEVER predicted nor expected at those sizes and changes acceptance of many beliefs and idea's held by physicists beforehand.

So you don't believe in science? Yes, science does broaden horizons, within the context of performing science correctly, here you did not.

Quote:

Scientific experiment = controlled conditions + variable factor + Hypothesize+ experiment + observation + repetition + results + revise + repeat + conclude

You missed quite abit.... you failed to revise your hypothesis or repeat your experiment, I would really like to see you repeat this data set again, but I don't expect you to expend the time, I will do it myself, I have a Prescott I will rebuild.

Quote:

That's what you want to believe Jack, not what the evidence shows. I'm sorry but you haven't proved how my finding ties in with your belief.

I am not trying to prove anything, I am challenging your data set where 4 of your 14 points are outside expected..... in short, you should do a better job of rationalizing the outlying data before drawing conclusions and publishing results, some may look at this and be ... meh.. ok. But there could be someone who looks at this and thinks ' man, this is counter to all the existing data, there must be something wrong' -- which is what I did.
09-03-2007, 12:02 PM
CoW]8(0)

Quote:

Originally Posted by freeloader

So basically you're telling me that a 2ghz Barcelona would have the same L3 cache latency (any cache latency for that fact) as a 3ghz Barcelona? Thanks for helping out with this stuff, it's interesting.

No, I'm saying it won't affect the scaling. Why is there a latency decrease when you increase frequency.

As you increase frequency, time decreases (latency). That's why there's a latency decrease and that's why I believe it will scale the same.
09-03-2007, 12:04 PM
gallag

Quote:

Originally Posted by informal

Best we ignore that and concentrate on the OCworkbench news.

lol Yeah lets ignore the bad and concentrate on the good lol:ROTF:
09-03-2007, 12:07 PM
JumpingJack

Quote:

Originally Posted by CoW]8(0)

No, I'm saying it won't affect the scaling. Why is there a latency decrease when you increase frequency.

As you increase frequency, time decreases (latency). That's why there's a latency decrease and that's why I believe it will scale the same.

Clock cycle latency remains the same..... though you understand the concept I will state it anyway an example:

12 cycles of L2 latency at 2 GHz gives 6 ns latency in time.
12 cycles of L2 latency at 3 GHz gives 4 ns latency in time.

The total time to propogate a signal through the chip has a ceiling, hence as you decrase the clock period at fixed cycle latency -- the wall will be hit and no more clocks for you :)

It seems a lot of people have a hard time understanding the digitial tick of a clock and the time period for that tick and how that translates into scaling. :)
09-03-2007, 12:16 PM
freeloader

Quote:

Originally Posted by CoW]8(0)

No, I'm saying it won't affect the scaling. Why is there a latency decrease when you increase frequency.

As you increase frequency, time decreases (latency). That's why there's a latency decrease and that's why I believe it will scale the same.

OK, now I fully understand. Thanks! :D
09-03-2007, 12:18 PM
JumpingJack

Quote:

Originally Posted by BeardyMan

26 seconds in SuperPI 1m for one

that's allot :)
coming from 39secs to 13secs would be great though :D

For the record, a 2 GHz Conroe gets 26 seconds...

http://img70.imageshack.us/img70/391...0102000mr1.jpg
09-03-2007, 12:24 PM
informal

No the dude said he saw 26s decrease(from whatever the score was before)..Not that it scored 26s(it could be more or less for what we know..)
09-03-2007, 12:43 PM
JumpingJack

Quote:

Originally Posted by informal

No the dude said he saw 26s decrease(from whatever the score was before)..Not that it scored 26s(it could be more or less for what we know..)

Ooops...
09-03-2007, 01:03 PM
Dagalidis

Quote:

Originally Posted by informal

Originally Posted by G.Key@AT
Throughout the entire prototype and pre-production (as stated in my last message) process, certain features on the CPU, in the BIOS, or on the chipsets have been turned off/on, latencies have changed, etc, etc. This is a normal part of the engineering process as the design is fleshed out and finalized. It does not represent final silicon capabilities and performance.

As I said earlier, I used a poor example as it was not meant to be taken literally spec for spec when comparing engines and CPUs. Regardless of the example, the point was that the platform performance improved significantly as the core speeds improved and this included performance per watt among other indicators. There is a myriad of reasons as to why this occured but considering the early silicon, BIOS, and chipset designs, we could only speculate as to why and I tried to present a few reasons that we honed in on.

If you compare a B00 chip from May to a B02 today, there is a significant difference in performance in all areas (26 seconds in SuperPI 1m for one) and my comments represent observations of what has occurred over this time period. We have final silicon now and results will be posted in the near future. My observations today are different than they were two weeks ago and as the platform matures they will change again.

Once we see the HT 3.0 capable chipsets and Phenom cores mature then we will have an even better indication of the performance of this core design in the consumer market but for now the initial release is Barcelona in the enterprise market.

Link please ?
09-03-2007, 01:17 PM
informal

But i doubt the original score of that whatever stepping(of B01 revision) was worse than revF K8 in SPi 1m.What does 2Ghz K8 with DDR2-667 cas5 get in Spi 1m?Around 42s right?If the ES was somewhat worse than that than the "better" score could very well be very good.And the dude said they saw week-to-week improvements with both new chips and new boards.So who knows what floats around there in the wild.

Link for that quote:
http://forums.anandtech.com/messagev...VIEWTMP=Linear
09-03-2007, 01:48 PM
Motiv

Quote:

Originally Posted by informal

No the dude said he saw 26s decrease(from whatever the score was before)..Not that it scored 26s(it could be more or less for what we know..)

The way it reads, he is stating the production chip does it in 26 Seconds.
09-03-2007, 01:57 PM
informal

Quote:

Originally Posted by Motiv

The way it reads, he is stating the production chip does it in 26 Seconds.

Hmm is English your first language?(not bashing just asking :) )

Since you can read it for yourself one more time(pay attention to bold and blue) :

Quote:

there is a significant difference in performance in all areas (26 seconds in SuperPI 1m for one)

I "painted" in blue the important parts to make it more clear :)

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