i'm not sure yet coz it costs waaaay to much...:( think i have to give away a kidney...kindey anyone? but i always wanted a quad though...
good for you...good luck on the exam!:up:
does anyone know how to change the fsb strap on the p35-t2r? i think it has something to do with the vco divider and the jumpers jp14,jp13 and jp15, but i'm not sure. I heard that q9450 might have a fsb wall, so if i lower the strap, i might not hit it, but increase effictiency. thanks!
or is it that divider thingy where it's like 266/800 or 200/667?
Right now Im set up at 3.6 prime stable at 4.4.4.12 and at good temps but with this new ram mushkin 4g (996580) ram I cant figure the subtimings of this board to get it to 900mhz or 1000mhz can anyone give me some helpfull tips to get some bandwitdh outa these sticks :confused:
12/24
:confused: :confused:http://i84.photobucket.com/albums/k7...hkinmemory.jpgCode:CPU Feature
- Thermal Management Control: Disabled
- PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled
Exist Setup Shutdown: Mode 2
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 9X
- Target CPU Clock: 3600 MHz
CPU Clock: 400 MHz
Boot Up Clock: auto
DRAM Speed: 333/667
- Target DRAM Speed: 800MHz
PCIE Clock: 100mhz
Voltage Settings
CPU VID Control: 1.4125V
CPU VID Special Add: auto
DRAM Voltage Control: 2.310V
SB 1.05V Voltage: 1.150V
SB Core/CPU PLL Voltage: 1.95V
NB Core Voltage: 1.55V
CPU VTT Voltage: 1.52V
Vcore Droop Control: disabled
Clockgen Voltage Control: 3.85v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Enable
x CPU GTL1/3 REF Volt: 106
x CPU GTL 0/2 REF Volt: 107
x North Bridge GTL REF Volt: 117
DRAM Timing
- Enhance Data transmitting: Fast
- Enhance Addressing: Fast
- T2 Dispatch: Disabled AUTO
Clock Setting Fine Delay
Ch1 Clock Crossing Setting: AUTO
- DIMM 1 CLK fine delay: ?
- DIMM 2 CLK fine delay: ?
- Ch 1 Command fine delay: ?
- Ch 1 Control fine delay: ?
Ch2 Clock Crossing Setting: AUTO
- DIMM 3 CLK fine delay: ?
- DIMM 4 CLK fine delay: ?
- Ch 2 Command fine delay: ?
- Ch 2 Control fine delay: ?
Ch1Ch2 CommonClock Setting: Auto
Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto
Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)
CAS Latency Time (tCL): 4
RAS# to CAS# Delay (tRCD): 4
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 12
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): AUTO
Performance LVL (Read Delay) (tRD): AUTO
Read delay phase adjust: Enter
- Channel 1 Phase 0 Pull-In: Auto (each Phase when enabled = (Common tRD - 1)
- Channel 1 Phase 1 Pull-In: Auto
- Channel 1 Phase 2 Pull-In: Auto
- Channel 1 Phase 3 Pull-In: Auto
- Channel 1 Phase 4 Pull-In: Auto
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto
MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO
PCIE Slot Config: 1X 1X
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled
Just had a chance to load the 03/17 BIOS. C1E once again works if CPU VID Control is left on auto and the voltage is adjusted by using CPU VID Special Add.
@Praz: i still can't download the zip file :(
I'll host it till DFI gets it up.
LP35D317 BIOS
Hey, emoaners whats up brother? How are you doing these days man>
Campbell;)
I don't know what ic's your Mushkin use but here are the all round ball park figures for micron & powerchip ic's that should help you out to make a start.Code:DRAM Timing Page
Enhance Data Transmitting.................Fast
Enhance Addressing........................Fast
T2 Dispatch...............................Auto
Clock Setting Fine Delay..................See Below
CAS Latency Time (tCL)....................4 ~ 5
RAS# to CAS# Delay (tRCD).................3 ~ 5
RAS# Precharge (tRP)......................3 ~ 5
Precharge Delay (tRAS)....................14 ~ 18
All Precharge to Act......................4 ~ 6
REF to ACT Delay (tRFC)...................44 ~ 56
Performance Level.........................Auto
Read Delay Phase Adjust................... Leave on auto.
MCH ODT Latency...........................Auto ~ 2
Write to PRE Delay (tWR)..................11 ~ 14
Rank Write to Read (tWTR).................10 ~ 12
ACT to ACT Delay (tRRD)...................3
Read to Write Delay (tRDWR)...............8
Ranks Write to Write (tWRWR)..............4 ~ 7
Ranks Read to Read (tRDRD)................5 ~ 6
Ranks Write to Read (tWRRD)...............4 ~ 7
Read CAS# Precharge (tRTP)................3 ~ 4
ALL PRE to Refresh........................3 ~ 6
Read Delay Phase Adjust Page
Clock Setting Fine Delay Page
Ch1 Clock Crossing Setting................More Aggressive
DIMM 1 Clock fine delay...................Current = whatever it sets
DIMM 2 Clock fine delay...................Current = whatever it sets
Ch 1 Command fine delay...................Current = whatever it sets
CH 1 Control fine delay................... Current = whatever it sets
Ch2 Clock Crossing Setting................More Aggressive
DIMM 3 Clock fine delay...................Current = whatever it sets
DIMM 4 Clock fine delay...................Current = whatever it sets
Ch 2 Command fine delay...................Current = whatever it sets
CH 2 Control fine delay...................Current = whatever it sets
Ch1Ch2 CommonClock Setting................More Aggressive
Ch1 RDCAS GNT-Chip Delay..................Auto
Ch1 WRCAS GNT-Chip Delay..................Auto
Ch1 Command to CS Delay...................Auto
Ch2 RDCAS GNT-Chip Delay..................Auto
Ch2 WRCAS GNT-Chip Delay..................Auto
Ch2 Command to CS Delay...................Auto
Micron scale up well & like up to 2.2 ~ 2.3v whilst the Powerchip just stop & don't like much more than 2.1v max im sure you will make a quess at your ic's when you spend time with them.
I would start with all the higher numbers & 2.0v (cooled with a fan) till you get your desired speed then one at a time tighten up & test each setting from the top down.
From what I see around you should see 1000mhz fairly easy.
Good luck
CN :)
C1 seems to be common these days with DFI Bios:rolleyes:
It's also on the v11.1.0 of the Tmod/Loggan CD (looks like MemTest 2.01 has been added as well to the CD).
http://www.diy-street.com/forum/show...postcount=1348
So have you guys noticed any important differences?
I just flashed and can confirm it is working just as it was on previous bioses. I like how it actually lists the VID of your particular cpu when set to AUTO. Besides that, there doesn't seem to be anything else added. It hasn't been long but performance and stability is where it was at with 2/14 as well, not that there was anything wrong with that.
The only qualm is there are STILL using the old SATA RAID ROM bios version.
can you post a pick for the bold one please?
Also, regarding the sara raid rom you mention, do you think that it may have any link with my problem i describe here?
http://csd.dficlub.org/forum/showthread.php?t=5680
I am really stuck with this problem. :shrug:
Hi there, im sorry but I have no camera available on me and I cannot take screenshots of the bios itself. It really isn't a big deal however. On older bioses if you set Vcore to AUTO it would just say AUTO. I happen to know my VID of my particular cpu is 1.2700 so when I choose AUTO on this latest bios it now reads AUTO 1.2700 which I thought was neat. It is completely cosmetic however.
I am unsure about your problem. I do NOT have the freezing you mentioned of but I do however get this iastor errors in event viewer from time to time. I also had issues where my optical burner would drop off the system but that hasn't happened in awhile. I am unsure if the sata raid rom update would do anything at all, I just know there is later and other board manufacturers have been using it since last November.
Just noticed something, is there no temp sensor for the Southbridge on this board? Everest and any other monitoring program is only showing temps for the Northbridge.
SB temp not important really, it will be fine with stock cooler.
I only ask because I am looking into getting the 9800GX2, and apparently it dumps a lot of heat over the SB area. Some reviewers were reporting really high SB temps because of this. I went to see what my current temp was to compare but it never showed.
ah..ok! no more need for a photo :)
thanks!
i find it very useful as i needed something similar a little time ago :)
http://csd.dficlub.org/forum/showpos...1&postcount=15
Anyway, I sent an email to Dfi asking about my problem and if there is any possibility that a new raid sata rom will fix it. I will keep you posted if anything interesting comes out.
Did you do anything to fix your iastor time outs/optical dropping?
the bios will work just fine on the LT.
has anyone found the need to cool the northbridge with anything other than stock cooling?
3/17 flashed and working beautifully.
Thanks Praz for the file.