There are lower CPU GTL Ref ratios in Bios 0207, 0.61x 0.59x 0.57x, which found thanks to AlienGrey on Asus RF forum. Don't know if these themselves are useful, but what it does mean is the RF isn't locked to only the current GTL Ref ratios we have available as I had previously thought. If sufficient handles and index pointers, and string space are free in the 1B/21 module more can be added of course. I need to figure out how to get the offset for the instruction pointer to the stack which right now has me baffled.
Blindly disassembling the 1B module without complete understanding of how the bios is loaded is a task big for any man! I'm reading through the Architecture design guides from Intel as I go along and come up with questions and it's a long slow process. Loading the bios and setting up all the hardware and registers is such an enormous task. I respect the hardware engineers at Intel for writing all the assembly to do the core functions. 440KB 1B module equates to too many instructions, considering an instruction is kept at less than 2 bytes optimally! MOV EAX, 190h for example is equivalent of 2 bytes or 00-03h. Other part is trying to figure out which data is actually data, and which are instructions.
I think I'll be here doing this Dec 2009! Hell I'll keep at it though, since finding the instruction in the I7 bios that sets D_LCK bit in SAD register will mean we can set timings, qpi ratio, mem ratio, etc while in the OS! D_LCK locks the PCI Device Bus registers set out by the Rules for System Address Decoder. Simply put means all registers that can change bios settings for the IMC are read only until RESET once the bios sets that particular bit to 1.
I don't even know where to start there!