AMD Fusion

http://img697.imageshack.us/img697/6632/fusion.jpg

After Intel's "Sandy Bridge" leak, here is AMD's CPU/GPU mix up: four K10 cores w/ 1MB L2, no L3 and a side strapped GPU core.

More here.

sweet! now we need Hans to decipher building blocks and size :D

That looks to be the 2011 Llanos APU product.

presentation from Chekib Akrout, General Manager, Technology Group could be very interesting!

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Originally Posted by terrace215

That looks to be the 2011 Llanos APU product.

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What's up with the constant "32nm is 2011 thing"?:confused:
It's been a known fact for over a year now...

BTW,thanks for sharing the pic and news fellix_bg. Interesting approach used by AMD,make a monolithic APU with "older" core but with a new gpu, on a new node.This could be a training of sorts for bulldozer parts that will follow soon after.

Nice shot.
That dark "thing" in the lower part must be the GPU/IGP, but looks so strange...

AMD+ATI chip starting to become real (long way until real product, I know).

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Originally Posted by informal

BTW,thanks for sharing the pic and news fellix_bg. Interesting approach used by AMD,make a monolithic APU with "older" core but with a new gpu, on a new node.This could be a training of sorts for bulldozer parts that will follow soon after.

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what do you mean "older core"?
I wasn't aware of AMD quad-core CPU with 1MB L2 per core (and probably some more greenish squares on it :) )

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Originally Posted by Nedjo

what do you mean "older core"?
I wasn't aware of AMD quad-core CPU with 1MB L2 per core (and probably some more greenish squares on it :) )

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I mean 10h and not bd/ontario ;). L2 increase is a bonus but not design change that meant huge investments in redesign(look at Regor vs Propus ;))

Soooo in 2011, the bulldozer core is going to be 8 & 6 cores version, and the interlagos platform is going to be bulldozer MCMs?. Seems really promising if they can deliver!

Hope that bulldozer core kicks some serious ass!

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Originally Posted by informal

What's up with the constant "32nm is 2011 thing"?:confused:
It's been a known fact for over a year now...

BTW,thanks for sharing the pic and news fellix_bg. Interesting approach used by AMD,make a monolithic APU with "older" core but with a new gpu, on a new node.This could be a training of sorts for bulldozer parts that will follow soon after.

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Well, if you think about the potential benefits compared to the risks on the engineering side it makes sense. By using the existing core they should really only have to deal with shrinking it to the smaller node size and not worry so much about potentially changing specs, but more on the overall picture; verification should be easier at least.

Also, you have to remember the segment that it's targeting, ie. it's more of a mainstream part that doesn't need as high performance of a core.

What I'm more interested in is how much it shares in common with Ontario and the actual structure, ie. the shared memory controller/etc. Since Akrout went through the subject rather quickly, hopefully they go in depth during the APU breakout session :)

How many SP(ATI GPU) in the APU ?

@vietthanhpro: Hm, round 240 id say.

They are saying its 480.

http://www.xbitlabs.com/news/cpu/dis...rocessors.html

And Anand is saying AMD is saying it will be GigaFLOP APU :D

In other words HD4850 ALU performance .:up:

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Originally Posted by vietthanhpro

How many SP(ATI GPU) in the APU ?

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Originally Posted by w0mbat

@vietthanhpro: Hm, round 240 id say.

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Originally Posted by SimBy

They are saying its 480.

http://www.xbitlabs.com/news/cpu/dis...rocessors.html

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Originally Posted by Lightman

And Anand is saying AMD is saying it will be GigaFLOP APU :D

In other words HD4850 ALU performance .:up:

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for some reason I trust w0mbat most of all ;)

but could we move this conversation in to the "official" thread: http://www.xtremesystems.org/forums/...d.php?t=238702

i see 6 SIMDs on the die so thats 480 alu's. looks like they changed the layout of the SIMDs to make it fit nicely and they still have a lot of space left for moar cores.

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Originally Posted by Nedjo

for some reason I trust w0mbat most of all ;)

but could we move this conversation in to the "official" thread: http://www.xtremesystems.org/forums/...d.php?t=238702

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this time it seems 480 is the correct figure.
LOLz....you better refer to source before you trust/believe in anyone

And now we can see the complete die shot of 32nm Llano core,not the cropped version :):
Complete slide
http://img22.imageshack.us/img22/491...rmsslide03.jpg


And re-sized:
http://img233.imageshack.us/img233/6...d2010small.jpg

640SP ? lol

Quote:

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Originally Posted by informal

And now we can see the complete die shot of 32nm Llano core,not the cropped version :):
Complete slide

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Where did you find it?:)

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Originally Posted by Oliverda

Where did you find it?:)

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Teh internetz is full of nice stuff :D.
Actually i got a link to the slide via e-mail :). The person who sent it knows a thing or two :).

PS The thing at the bottom does look like a "bit" bigger GPU,or could also be northbridge-related for all we know.

According to PC Watch:

Attachment 98552

http://pc.watch.impress.co.jp/docs/c...12_328392.html

4770/4850/57x0 cards had mem bandwidth about 64Gb/s, 4670 had twice less.

How they gonna provide at least 32Gb/s to their IGP ?

@ Face

That picture of Llano die is actually not complete ;),look up a few posts.
The not-cropped picture shows much greater section dedicated to GPU,approx. ~480SP.Total die size est. 200+mm2,est. IMC is 192b wide supporting 1600Mz DDR3 memory.

So Llano is the second Fusion stage, combining SPs with X86 arch K10 cores. The final Fusion stage (full integration) will fusion (so appropiate) with Bulldozer arch? Or it will implicate a full new architecture? Talking about 2012 i supose...