Core Temp Beta 0.99 released!

**The Coolest** · 05-02-2008, 03:53 PM

Beta Version 0.99 - 2nd May, 2008

- Fix: Incorrect recognition of 45nm Mobile Intel CPUs.
- Fix: CPU temperature not displayed in Core Temp window on Phenom CPUs (0.98 and 0.98.1).

- Add: Shared memory - developers now have access to Core Temp data.
- Add: Register dump to text file function.
- Add: Preliminary Atom (Silverthorne) support - Untested.

This version represents a big change in the background as now 3rd parties can access Core Temp's readings directly using their programs. Of course Core Temp must be running for this to work.
For more details visit this page

There is already a little sidebar gadget for Vista thrown together quickly to demonstrate how the shared memory works. (Looks best on a quad core or 2x dual core rig)
You can find a link to it in this post:
http://www.alcpu.com/forums/viewtopic.php?p=1721#1721

If you already know how to access shared memory you can use the info in this post to access Core Temp's shared memory:
http://www.alcpu.com/forums/viewtopic.php?p=1715#1715
If you don't then no worries, I've already got a .Net wrapper DLL finalized and I'm working on finishing a C++ DLL as well.

The Register dump feature is mostly identical to the one GCPUID had (if anyone still remembers it). It is similar to CPU-z's register dump but my version is simplified.
A register dump is important, as it allows the user quickly send processor's information for debugging purposes or to help add support to yet unsupported processors.

Atom Silverthorne detection was added with information based on Intel's latest public data sheet and spec update for Silverthorne (Diamondville should work as well, but will probably be identified incorrectly as a Silverthorne part).
I haven't had the chance to actually test it on one of those, so if anyone has access to an Atom a register dump and a screenshot would be great help.

**mascaras** · 05-02-2008, 04:00 PM

edit: i see it now

regards

**Gen** · 05-02-2008, 04:02 PM

direct link

**The Coolest** · 05-02-2008, 04:03 PM

You should clear your cache, the page was updated (there's a link under the "final" 0.98.1 release)

**X.T.R.E.M.E_ICE** · 05-02-2008, 04:13 PM

Originally Posted by The Coolest

Beta Version 0.99 - 2nd May, 2008

- Fix: Incorrect recognition of 45nm Mobile Intel CPUs.
- Fix: CPU temperature not displayed in Core Temp window on Phenom CPUs (0.98 and 0.98.1).

- Add: Shared memory - developers now have access to Core Temp data.
- Add: Register dump to text file function.
- Add: Preliminary Atom (Silverthorne) support - Untested.

This version represents a big change in the background as now 3rd parties can access Core Temp's readings directly using their programs. Of course Core Temp must be running for this to work.

There is already a little sidebar gadget for Vista thrown together quickly to demonstrate how the shared memory works. (Looks best on a quad core or 2x dual core rig)
You can find a link to it in this post:
http://www.alcpu.com/forums/viewtopic.php?p=1721#1721

If you already know how to access shared memory you can use the info in this post to access Core Temp's shared memory:
http://www.alcpu.com/forums/viewtopic.php?p=1715#1715
If you don't then no worries, I've already got a .Net wrapper DLL finalized and I'm working on finishing a C++ DLL as well.

The Register dump feature is mostly identical to the one GCPUID had (if anyone still remembers it). It is similar to CPU-z's register dump but is simplified.
A register dump is important, as it allows the user quickly send processor's information for debugging purposes or to help add support to yet unsupported processors.

Atom Silverthorne detection was added with information based on Intel's latest public data sheet and spec update for Silverthorne (Diamondville should work as well, but will probably be identified incorrectly as a Silverthorne part).
I haven't had the chance to actually test it on one of those, so if anyone has access to an Atom a register dump and a screenshot would be great help.

Thanks for the link. Still shows Yorkfield higher the realtemp by 10c

**Battle_Rattle** · 05-02-2008, 04:20 PM

Is there a final discussion on which is better? Because the one post on XS about RealTemp seemed compelling...

**vengance_01** · 05-02-2008, 04:27 PM

Rattle You can force Core Temp to change T-juction to 95. The only difference between real temp and core temp is this.

**The Coolest** · 05-02-2008, 04:58 PM

Originally Posted by X.T.R.E.M.E_ICE

Thanks for the link. Still shows Yorkfield higher the realtemp by 10c

I decided to keep Core Temp's defaults as they were, you can use the ini file to adjust tj.max. If you want 95C then put -10 after the equal sign

**Spawne32** · 05-02-2008, 05:31 PM

awesome, hope u dont mind me posting this as news on my site

**The Coolest** · 05-02-2008, 05:36 PM

Sure, feel free

**X.T.R.E.M.E_ICE** · 05-02-2008, 06:04 PM

so is there a fix for wrong temp reading on Yorkfield?

**3NZ0** · 05-02-2008, 07:35 PM

Still can't ID mobile 45nm right, at least it doesn't think it's a skt771 xeon though.

**The Coolest** · 05-03-2008, 12:24 AM

Originally Posted by X.T.R.E.M.E_ICE

so is there a fix for wrong temp reading on Yorkfield?

There is nothing wrong with temp readings. If you want to adjust tj.max then you can do it from the ini file.

Originally Posted by 3NZ0

Still can't ID mobile 45nm right, at least it doesn't think it's a skt771 xeon though.

Could you be a little bit more specific? A screenshot would help...

This is a public beta, the reason for it is to iron out bugs before the official release.

**The Coolest** · 05-05-2008, 03:07 AM

Core Temp's shared memory goes official. Everyone is welcome to read up on specs.
DLLs and demo projects showing how to use them are available for download here.

**hecktic** · 05-05-2008, 03:16 AM

any chance we will see a 1.0 final release anytime soon?

edit: core temp 0.99 beta says each of my e6300 cores are running 62 degrees with under 5% load on each core... that cant be right?

**The Coolest** · 05-05-2008, 03:56 AM

If you have an L2 revision it may have a Tj.Max of 85C. Try to adjust the Tj.Max in the ini file to -15.
Other than that Core Temp's temperature detection code has basically stayed the same for about 1.5 years, there is nothing to change about it as it simply reads a value out of a register in the CPU.

**DragoonXX** · 05-05-2008, 08:11 AM

I still have one question... What is the TJmax of a G0 Q6600? I want to make sure that I've got the right temps being monitored

**vengance_01** · 05-05-2008, 08:15 AM

Dragoon the T-Max is detected just fine on all 65nm chips. You do not need to change them at all.

**The Coolest** · 05-06-2008, 01:55 AM

Beta Version 0.99.0.1 - 2nd May, 2008

Changes from previous beta:

- Fix: CPU load would sometimes display -1% load.
- Fix: AMD K8 would sometimes spike to 206C, the false reading is now ignored.
- Fix: Core Temp does not show up automatically on G15 LCD with 2.02 driver.
- Fix: Shared memory structure was not properly filled on multiprocessor systems.

**hecktic** · 05-06-2008, 02:13 AM

Originally Posted by The Coolest

If you have an L2 revision it may have a Tj.Max of 85C. Try to adjust the Tj.Max in the ini file to -15.
Other than that Core Temp's temperature detection code has basically stayed the same for about 1.5 years, there is nothing to change about it as it simply reads a value out of a register in the CPU.

fixed

**The Coolest** · 05-07-2008, 06:35 PM

Beta Version 0.99.0.8 - 7th May, 2008

Changes from previous beta:

- Fix: System tray setting "Show highest temperature" only displays one temperature reading in multi CPU system.
- Fix: Mobile 45nm Intel CPUs should now be correctly recognized *hopes really hard* - needs testers
- Fix: Certain problems with font resizing should now be fixed.
- Fix: G15 LCD would not update after using soft buttons.
- Fix: On temperature display mode change, high and low records were not reset.

- Add: Support for Intel Core 2 Duo E7000 45nm series.

- Change: Improved detection of L2 cache on Intel chips for accurate recognition.
- Change: Rewritten temperature calculation to fix problems with shared memory. Needs more testing to confirm as 100% working. (Play with temperature modes... Fahrenheit, Delta to TjMax)

Please help me out test this beta, see if you can dig up more bugs that need to be fixed.
Thanks for all your help guys, I appreciate it.

**hecktic** · 05-07-2008, 06:43 PM

I can test... though I do not own any 45nm based mobile chips...

**The Coolest** · 05-07-2008, 06:56 PM

Thanks, but the main problem is with 45nm chips. As they add x.5 multipliers I had a mess when trying to calculate the model number.
I think I got it right this time, so I need to see if it works.

Also I really need people to see if I covered everything in regards to temperature mode settings (like Fahrenheit and Delta to TjMax) to make sure that all of them are working correctly.

**Richard Dower** · 05-08-2008, 02:37 PM

Why dosen't the "C1" revision show up?

Pah!...nevermind, you've upped another beta, 0.99.0.11:

- Fix: Incorrect recognition of 45nm Mobile Intel CPUs.
- Fix: CPU temperature not displayed in Core Temp window on Phenom CPUs (0.98 and 0.98.1).
- Fix: CPU load would sometimes display -1% load.
- Fix: AMD K8 would sometimes spike to 206C, the false reading is now ignored.
- Fix: Core Temp does not show up automatically on G15 LCD with 2.02 driver.
- Fix: Shared memory structure was not properly filled on multiprocessor systems.
- Fix: System tray setting "Show highest temperature of each CPU" only displays one temperature reading in a multi CPU system.
- Fix: Certain problems with font resizing should now be fixed.
- Fix: G15 LCD would not update after using soft buttons.
- Fix: On temperature display mode change, high and low records were not reset.
- Fix: Changing the reading interval in settings did not actually change update, restart of Core Temp was needed to apply change.

- Add: Shared memory - developers now have access to Core Temp data.
- Add: Register dump to text file function.
- Add: Preliminary Atom (Silverthorne) support - Untested.
- Add: Support for Intel Core 2 Duo E7000 45nm series.

- Change: Improved detection of L2 cache on Intel chips for more accurate recognition.
- Change: Rewritten temperature calculation to fix problems with shared memory. Needs more testing to confirm as 100% working.