Quote Originally Posted by Helmore View Post
That's not what I said. I said, lower IPC than Phenom II while clocking higher and Phenom II has a lower IPC than Core 2 AFAIK.
Even so, it has a lower frequency, thus it has other bottlenecks in the design.

You could also go for a more hybrid approach, like double clocking those parts in a core that make sense. Clock domains within a single core in other words. You could for example run the schedulers and execution units at double the clockspeed of the fetch and decode stage. I'm not saying they will, but it's another approach.
Nothing new here; Pentium 4 did this back in 2000. The integer core was clocked 2x the core clock. Ultimately it ended badly, altough they tried every technique, low swing circuits, domino logic, running something at 6-8GHz means a lot of power used and performance per watt is poor.