New Memory Tweaker for Intel Chipsets

[dinos22]

don't click on exit button but rather than X in top right corner
that should keep things correct

[ziddey]

uncheck lock mchbar

[HamidFULL]

don't click on exit button but rather than X in top right corner
that should keep things correct

Thanks but problem no solved

uncheck lock mchbar

Thanks I will try when I reach to home!

[FELIX]

Restart your system, run memset and unchek "lock mchbar"

[HamidFULL]

Restart your system, run memset and unchek "lock mchbar"

Thanks I will try when I reach to home!

[zsamz_]

felix should we unchek "lock mchbar" for p35 chipset also?

nice job btw thank you again to you n stilt

[FELIX]

...only if you have the same problem than HamidFULL (read post #575)

[FELIX]

For the Write Recovery time and the write to Read delay, bios and memset are right; I explain:

Write Recovery time and Write to Read delay are internal dram timing.
There values are usually 3 to 8 for Write Recovery time and 2 to 6 for Write to Read delay.
But memset don't report these value, memset report Write to Precharge delay and Write to Read command delay.

Here is how these value are calculated by the chipsets:

Write to Precharge = Cas - 1 +BL/2 + tWR.
Write to read command = Cas - 1 +BL/2 + tWTR.
BL(Burst Lenght) practically always 8.
tWR(Write recovery time) is 3 for ddr or ddr2/400 and 4 for ddr2/533, 5 for ddr2/667-800.It's can vary.

For example, If your have ddr2/533 and your Cas latency is 4,Write Precharge = 4 - 1 + (8/4) + 4 = 11.

It's the reason that memset report higher values than the bios.
You can see here at page 114 for Intel explanations.

[Truckchase!]

For the Write Recovery time and the write to Read delay, bios and memset are right; I explain:

Write Recovery time and Write to Read delay are internal dram timing.
There values are usually 3 to 8 for Write Recovery time and 2 to 6 for Write to Read delay.
But memset don't report these value, memset report Write to Precharge delay and Write to Read command delay.

Here is how these value are calculated by the chipsets:

Write to Precharge = Cas - 1 +BL/2 + tWR.
Write to read command = Cas - 1 +BL/2 + tWTR.
BL(Burst Lenght) practically always 8.
tWR(Write recovery time) is 3 for ddr or ddr2/400 and 4 for ddr2/533, 5 for ddr2/667-800.It's can vary.

For example, If your have ddr2/533 and your Cas latency is 4,Write Precharge = 4 - 1 + (8/4) + 4 = 11.

It's the reason that memset report higher values than the bios.
You can see here at page 114 for Intel explanations.

Thanks for the explanation Felix!

[albertyin]

Here is how these value are calculated by the chipsets:

Write to Precharge = Cas - 1 +BL/2 + tWR.
Write to read command = Cas - 1 +BL/2 + tWTR.
BL(Burst Lenght) practically always 8.
tWR(Write recovery time) is 3 for ddr or ddr2/400 and 4 for ddr2/533, 5 for ddr2/667-800.It's can vary.

For example, If your have ddr2/533 and your Cas latency is 4,Write Precharge = 4 - 1 + (8/4) + 4 = 11.

should it be 4-1+(8/2)+4=11

[FELIX]

should it be 4-1+(8/2)+4=11

...exact, you're right.

[lowfat]

anyone else notice how if you change the memory ratio from 4:5 to 5:6 the performance level changes from 7 to 10. Then if you change it from 5:6 to 1:1, the performance level jumps to 11. This was all @ 490MHz FSB on a P35-DQ6.

EDIT: On a hunch i did some more testing.

I booted to 400MHz FSB with memory @ 1:1, Performance Level was 11. Booted to 515MHz with memory @ 1:1, Performance Level was still 11. Booted to 515MHz FSB with memory @ 5:6, Performance Level dropped to 10. Booted to 400MHz FSB 5:6, Performance Level was also 10.

So I do not believe the FSB has anything to do with the strap change on the P35-DQ6, just the memory ratio. Kind of odd through that 1:1 would be a higher Performance level over 4:5 though.

[ziddey]

1:1 and 5:6 are part of 333strap. 4:5 is part of 266strap.

[kiwi]

Don't know if it is a memset bug or gigabyte bug but on p35 DS3r it shows weird 'Write to precharge' and 'write to read delay' timings, completely different from those set in bios.

When set to Auto, they seem fine

If I remember right the same thing happened to old DS3 965

[FELIX]

kiwi=> read post #583, make the calculation, and tell us the result.

[metro.cl]

Felix Memset wont repor DDR3 MHz on Gigabyte P35T DQ6, how can i help you to fix this?

[FELIX]

Report nothing, or wrong value?

[metro.cl]

Report nothing, or wrong value?

Nothing 0 MHz

[FELIX]

I send you a PM.

[Hutch]

Don't know if it is a memset bug or gigabyte bug but on p35 DS3r it shows weird 'Write to precharge' and 'write to read delay' timings, completely different from those set in bios.

When set to Auto, they seem fine

If I remember right the same thing happened to old DS3 965

It's the bios. The bios engineers screwed up pretty badly and they still haven't figured it out. They didn't change the calculations in the bios from the way they have the stupid (+.1V +.2V +.3V) things. When you set one of those values in the bios, it ADDS whatever you set it to to the default value.

For example, write to precharge is default at 5 in bios. If you select 11 for the value, memset will tell you that it's really 16, because it is.

Felix, have you fixed the 1:1 cas 5 on p965 boards? The PL worked on my board, just not with 1:1 cas 5.

[ziddey]

you move from andover??

[furballi]

Program doesn't detect my IP35 chip (Abit IP35-E). Anyone with a fix or link to a good download?

TIA,
F

[FELIX]

=>Hutch:I add some values in PL on this version, not sure that it's enought.

=>furbally: save a register dump (with cpu-z->last table->register.txt) and send it at: memset@hotmail.fr

[furballi]

Running now after downloading the latest version. Is there an instruction manual?

TIA,
F

[FELIX]

=metro.cl, hutch: use this version: MemSet33