New Memory Tweaker for Intel Chipsets

[FELIX]

For information:
-Read delay usually settings is 3 or 4 for ddr,4 or 5 for ddr2 400/533 5 or higher for other ddr2.
(Read delay is a timing between memory chip and processor)
-Refresh cycle time usually settings are ~14 for ddr, ~20 for ddr2 400,25 and higher for other ddr2.
-Page close idle Timer is setting at 8 on 915 chipset,8 on 925 chipset if pat disabled,
and 3 or 4 if pat enabled.3 for other chipsets.
-Other values is calculed with specifications of your memory spd.
For example,Write Precharge = Cas - 1 +BL/2 + tWR.

BL(Burst Lenght) practically always 8.
tWR(Write recovery time) is 3 for ddr or ddr2/400 and 4 for ddr2/533.

If your have ddr2/533 and your Cas latency is 4,Write Precharge = 4 - 1 + (8/4) + 4 = 11.
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On 865/875 chipset Read delay adjust = -0,5.
Example,if your Read delay is 6 and Read delay ajust is Enabled, Read delay=5,5.