Core2 Duo on unfriendly (Pentium D only) MoBo.

[Antinomy]

I couldn't leave all the fun to wytiwx.

The original research was done by www.ROM.by members back in 2006.

Preamble:

• Early revisions of 975X boards don't support Core2 Duo
• Right after Core2 Duo hit the market, vendors started to sell refreshed boards on old chipsets like 945P and even 865P though new chipsets like 975X and P965 were claimed to be required

There are also theoretical prerequisites:

• Two cores of Conroe do not require any special pinout: the existing Pentium D 8xx/9xx were already dual core and have the same package - LGA775
• The 65nm manufacturing process applies to the die itself, nothing about compatibility
• VRM11 is more about marketing. The power needs of Conroe are much less than Netburst architecture which already had power standards 04A (max Icc 78A), 04B (max Icc 119A), 05A (100A), 05B (125A). Whereas the new 06 standard describes a maximum Icc of lousy 75A.
  The main difference is in another thing. The older VRM10 used 7 bits VID0-VID6 to describe default Vcore. The voltage range was from 0,83125V to 1,60000V with a step of 0,00625V. VRM11 make use of 7 VID bits VID0-VID7. Same 0,00625V steps with a voltage range from 0,50000V to 1,60000V. The main difference is that the VID table is completely different!

Compatibility problems

• As you know, Intel won't leave technical changes alone. They always add some artificial incompatibilities due to marketing reasons. They've been doing so since Pentium 3 Coppermine. There are some pins that check VRM and platform compatibility and prevent system from powering up.
• BIOS support. Now that's a tough one. The problem is that Conroe initialization is completely different from what was used on earlier systems. The MSR 2Ch (Processor Frequency Configuration) and 2Bh (Processor Soft Power-On Configuration) are now gone while they are the ones used for initial start on older CPUs. Newer Core2 compatible BIOS versions have CPUID checks to handle MSR registers correctly. This is the biggest problem preventing this mod from being applied to any LGA775 board.

Modification
After some datasheet digging, 4 groups of pins appeared that are responsible for Core2 Duo operation. The board didn't require any modifications except a new BIOS. The mods were done on CPU pads.

• VRDSEL signal, AL3. On older boards this pad is defined as Vss. On newer it shouldn't be connected to Vss so the CPU is assured it's running on a VRM11 board. So we simply isolate this pad from the socket.
• MSID0-MSID1, pads W1-V1. They are responsible for Market Segment Selection and should be connected to ground for Core2 Duo. So all we have to do for boards not supporting 05B power standard is connect W1-V1-U1 since U1 is Vss. The author of the mod didn't have to mod this one, worked fine without it.
• Connecting AM1-AM2-AM3-AM4-AL4-AL5-AL6-AK4-AK5 together. This is used for connecting VID0-VID5 to ground. This operation will give us 1,08V as a starting voltage which should be fine to start for most Core2 CPUs and it's easy to mod. You can try to start without VID mod but who knows, what voltage will the Conroe VID give being read by VRM10 VID table. The author tried and the system started with a voltage of 1.414V (measured by multimeter).
• Connecting pads D23-C23. VCCPLL is moved from C23 to D23. LGA775 land listing shows the old VCCIOPLL on C23 and newer VCCPLL on D23. But signal description doesn't list VCCIOPLL at all. Anyway, without this connection, it won't start.

This a bottom view to CPU pads. Red pads should be isolated, green - connected.
Is it already show time? Stop, we forgot about the BIOS.

BIOS update
The first thing you should prepare is a new BIOS that is Conroe ready. The easiest approach is to find a BIOS for a newer revision than the board you have. They usually have compatible BIOS and shouldn't have any problem with flashing one into another (like Asus X38/X48 series). The author checked the Gigabyte board and it worked like a charm.

Boards checked for succesful Core2 Duo modification:

1. Asus P5LD2-VM rev 1.0 (i945G) works fine with Asus P5LD2-VM rev 2.0 BIOS
2. Gigabyte GA-8I945P-G (i945) with BIOS from GA-8I945P-S3(DS3) - all revisions
3. ECS 945P-A rev 2.0 (i945) with ECS 945P-A rev 3.0 BIOS

Boards that should work fine in theory:
MSI MS-7246 Platinum rev 1.0 (i975) with MS-7246 PowerUp rev 2.0 BIOS.



One major thing to add. All posts about "patching BIOS with new microcodes and BIOS working like a charm" are lame. CPU initialization is far more complex and microcodes don't play any vital part in this process. Adding them to get newer CPU support is useless. It might help only when a board starts up but gives you warnings about uCode.

Stay tuned, I'll add another research, one of my own

[wytiwx]

I have no plan to do this yet.

Hard to read Russian webpage for me

keep going!

[l0ud_sil3nc3]

retro modding ftw!

[mockingbird]

Excellent post...

Would modifying the BIOS simply involve changing the CPU Microcode module?

CBROM.EXE V1.98 [08/27/08] (C)Phoenix Technologies 2001-2008

              ******** 515F1P55_SLIC.BIN BIOS component ********

 No. Item-Name         Original-Size   Compressed-Size Original-File-Name
================================================================================
  0. System BIOS       1F533h(125.30K)  145D4h(81.46K)  515F1P55.BIN
  1. XGROUP CODE       0EE30h(59.55K)   0A0F6h(40.24K)  awardext.rom
  2. ACPI table        0463Ch(17.56K)   01ADEh(6.72K)   ACPITBL.BIN
  3. EPA LOGO          0168Ch(5.64K)    002AAh(0.67K)   AwardBmp.bmp
  4. YGROUP ROM        0B290h(44.64K)   057BDh(21.93K)  awardeyt.rom
  5. GROUP ROM[ 0]     05790h(21.89K)   02612h(9.52K)   _EN_CODE.BIN
  6. SETUP0             01D40h(7.31K)   00C04h(3.00K)   _ITEM.BIN
  7. GV3                019FDh(6.50K)   00B2Bh(2.79K)   PPMINIT.ROM
  8. PCI ROM[A]        0F200h(60.50K)   09593h(37.39K)  raid_or.bin
  9. PCI ROM[B]        0C000h(48.00K)   065E0h(25.47K)  int13h.bin
 10. PCI ROM[C]        0F800h(62.00K)   07620h(29.53K)  b44pxe.lom
 11. PCI ROM[D]        10000h(64.00K)   09771h(37.86K)  b5789pxe.lom
 12. OEM1 CODE         08000h(32.00K)   0388Fh(14.14K)  cpfrv118.BIN
 13. OSB LOGO ROM      4B30Ch(300.76K)  00C43h(3.07K)   FOXCONN.BMP
 14. Flash ROM         0C042h(48.06K)   0683Ah(26.06K)  AWDFLASH.EXE
 15. NoCompress ROM    00176h(0.37K)    001A7h(0.41K)   iSLIC.BIN
(SP) NCPUCODE          0FC00h(63.00K)   0FC00h(63.00K)  NCPUCODE.BIN

  Total compress code space  = 67000h(412.00K)
  Total compressed code size = 64D27h(403.29K)
  Remain compress code space = 022F9h(8.74K)

                          ** Micro Code Information **
Update ID  CPUID  | Update ID  CPUID   | Update ID  CPUID   | Update ID  CPUID

------------------+--------------------+--------------------+-------------------
PGA478 2E 00000F29| PGA423 2C 00000F25 | PGA423 21 00000F24 | PGA478 0B 00000F65

SLOT1  04 00000F64| PGA478 0F 00000F62 | PGA478 07 00000F61 | SLOT1  05 00000F60

SLOT1  04 00000F4A| SLOT1  03 00000F49 | SLOT1  03 00000F47 | SLOT1  06 00000F44

SLOT1  05 00000F43| SLOT1  03 00000F42 | SLOT1  17 00000F41 | SLOT1  12 00000F41

SLOT1  02 00000F37| SLOT1  17 00000F34 | SLOT1  08 00000F34 | SLOT1  0C 00000F33

SLOT1  0A 00000F32| SLOT1  0B 00000F31 |

In this example, could I just take the NCPUCODE.BIN module from a later Foxconn revision with Core/Core2 support and replace it with CBROM? (Motherboard is a 945P7AA-8EKRS2, currently running Pentium D 935).

[Antinomy]

In this example, could I just take the NCPUCODE.BIN module from a later Foxconn revision with Core/Core2 support and replace it with CBROM? (Motherboard is a 945P7AA-8EKRS2, currently running Pentium D 935).

Read the last paragraph ucodes are not the problem, they are easy to add but they are not involved in CPU init routine.
wytiwx, I can translate anything you want to English. Or I can grab my colleague and ask her to translate it to Chinese (though she knows nothing about hardware)

[wytiwx]

I think this mod depends on mobo itself.

Proper mobo and mod can make even 865 chipset work, incompatible mobo just makes you mad.

Translate to Chinese will be the best, but the most difficult too.