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Thread: WPCREDIT tweaks for the A64

  1. #26
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    do changeing any of them memtimings listed change the ras to cas timing? I just want to know wich ones would be safe cause my ram wont do a ras to cas 2 only 3.

  2. #27
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    Originally posted by Shroomalistic
    Have you tried crystal cpuid, it works great with the .5 multies for me.
    The A64 uses whole values (integers) for the memory divider. If you set your CPU multi to say 10.5x and the mem 1:1, then the memory will actually be running with the 11x divider. CPU-Z reports it incorrectly.

  3. #28
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    0x88 = 0x02522310 = 8-12 cas1.5
    0x02522311 = 8-12 cas2
    0x02522301 = 7-12 cas2
    0x02522300 = 7-12 cas1.5
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  4. #29
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    Originally posted by cpulloverclock
    0x88 = 0x02522310 = 8-12 cas1.5
    0x02522311 = 8-12 cas2
    0x02522301 = 7-12 cas2
    0x02522300 = 7-12 cas1.5

    Oops better edit my first post

    0x02522311 is what I have been using

  5. #30
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    Originally posted by CodeRed
    Oops better edit my first post

    0x02522311 is what I have been using
    I'm using 0x02522200 and 800 for 0x8C

    BSOD and rtlnicxp.sys (realtek) problem with 0x02522000
    Last edited by cpulloverclock; 06-20-2004 at 02:48 PM.
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  6. #31
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    Originally posted by cpulloverclock
    I'm using 0x02522200 and A00 for 0x8C

    BSOD and rtlnicxp.sys (realtek) problem with 0x02522000
    my mem wont run stable below 2-8-12-... although I copuld probably do 2-7-13...


    A00 is just different refresh values ... didnt make any performance gain for me

    Try the RdWrQByp and BypassMax values in the config resgister. Set these values to the maximum ... it helped a little bit more in SuperPi and Pifast.

  7. #32
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    Originally posted by CodeRed
    my mem wont run stable below 2-8-12-... although I copuld probably do 2-7-13...


    A00 is just different refresh values ... didnt make any performance gain for me

    Try the RdWrQByp and BypassMax values in the config resgister. Set these values to the maximum ... it helped a little bit more in SuperPi and Pifast.
    the japanese use wcpredit or wpcrset to have a better time at superpi???
    I love XS

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  8. #33
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    Originally posted by cpulloverclock
    the japanese use wcpredit or wpcrset to have a better time at superpi???
    I can almost match cal930 28 sec result at 11x270 ... very close now, just gotta work on my Win2003 tweaks. At 29.232 sec right now with only minor 2003 tweaks.

    I noticed that he used 128MB ram (as reported by SuperPi). Maybe its an old dual sided stick and gets some boost due to interleave ... or he setup a 128MB RAM disk

    These guys are hard to catch.

  9. #34
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    my 0x88 value is 12423401 and it took my timings to 2,3,2,5,7,16.

    what do i have to change to get that 16 down to 13 or what ever is best.

  10. #35
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    Originally posted by Shroomalistic
    my 0x88 value is 12423401 and it took my timings to 2,3,2,5,7,16.

    what do i have to change to get that 16 down to 13 or what ever is best.
    Are you talking about the bank cycle time (Trc) or the DRAM idle timer value?

  11. #36
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    No Actually i was talking about my DRAM idle timer. Sorry bout that.


    so far from testing i was able to change my RAS# to CAS# delay by changin bit 15-12 of 0x88 and my Bank cycle time (trc) by changing bit 7-4. My CAS setting will only run at Cas 2 nothing lower or higher so im stuck there. Is there any program that will telling me what my full timings are. Cpu-z doesnt show much.

  12. #37
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    The DRAM Idle timer has two controls

    an dynamic/static enable flag and a counter value

    Ive tested all combos and leave it where its at. This is the fastest.

    Disabling the dynamic counter load is absolute crap ... very slow. And changing the counter value (with dynamic mode enabled) doesnt seems to affect either superpi or pifast.

  13. #38
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    Re: WPCREDIT tweaks for the A64

    Originally posted by CodeRed
    Gents,

    I've just found a way to really boost your A64 performance using WPCREDIT.

    The A64 mem controller registers can be accessed using WPCREDIT using Bus #0, Device #24, Function #2. There are 4 main registers that I have been playing with:

    0x88 DRAM Timing Low
    0x8C DRAM Timing High
    0x90 DRAM Configuration Low
    0x94 DRAM Configuration High

    The timings registers set all the DRAM timings params (as you'd expect), but there are many more than most BIOSes will show you. The best performance is obtained using:

    Column Address Strobe # (CAS) = 2.0
    Row Cycle Time (Trc) = 8
    Row Refresh Cycle Time (Trfc) = 12
    RAS# to CAS# delay (Trcd) = 2
    Row to Row delay (Trrd) = 2
    Min RAS Active Time (Tras) = 5
    Row Precharge Time (Trp) = 2
    Write Recovery Time (Twr) = 2
    Write to Read Delay (Twtr) = 1
    Read to Write Delay (Trtw) = 1

    I normally write this as 2-8-12-2-2-5-2-2-1-1 for convenience ... not that rememering all those values is easy.

    To set the mem timings to the above values change the registers as follows:
    reg 0x88 to 0x02522311
    reg 0x8C to 0x00000B00
    (use 32 bit mode in WPCREDIT)

    I have only begun to experiment with the Config registers but some of the things I have tried are setting the Asynchronous Latency Value (controlled by reg 0x94). Normally my BIOS sets this to 7ns, but when I dropped it to 4ns there was a healthy boost to my memory performance. To do this set bits 0-3 of reg 0x94 to 0100 (binary) (4 for those who cant read binary).

    Just to make things more interesting, bits 22-20 of reg 0x94 control the DRAM speed (200, 166, 133, 100 Mhz). There are several reserved values, and I decided to try 110. Surprisingly this gave me a mem speed somewhere inbetween 200 and 166 MHz. This may be a 183 Mhz mem option I need to test some more to confirm these results.

    Oh, 2T is also easy to disable

    We no longer have to worry about BIOS updates, its all there in the DRAM registers. Over time I may write a simple windows app to set all this up in a user friendly fashion ... just need to find the time.

    Only thing I cant do is set the bank interleave. Doing so would reorder the physical memory locations ... not something I think windoze would be happy with

    Try it and compare your before and after benchies with something like pifast or superpi and you'll see the boost.
    If u dont want to use WPCREDIT u can built isa rom and embended it into biosfilewith cbrom... build a rom with:
    Code:
    header: 55 AA  ; Boot Able rom
    jmp init ; jump to code intialization
    retf ; return far to system bios file
    
    INIT
    pushad  
    push eax
    push edx
    mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87
    mov dx,0cf8 ; set dx as adress port
    out dx,eax ; send the address to IO Space throgh dx port
    mov dx,0cfc ; set dx as data port
    in eax,dx ;Receive the data into eax for the address we sent through dx port
    and eax,XXXXXX ; Change the data
    or eax,XXXXXX ; Change the data
    out eax,dx ; Send back the modded data through dx port
    pop edx,
    pop eax
    popad
    ret ; return to header
    
    last bit; use 8 bit checksum
    then install it with cbrom
    cbrombiosname.bun /isa filename.bin

    cheers
    Last edited by tictac; 06-20-2004 at 05:49 PM.

  14. #39
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    Re: Re: WPCREDIT tweaks for the A64

    Originally posted by tictac
    If u dont want to use WPCREDIT u can built isa rom and embended it into biosfilewith cbrom... build a rom with:
    Code:
    header: 55 AA  ; Boot Able rom
    jmp init ; jump to code intialization
    retf ; return far to system bios file
    
    INIT
    pushad  
    push eax
    push edx
    mov eax,0x80002184; eax=Bus0Dev2Func1,Offset 84,85,86,87
    mov dx,0cf8 ; set dx as adress port
    out dx,eax ; send the address to IO Space throgh dx port
    mov dx,0cfc ; set dx as data port
    in eax,dx ;Receive the data into eax for the address we sent through dx port
    and eax,XXXXXX ; Change the data
    or eax,XXXXXX ; Change the data
    out eax,dx ; Send back the modded data through dx port
    pop edx,
    pop eax
    popad
    ret ; return to header
    
    last bit; use 8 bit checksum
    then install it with cbrom
    cbrombiosname.bun /isa filename.bin

    cheers
    cheers, thats good info.

    I want to be able to access the PCI config space from within windoze ... I assume the permissions dont allow me to use the in/out instructions. Is there an easy way .. like a nice library?

  15. #40
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    weird, wpcrset doesnt apply this timings!!!!
    I love XS

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  16. #41
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    I think wpcrset aint working becuase it performs 8 bit accesses instead of 32 bit.

    EDIT: I just borked my win2k partition with wpcrset ... grrrr


    how do I boot up and bypass the wpcrset settings?

    EDIT2: never mind, I worked it out
    Last edited by CodeRed; 06-21-2004 at 02:07 AM.

  17. #42
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    Now for some good news...

    I found a port driver that will allow me to access the I/O ports and subsequently the PCI config space registers from within windoze. So give me a few days and I'll have a windoze app that allows you to change all these timings on the fly.

    I was thinking of limiting the controls to the 4 main DRAM registers listed in my first post. If anyone wants anymore registers let me know, and I'll see what I can do.

    I may also add some controls for the DRAM/cache scrubber ... just gotta test these values and see if they help with performance first.

  18. #43
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    Now this sounds VERY interseting...Awesome work CodeRed
    Got a problem with your OCZ product....?
    Have a look over here
    Tony AKA BigToe


    Tuning PC's for speed...Run whats fast, not what you think is fast

  19. #44
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    Originally posted by bigtoe
    Now this sounds VERY interseting...Awesome work CodeRed
    Well I shouldnt have jumped the gun. The library that I found only supports 8 bit port access. I have the source code but it relies on the NT DDK (which I dont have).


    This confirms that 8 bit accesses (like WPCRSET does) wont work, and after re-reading the manual its pretty obviuos that only 32 bit accesses to the I/O ports will result in PCI config space transactions (page 28).


    Anyone got the NT DDK or a port I/O library?

  20. #45
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    Talk to Samuel at x-86secret.com im sure he will help.
    Got a problem with your OCZ product....?
    Have a look over here
    Tony AKA BigToe


    Tuning PC's for speed...Run whats fast, not what you think is fast

  21. #46
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    Originally posted by bigtoe
    Talk to Samuel at x-86secret.com im sure he will help.
    No probs, I found one that actually works anyway

    http://www.programmersheaven.com/zon...t610/22947.htm

    it has a few bugs eg doesnt start service on first time its executed, but the 2nd time is fine. I have the source to the service routine startup, so I'll fix it

    this time I tested it before posting
    Last edited by CodeRed; 06-21-2004 at 03:37 AM.

  22. #47
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    my best timings for the best score :
    I love XS

    Road to CompTIA A+ (601, 602) and Network+ (N10-003) Certifications

    I want a Penryn 3.33G 12MB & quad sli Nvidia G92

  23. #48
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    Originally posted by cpulloverclock
    my best timings for the best score :
    thats savage

    try dropping Max Aysnc Latency to 6ns or even 5ns

  24. #49
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    Can someone please post a guide to what each bit modifies? I seem to be getting different readings @ register 88 and 8C even if I leave the BIOS timings alone, and just switch between 1:1 and CPU/12

  25. #50
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    Originally posted by HKPolice
    Can someone please post a guide to what each bit modifies? I seem to be getting different readings @ register 88 and 8C even if I leave the BIOS timings alone, and just switch between 1:1 and CPU/12
    An app will be redy some time tonight ... in beta form.

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