[News] Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory

[StyM]

https://www.techpowerup.com/234729/t...d-flash-memory

Toshiba America Electronic Components, Inc. (TAEC) today announced the latest generation of its BiCS FLASH three-dimensional (3D) flash memory. The newest BiCS FLASH device features 4-bit-per-cell, quadruple-level cell (QLC) technology and is the first 3D flash memory device to do so. Toshiba's QLC technology enables larger (768 gigabit) die capacity than the company's third-generation 512Gb 3-bit-per-cell, triple-level cell (TLC), and pushes the boundaries of flash memory technology.

Toshiba's new QLC BiCS FLASH device features a 64-layer stacked cell structure and achieves the world's largest die capacity (768Gb/96GB). QLC flash memory also enables a 1.5-terabyte (TB) device with a 16-die stacked architecture in a single package - featuring the industry's largest capacity. This is a fifty percent increase in capacity per package when compared to Toshiba's earlier announcement of a 1TB device with a 16-die stacked architecture in a single package - which also offered the largest capacity in the industry at the time.

The technical challenges posed by QLC technology needed to be overcome, as increasing the number of bits-per-cell by one within the same electron count requires twice the accuracy of TLC technology. Toshiba has combined its advanced circuit design and leading 3D flash memory process technology to overcome this challenge, successfully creating the world's first QLC 3D flash memory.

The timing of this achievement is especially beneficial to datacenters. "The introduction of QLC technology sets the stage for solving many of the challenges facing datacenters today," noted Greg Wong, founder and principal analyst at Forward Insights. "For datacenters, QLC SSDs can be an excellent design choice for reducing power consumption and lowering footprint. Additionally, as the push for higher capacity HDDs leads to an increase in areal density and drives up the weight per successive generation, it has become common to see a 42U rack only half-filled due to exceeding maximum weight or power supply. Flash memory-based storage solutions weigh less and realize improved power efficiencies, enabling datacenters to achieve maximum rack capacity."

Toshiba Memory Corporation was among the first to produce 64-layer 256-gigabit (32GB) devices, and has continued to demonstrate its leadership position by advancing the development of its technology. Toshiba was the first company to publically discuss QLC technology (at last year's Flash Memory Summit) and it has long been a part of the company's roadmap strategy for high-density, smaller chip size flash memory solutions. The new QLC device is targeted to applications including enterprise and consumer SSDs, tablets and memory cards.

[Sparky]

But TLC suffered performance hits compared to MLC. QLC is bound to make that even worse isn't it?

My most recent SSD purchase was an MLC drive specifically because I didn't want the TLC problem.

And datacenters? Heck, the enterprise level SSDs tend to be SLC because of durability and the least performance hit...

[Levish]

its intended to replace NL-SAS/SATA for cold storage iirc

[xlink]

But TLC suffered performance hits compared to MLC. QLC is bound to make that even worse isn't it?

My most recent SSD purchase was an MLC drive specifically because I didn't want the TLC problem.

And datacenters? Heck, the enterprise level SSDs tend to be SLC because of durability and the least performance hit...

Set it up such that you've got an SLC or MLC cache.

The benefit of this technology is that it gets NAND closer to HDD prices. Imagine swapping out all of the HDDs for flashdrives... it'll still be faster.

And heck, this is a great way of putting old foundries into use.

[Kain665]

Yep - today the majority of warm & cold data in datacenters lives on HDDs which can't really scale in performance at the device level. Solid state technologies from flash to DRAM are used in tiers to support user experience & SLAs.

Increasing the number of bits per cell just means that you are improving your cell programming technology to reliably set 16 different voltage levels (2^4). With finer voltage levels comes more risk of degradation of each cell (the reduction in effective endurance you see from SLC -> MLC -> TLC) as well as slower write speeds as you need to be very accurate with the programming signal. There is some overhead reading denser cells as the number of bits increase, but it's not nearly as significant as the overhead of writing to denser cells. I think that QLC devices will easily outperform HDDs on read workloads and help bring the cost of mass flash storage down... it will help move more data to solid state storage from spinning media.

Kristian published a good overview article on the differences between SLC/MLC/TLC, i would imagine a lot of the same concepts will apply to QLC as well.

http://www.anandtech.com/show/5067/u...ing-tlc-nand/2