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Thread: [News/Rumor] AMD 16-core Ryzen a Multi-Chip Module of two "Summit Ridge" Dies

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    [News/Rumor] AMD 16-core Ryzen a Multi-Chip Module of two "Summit Ridge" Dies

    https://www.techpowerup.com/231911/a...mit-ridge-dies

    With core performance back to competitiveness, AMD is preparing to take on Intel in the HEDT "high-end desktop" segment with a new line of processors that are larger than its current socket AM4 "Summit Ridge," desktop processors, but smaller in core-count than its 32-core "Naples" enterprise processors. These could include 12-core and 16-core parts, and the picture is getting clearer with an exclusive report by Turkish tech publication DonanimHaber. The biggest revelation here that the 12-core and 16-core Ryzen processors will be multi-chip modules (MCMs) of two "Summit Ridge" dies. The 12-core variant will be carved out by disabling 1 core per CCX (3+3+3+3).

    Another revelation is that the 12-core and 16-core Ryzen processors will be built in a new LGA package with pin-counts in excess of 4,000 pins. Since it's an MCM of two "Summit Ridge" dies, the memory bus width and PCIe lanes will be doubled. The chip will feature a quad-channel DDR4 memory interface, and will have a total of 58 PCI-Express gen 3.0 lanes (only one of the two dies will put out the PCI-Express 3.0 x4 A-Link chipset bus). The increase in core count isn't coming with a decrease in clock speeds. The 12-core variant will hence likely have its TDP rated at 140W, and the 16-core variant at 180W. AMD is expected to unveil these chips at the 2017 Computex expo in Taipei, this June, with product launches following shortly after.

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    Makes sense. No reason to think otherwise; just curious if the L3 cache will be linked together or not.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    This is good for AMD. They're clearly able to play in the high end of the market once again. Are they the gamers' dream? No, but they're good enough in gaming and great just about everywhere else.

    The real question is, how well does it perform in the things I care about (data analysis in R and Python)

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    Since when did python data analysis scripts take advantage of 32 threads? I feel like an SMT quadcore would be fine there.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    that would make it pretty interesting, otherwise not much different than a dual socket setup.
    Current Status - Testing & Research

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    Quote Originally Posted by AliG View Post
    Makes sense. No reason to think otherwise; just curious if the L3 cache will be linked together or not.
    Or can level4 cache be a more effective and low cost solution?

    But if they cant solve current problem disabling 1 core per ccx will increase the chance of hitting the same condition and 12c24t cpu will be a nightmare.


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    Quote Originally Posted by AliG View Post
    Since when did python data analysis scripts take advantage of 32 threads? I feel like an SMT quadcore would be fine there.
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    Quote Originally Posted by Darakian View Post
    Since Numpy
    Ehh. I'd rather just use Matlab and vectorize. Much faster imo (especially if you leverage their GPU toolbox).
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    Quote Originally Posted by AliG View Post
    Since when did python data analysis scripts take advantage of 32 threads? I feel like an SMT quadcore would be fine there.
    Deep Learning Neural Networks.

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    Quote Originally Posted by Eson View Post
    Deep Learning Neural Networks.
    Why would you EVER want to run a neural network off CPUs? That sounds like a horrible waste of power and efficiency.

    GPUs all the way. Not even close.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    Are we talking about REAL cores or are we still calling "core" this ALU + 0,5FPU abomination?

    Are this cores ALU+FPU or are we again at Bulldozer's modules?

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    Quote Originally Posted by El Mano View Post
    Are we talking about REAL cores or are we still calling "core" this ALU + 0,5FPU abomination?

    Are this cores ALU+FPU or are we again at Bulldozer's modules?
    Real cores. Basically 16 core = 2 Ryzen 7's (4 CCX's connected by "infinity fabric"); 12 core = 2 Ryzen 5's.
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    Quote Originally Posted by AliG View Post
    Why would you EVER want to run a neural network off CPUs? That sounds like a horrible waste of power and efficiency.

    GPUs all the way. Not even close.
    Thus, the answer to the question "does python data analysis scripts take advantage of 32 threads?" is "Yes".

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    Quote Originally Posted by Eson View Post
    Thus, the answer to the question "does python data analysis scripts take advantage of 32 threads?" is "Yes".
    I mean, I guess? But just because you on paper can do something doesn't mean it's very efficient (nor a good use of your money).

    I stand by what I said earlier. Get a quadcore and throw in a GPU for half the price difference and enjoy the best of both worlds.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    Sure, you can retrain your entire staff to work on a new language on a new architecture with new fundamental concepts in program structure then buy a brand new cluster on which to run the resulting code.... or you could buy a cpu
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    Quote Originally Posted by Darakian View Post
    Sure, you can retrain your entire staff to work on a new language on a new architecture with new fundamental concepts in program structure then buy a brand new cluster on which to run the resulting code.... or you could buy a cpu
    Ehh, I think you're overstating how difficult it is. If automotive of all industries uses GPU rackmounts, I think others will be fine.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
    .....}
    until (interrupt by Movieman)


    Regards, Hans

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    Quote Originally Posted by AliG View Post
    Ehh, I think you're overstating how difficult it is. If automotive of all industries uses GPU rackmounts, I think others will be fine.
    Those are most likely for CAE simulations; aerodynamics, air/fuel flows and thermal dynamics in the engine, collision simulations or digital production line test runs.

    A quick look on GPGPU processing and Deep Learning points to that GPUs are excellent for the training crunching but with the CPU to pre-process the data, there could be a gain of several times in GPU crunching speed. All with the Python library TensorFlow: https://www.tensorflow.org/tutorials/using_gpu

    So there are still uses for new, better multicore CPUs
    Last edited by Eson; 03-31-2017 at 02:34 AM.

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