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Thread: [News] (Leak) AMD Vega 10 and Vega 20 Information Leaked

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    [News] (Leak) AMD Vega 10 and Vega 20 Information Leaked

    https://www.pcper.com/news/Graphics-...rmation-Leaked

    During CES, AMD showed off demo machines running Ryzen CPUs and Vega graphics cards as well as gave the world a bit of information on the underlying architecture of Vega in an architectural preview that you can read about (or watch) here. AMD's Vega GPU is coming and it is poised to compete with NVIDIA on the high end (an area that has been left to NVIDIA for awhile now) in a big way.

    Thanks to Videocardz, we have a bit more info on the products that we might see this year and what we can expect to see in the future. Specifically, the slides suggest that Vega 10 ? the first GPUs to be based on the company's new architecture ? may be available by the (end of) first half of 2017. Following that a dual GPU Vega 10 product is slated for a release in Q3 or Q4 of 2017 and a refreshed GPU based on smaller process node with more HBM2 memory called Vega 20 in the second half of 2018. The leaked slides also suggest that Navi (Vega's successor) might launch as soon as 2019 and will come in two variants called Navi 10 and Navi 11 (with Navi 11 being the smaller / less powerful GPU).


    The 14nm Vega 10 GPU allegedly offers up 64 NCUs and as much as 12 TFLOPS of single precision and 750 GFLOPS of double precision compute performance respectively. Half precision performance is twice that of FP32 at 24 TFLOPS (which would be good for things like machine learning). The NCUs allegedly run FP16 at 2x and DPFP at 1/16. If each NCU has 64 shaders like Polaris 10 and other GCN GPUs, then we are looking at a top-end Vega 10 chip having 4096 shaders which rivals that of Fiji. Further, Vega 10 supposedly has a TDP up to 225 watts.

    For comparison, the 28nm 8.9 billion transistor Fiji-based R9 Fury X ran at 1050 MHz with a TDP of 275 watts and had a rated peak compute of 8.6 TFLOPS. While we do not know clock speeds of Vega 10, the numbers suggest that AMD has been able to clock the GPU much higher than Fiji while still using less power (and thus putting out less heat). This is possible with the move to the smaller process node, though I do wonder what yields will be like at first for the top end (and highest clocked) versions.

    Vega 10 will be paired with two stacks of HBM2 memory on package which will offer 16GB of memory with memory bandwidth of 512 GB/s. The increase in memory bandwidth is thanks to the move to HBM2 from HBM (Fiji needed four HBM dies to hit 512 GB/s and had only 4GB).

    The slide also hints at a "Vega 10 x2" in the second half of the year which is presumably a dual GPU product. The slide states that Vega 10 x2 will have four stacks of HBM2 (1TB/s) though it is not clear if they are simply adding the two stacks per GPU to claim the 1TB/s number or if both GPUs will have four stacks (this is unlikely though as there does not appear to be room on the package for two more stacks each and I am not sure if they could make the package bit enough to make room for them either). Even if we assume that they really mean 2x 512 GB/s per GPU (and maybe they can get more out of that in specific workloads across both) for memory bandwidth, the doubling of cores and at least potential compute performance will be big. This is going to be a big number crunching and machine learning card as well as for games of course. Clockspeeds will likely have to be much lower compared to the single GPU Vega 10 (especially with stated TDP of 300W) and workloads wont scale perfectly so potential computer performance will not be quite 2x but should still be a decent per-card boost.

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    Assuming Vega performs as many float operations per clock cycle, that translates to roughly 1.45 GHz baseclock.

    Fiji at 1.5 GHz would be roughly at GTX 1080 levels - if they fixed the ROP bottleneck there's no reason Vega 10 can't at least force Nvidia to cheapen the Tixan X.
    Quote Originally Posted by Hans de Vries View Post

    JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!

    terrace215 post: IPC decreases, The more I post the more it decreases.
    terrace215 post: IPC decreases, The more I post the more it decreases.
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    Nice to have ES card with USB connector in hands
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    It's a serial debug connector.

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    Quote Originally Posted by madcho View Post
    It's a serial debug connector.
    That's obvious duh! Universal Serial Bus you know? I bet a lot of overclockers would like to get that in their hands....

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    Quote Originally Posted by Mechanical Man View Post
    That's obvious duh! Universal Serial Bus you know? I bet a lot of overclockers would like to get that in their hands....
    It's very possible that it's not even speaking the usb protocol.
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    Quote Originally Posted by Darakian View Post
    It's very possible that it's not even speaking the usb protocol.
    Okay, I should have bolded only the serial part to get my point through?

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    Quote Originally Posted by Mechanical Man View Post
    Okay, I should have bolded only the serial part to get my point through?
    Well, it might nit be serial either. Could be jtag, could be one lane of pci-e, could be whatever. My point was more that (on a development product) physical connectors don't really tell you about the protocol going over them.
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