[News] 7th generation AMD Pro processors announced

[StyM]

http://hexus.net/tech/news/cpu/97564...ors-announced/

AMD last refreshed its Pro series of computer processors back in September 2015, with its enhanced chips based upon Carrizo and Godavari. Today AMD announced its new 7th generation Pro APUs, also known as 'Bristol Ridge Pro' processors. As with previous AMD Pro chips, the new generation brings renewed performance and feature gains alongside enterprise-class reliability and security. AMD hopes to continue the success of the Pro series as since mid-2014 it has enjoyed a 45 per cent uplift in shipments of this range.

For the first time AMD will be offering both 65W and 35W APUs as part of the Pro APU range. The 35W parts will be easily recognisable with their 'E' suffix and are meant for the growingly popular ultra-small form factor PC systems. These lower power consumption processors still offer plenty of performance, according to AMD, with clear leadership especially with regards to the integrated GPU.

AMD chose to make a direct comparison between its Pro A12-9800E and the competitive Intel Core i5-6500T (with Intel HD Graphics 530) in real-world shipping business systems. In PCMark 8 v2 Home the AMD system scored 3461, while the Intel system scored 2965. That's a 17 per cent improvement on AMD's side. However, I noticed that the comparison AMD system had an SSD while the Intel system used a 5,400rpm HDD. In the perhaps fairer graphics comparison between the same machines AMD's R7 Graphics trounced the Intel HD Graphics 530 in 3DMark 11 Performance tests scoring P3050 against P1622. That's 88 per cent better.

[zalbard]

More 28nm CPUs? Seriously?

Also, what's up with cutting the cache in half? A desperate attempt to reduce the TDP?

[onewingedangel]

In PCMark 8 v2 Home the AMD system scored 3461, while the Intel system scored 2965. That's a 17 per cent improvement on AMD's side. However, I noticed that the comparison AMD system had an SSD while the Intel system used a 5,400rpm HDD.

Seriously?

[zanzabar]

More 28nm CPUs? Seriously?

Also, what's up with cutting the cache in half? A desperate attempt to reduce the TDP?

they are still 7ish months from zen based am4 apus. this is their stop gap to get a new socket for OEMs but still have zen out for enthusiasts/server.

[zalbard]

they are still 7ish months from zen based am4 apus. this is their stop gap to get a new socket for OEMs but still have zen out for enthusiasts/server.

Sure.

But if you design a new CPU, may as well go for a die shrink? Even the crudest job would yield considerable benefits.

[AbortRetryFail?]

More 28nm CPUs? Seriously?

Also, what's up with cutting the cache in half? A desperate attempt to reduce the TDP?

Did you miss the Memo - "28nm: The Last Node of Moore's Law?" Wafer costs have not proved worth it except for ARM chips. If anything has been learned over the last 2 years, 16/14nm and below will become very 'hybrid' in node nature

I suspect more than half of the TDP gains come from power-tuning the Cape Verdi/Tonga ACE and GCN cores, and efficiency gains in the Unified Video Decoder. Impressive with 8 CUs too boot

"Bristol Ridge Excavator" Level1 cache size was expanded in size and associativiy. Level2 cache size has points of diminishing return when increased, and is now directly 'sniffed' from the graphics engine.

APUs have no L3 -- L2 functions as last level, for now. It's obvious to me, that elements of Zen moving forward may incorporate HBM as last level on an interposer with both CPU & graphic engines (Vega 16/14nm?)

_28nm Kaveri/Godavari 'Steam Roller' APUs: 2.4b transistors
28nm Carrizo/Bristol Ridge 'Excavator' APUs: 3.1b transistors

Excavator transistor 'dense libraries' at 28nm-SHP are not that dissimilar from Intel 14nm.

That is all. Over and out.

[zalbard]

Did you miss the Memo - "28nm: The Last Node of Moore's Law?" Wafer costs have not proved worth it except for ARM chips.

There are advantages other than cost, though. Power consumption would be a bit lower.

Level2 cache size has points of diminishing return when increased, and is now directly 'sniffed' from the graphics engine.

The iGPU shares the L2 with the CPU. I don't see how this explains halving the size of the L2 from Kaveri to Bristol Ridge.

Excavator transistor 'dense libraries' at 28nm-SHP are not that dissimilar from Intel 14nm.

That is very hard to believe. It would have to be 4x better when compared at the same node. Do you have a source?

[AliG]

One thing to keep in mind is that the FinFET transistors don't necessarily scale the same way in terms of wafer density. I can't recall where I read it, but the 14nm chips are a lot less than 4x denser than the 28nm chips (different transistor paradigm).

[drmrlordx]

AMD doesn't have the money to burn doing a die shrink of Carrizo/Bristol Ridge. They put all their eggs in the Zen basket. So they are flogging the existing Carrizo design just a little bit longer until they can replace it with Raven Ridge and related products.

[BeepBeep2]

Die size only increased from 245mm^2 to 250mm^2 and transistor count went up almost 30% with 5-15% IPC increase and 30-40% power reduction at low TDP.

This is all old news though, everyone knows Bristol Ridge is a Carrizo / Excavator design update in a new package. I think it's impressive what they are doing at 28nm with this design.

40% IPC uplift for Zen is now being compared to Bristol Ridge.

[AbortRetryFail?]

There are advantages other than cost, though. Power consumption would be a bit lower.

The iGPU shares the L2 with the CPU. I don't see how this explains halving the size of the L2 from Kaveri to Bristol Ridge.

That is very hard to believe. It would have to be 4x better when compared at the same node. Do you have a source?

Looks to me as if AMD dropped power consumption 30% +/- at 28nm SHP --- that seems pretty good to me.

I don't know. AMD seems very happy with the 'Cat' front-end with Excavator cores -- wattage is down, CUs and clocks are up, process is mature. It's the old Temash SoCs on steroids.

Doubling L2 does not necessarily double performance, but it will be interesting to see Zen cores with a 'juiced' arch.

Die size and transistor count
--- Anandtech

This is from Haswell. I forgot what a stink this 'debate' started years ago (so much so, Intel does not report transistor densities anymore ...).

I suspect layout, utilization and logic are likely more important than density itself but once again, AMD seems very happy with what they have accomplished without a shrink (which seems in the past to be an issue with which they tend to struggle).

If anything, another go-round at 28nm with Carrizo/Excavator dense libraries provides more time to refine the shrink to Zen.