[News] AMD Shares ZEN info and talks about based 32 core 64 thread product

[StyM]

http://www.guru3d.com/news-story/amd...d-product.html

AMD today shared a bit more info in which they talk about Zen, as well as Zen server solutions, yes a 32-core / 64 threads ZEN based CPU developed under code-name Naples is on target to be released in Q2 2017 and thus now confirmed as well. AMD also shares some details on the AMD AM4 motherboard platform.

As you guys know the The new ?Zen? architecture is designed to scale across all of AMD?s CPU business, from enthusiast desktop platforms to enterprise-class servers and notebooks, to embedded and semi-custom products. The initial ?Zen? CPU core is stated to deliver more than 40 percent improvement in instructions per clock cycle over the previous generation cores and will come to market first in an 8-core, 16-thread system-on-chip for desktops (=Summit Ridge). For the new architecture AMD focused on three key areas when designing this special architecture:

• Performance of the engine itself with completely new branch prediction, introduction of a micro-op cache and a much wider instruction window;
• Throughput, to keep that high-performance engine fed with data and instructions out of memory through pre-fetching and a completely new cache memory hierarchy with 8 MB of L3 cache; and finally,
• Efficiency having performance and throughput without increasing power, by leveraging a 14nm FinFET process and a wealth of power saving design techniques in the architecture.

• AM4 8 cores with 95W TDP (Summit Ridge)
• AM4 4 cores with 65W TDP (Bristol Ridge)
• SP3 24 cores with 150W TDP
• SP3 32 cores with 180W TDP (Naples)

[StyM]

AMD Unveils Zen Microarchitecture, Demos Summit Ridge Performance

Naples Server

[StyM]

[AliG]

Quote on benchmark results:

The early Zen silicon is only clocked at 3 GHz, so AMD downclocked the 6900K (3.2 GHz base and 3.7 GHz turbo) to 3 GHz to normalize the test. We aren't privy to the final Summit Ridge clock speeds, but the company indicated that some SKUs would ship with higher clock speeds when it comes to market. We advise readers to take the test with a grain of salt. AMD did not share testbed details, such as the amount of system RAM, but indicated that the systems had comparable configurations.
The test consisted of a CPU-intensive multi-threaded Blender 3D rendering that scaled across all of the cores. The Summit Ridge CPU rendered the image ever so slightly faster than the Intel 6900K. The contest was close enough that, without a stopwatch, we couldn't give an accurate measurement of the speed difference, and AMD did not provide specific measurements for the test.

Very, very interesting. I wish they had just been transparent about the system configurations, but at minimum that means Zen can compete with Broadwell-E.

[zalbard]

... at minimum that means Zen can compete with Broadwell-E.

Let's be cautiously optimistic and assume that they demonstrated the best-case scenario.

[AliG]

Let's be cautiously optimistic and assume that they demonstrated the best-case scenario.

Man you just love to put down everything I say.

Compete != beat. It just means it's in the same ballpark. Chill out man.

[vario]

The early Zen silicon is only clocked at 3 GHz, so AMD downclocked the 6900K (3.2 GHz base and 3.7 GHz turbo) to 3 GHz to normalize the test. We aren't privy to the final Summit Ridge clock speeds, but the company indicated that some SKUs would ship with higher clock speeds when it comes to market.

hm.My Globalfoundries sense is tingling.Pretty much most of them should be higher and much higher then 3ghz, from this wording im guessing they arent getting the clocks, im guessing these will not go to 4ghz .Still , 8 core BD-E competitor on a cheap platform with good pricing should be plenty enough.

[AliG]

In fairness, the 6900k itself only goes to 3.7 GHz and has an MSRP around $1k. Not saying AMD doesn't need to get their clockspeeds up, just that you may not get the cheap value you're expecting.

[iddqd]

early engineering samples very rarely hit the same clocks as production silicon. only if zero mistakes were made (this almost never happens, especially for large, new designs)

[onewingedangel]

Matching clockspeeds is slightly disingenuous when the rumblings all indicate that the AMD product will be clocked a good chunk lower than Intels.

Matching an underclocked 6900k is all well and good, but what was the power consumption of the two systems?

[vario]

Matching clockspeeds is slightly disingenuous when the rumblings all indicate that the AMD product will be clocked a good chunk lower than Intels.

Matching an underclocked 6900k is all well and good, but what was the power consumption of the two systems?

Well AMD states 95W TDP, so they position it in lower TDP category then the infamous FX.

[DarylP]

What's up with that AMD roadmap?

Showing Bristol Ridge as 'Zen'

Also showing the new socket as FM3

[zalbard]

Well AMD states 95W TDP, so they position it in lower TDP category then the infamous FX.

And 6900K has a 140 W TDP, so the lower clock rate also makes sense in this context.

[Metroid]

Funny, AMD's ultra hype hits the forums around the world again, i mean if this 8 core/ 16 threads cpu indeed takes only 95 watts and tie with the 6900k which takes 140 watts then intel is in serious trouble, as we know AMD deliver the hype not the performance they promise.

[Sparky]

I withhold judgement until proper, full tests are done, as usual.

AMD has delivered on promised performance in the past, just not recent past. Either way, I don't care who makes claims, whether it be AMD, nVidia, Intel, or heck Cyrix or Via lol, I wait until hard numbers are released. They've all failed miserably in the past. PR can pull stunts and lie. Hard numbers don't lie.

[FlanK3r]

dont forget, 3.7GHz 6900K means only in turbo mode (and for single threaded tests). The base clock of 6900K i 3.2 GHz.

I think, we saw one of better scenarios in demo. And yes, it was impressive (this benchmark). IM sure, Zen will be not bad afterall. Seems for stronger multithread performance, but we know the AVX instrucitons are not 256-bit, but 2x 128-bit. So example x265 encoding will be worse than at 8c/16t Intel. SIngle thread is big question. But I hope for solid core, as example "old" Sandy Bridge still is. (In pure x86 tests for single thread without AVX etc is SB only few worse than Skylake clock to clock)

[AliG]

That is a good point about the AVX instructions. Curious to see how much of a difference that ends up making.

Either way, Zen doesn't actually have to beat Skylake for AMD to be profitable. All it has to do is be competitive with the right price, and we'll have a nice CPU war on our hands again.

[zalbard]

IM sure, Zen will be not bad afterall. Seems for stronger multithread performance, but we know the AVX instrucitons are not 256-bit, but 2x 128-bit.

There's no official source for the notion that Zen does not have 256-bit FMAC units. In fact, I am pretty sure it does.

[drmrlordx]

That's an old slide Zalbard. Fugger is correct, it has 128-bit FMACs in pairs. I fully expected Zen to have terribad AVX2 performance until I saw the Blender results.

Blender can take advantage of AVX2. By all rights, Broadwell-E should have mopped the floor with Summit Ridge, and yet it didn't . . .

[vario]

That's an old slide Zalbard. Fugger is correct, it has 128-bit FMACs in pairs. I fully expected Zen to have terribad AVX2 performance until I saw the Blender results.

Blender can take advantage of AVX2. By all rights, Broadwell-E should have mopped the floor with Summit Ridge, and yet it didn't . . .

I dont think they will attack head on intels high end.
As we know they have simpler dual channel platform, they probably wont get as high as intel on midrange clocks.Im pretty sure they will position them against intels mid end aka skylake/kabylake not the E variants, they dont waste die size on IGP , no big ass L3 cache, they wont be huge.
Which means, on stock it will probably lose to more single threaded workloads (but not by very much) ,and its gonna win on multi threaded workloads.If thats gonna be the case, im moving to zen from my 6 core haswell-E, and im probably gonna even save some money.And i doubt intels gonna lower the price of BD-E significantly, there will be pressure, but overall they will cater to different segments.
However, this thing gonna get to 4.0ghz at the very least after OC, or turbo.
As for hype, well, yea, but from time to time, they do release some kickass chips... I still remember the ATHLON on SLOT A, everyone was saying theyre pretty much done after K6-2 vs Pentium 2/3 , and voila, big surprise.Never say never, but more importantly, wait for hard numbers ;-), and the blender/ashes ones look good.

[FlanK3r]

Blender is support AVX2?

[Mechanical Man]

Blender is support AVX2?

We have no faintest idea what was used to compile AMD blender (gcc, icc) nor what optimisations were used... It might not even use AVX at all for all we know.

[drmrlordx]

Blender is support AVX2?

https://blenderartists.org/forum/sho...struction-sets

[zalbard]

That's an old slide Zalbard. Fugger is correct, it has 128-bit FMACs in pairs. I fully expected Zen to have terribad AVX2 performance until I saw the Blender results.

Looks like AVX instructions are indeed executed at half rate...

http://www.pcper.com/reviews/Process...ction-and-More

That's a very unfortunate design decision, IMO.

[StyM]

https://www.techpowerup.com/225271/a...ture-ipc-gains

AMD Tuesday hosted a ZEN microarchitecture deep-dive presentation in the backdrop of Hot Chips, outlining its road to a massive 40 percent gain in IPC (translated roughly as per-core performance gains), over the current "Excavator" microarchitecture. The company credits the gains to three major changes with ZEN: better core engine, better cache system, and lower power. With ZEN, AMD pulled back from its "Bulldozer" approach to cores, in which two cores share certain number-crunching components to form "modules," and back to a self-sufficient core design.

Beyond cores, the next-level subunit of the ZEN architecture is the CPU-Complex (CCX), in which four cores share an 8 MB L3 cache. This isn't different from current Intel architectures, the cores share nothing beyond L3 cache, making them truly independent. What makes ZEN a better core, besides its independence from other cores, and additional integer pipelines; subtle upscaling in key ancillaries such as micro-Op dispatch, instruction schedulers; retire, load, and store queues; and a larger quad-issue FPU.

AMD also improved the cache system. The hierarchy is similar to pre-Bulldozer AMD architectures, with L3 cache being shared between full-fledged cores, and each core having a dedicated L2 cache. The L1 cache is now write-back (and not write-through), the SRAM that makes up the L2 and L3 caches are faster.