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Thread: Intel to abandon FIVR in Skylake

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    Post Intel to abandon FIVR in Skylake

    Source: http://chinese.vr-zone.com/

    It appears the idea of integrated voltage regulator didn't work out after all!
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    So does this mean better overclocking and harder to pick the right mobo? I mean, in future the motherboard design is more important than haswell time.

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    Quote Originally Posted by stuffme View Post
    So does this mean better overclocking ...
    I certainly hope so!

    Quote Originally Posted by stuffme View Post
    ... and harder to pick the right mobo?
    I guess we will see the return of phase wars!
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    Quote Originally Posted by jayhall0315 View Post
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    Maybe they'll de-integrate the PCI-E clock generator as well (we can dream, right?)...
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    good riddance!
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    Quote Originally Posted by ZenEffect View Post
    good riddance!
    For enthusiasts like us, yep!

    I can't imagine they were catering to us but it's cool to see Intel identifying enthusiasts as "worth looking at" with stuff like Devil's Canyon (particularly the Pentium dual core.)
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    if the pentium dual core had more cache, it would be a pi winner. Devil's Canyon is less interesting to me as its just a renamed 4770k with slight clock increase. looking at computex, they max out at the same frequency and exhibit the same behavior under cold.
    Last edited by ZenEffect; 06-06-2014 at 07:42 AM.
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    Reasons for this are puzzling. Certainly not catering to enthusiasts, probably not to laptop makers either. Are they having problems integrating analog stuff on 14 nm? Or is that just for Sky Bay, the desktop platform, while mobile platforms will keep ISVR?
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    That's plausible. Another reason could be heat issues.
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    Quote Originally Posted by jayhall0315 View Post
    If you are really extreme, you never let informed facts or the scientific method hold you back from your journey to the wrong answer.

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    Quote Originally Posted by zalbard View Post

    It appears the idea of integrated voltage regulator didn't work out after all!
    even to this day I wonder why intel even went down this path , pressure from OEM's for a smaller power reg package ???

    When you consider std clock plus turbo for long periods of course there will always be a heat penalty, especially with OEM 'cooling' packages
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    Quote Originally Posted by alpha0ne View Post
    even to this day I wonder why intel even went down this path , pressure from OEM's for a smaller power reg package ???

    When you consider std clock plus turbo for long periods of course there will always be a heat penalty, especially with OEM 'cooling' packages
    Intel wanted to integrate everything on the CPU to simply OEM designs. Unfortunately all the stuff they integrate generates heat and possibly EM interference. It's possible as transistor density increases and transistor size drops, the heat is increasingly undesirable and it wouldn't surprise me if the processor's resistance to interference has decreased with the drop in process size.
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    Thanks for the help (or lack thereof) in resolving my P3700 issue, FUGGER...

  13. #13
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    FIVR is present in Broadwell, on 14 nm - so it's not a simple process issue.

    FIVR is extremely efficient compared to low frequency buck converter. I don't think heat losses are significant on package scale. Are you basing that on any data or reports or just omg coretemp 90 celsius haswell sux?
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