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Thread: The Official Memory Frequency WR List

  1. #76
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    http://valid.canardpc.com/tyaddx
    1671.5MHz @ 5-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 LN2| Splave

    http://valid.canardpc.com/zn771i
    2100MHz @ 6-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 LN2| Splave
    Last edited by Splave; 08-15-2014 at 09:32 AM.
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  2. #77
    Xtreme Owner Charles Wirth's Avatar
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    Back in the day, we wired the 3.3v rail directly to the DDR with a pot adjust to crank it higher
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  3. #78
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    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  4. #79
    3D Team Captain Don_Dan's Avatar
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    2100MHz CL6?!


    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  5. #80
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    I'm not entirely sure CL5 and CL6 are real.
    Even super good MFR barely have enough potential to suicide at 1000-1050 CL6 on air (with 2V+).
    I wouldn't expect them to scale on LN2 so well that they do twice the freq.

  6. #81
    3D Team Captain Don_Dan's Avatar
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    No idea, but I'm sceptical as well. After all it's a lot more than Nick Shih did on ASRock Z87 (#72).

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  7. #82
    3D Team Captain Don_Dan's Avatar
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    First DDR4 scores added to the first post.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  8. #83
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    What's to be skeptical about? Set cas6 and boot up. How exactly would one trick cpuz
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  9. #84
    3D Team Captain Don_Dan's Avatar
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    Quote Originally Posted by Splave View Post
    What's to be skeptical about? Set cas6 and boot up. How exactly would one trick cpuz
    I'm skeptical, because whenever something looks too good to be true, it's usually not true.
    Those clocks are way higher than anyone else has ever achieved on MFR at CL5 and CL6 or on CL5 and CL6 in general.

    Tricking CPU-Z is easy, here's a validation of DDR3 running CL4, although DDR3 doesn't even support CL4. Something similar might be happening here as well.
    More info about the CL4 validation(s) can be found in the HWBot OC Challenge October 2011 thread.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  10. #85
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    So I need to post it closer to the current record? That's strange logic for pushing hardware. Lol glad I wasted my time I guess
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  11. #86
    3D Team Captain Don_Dan's Avatar
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    Well, I've added your scores nonetheless, I'm not here to decide if they're valid or not. I'm just saying I find them hard to believe, but it might be due to the fact that no one else has tried MFR on LN2 for CL5 and CL6 before.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  12. #87
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    Everyone who can read will see these are bugged - show me one reason why these wonder ics that opt out at 1050 on air while psc do 1300+ now shall go much higher on c6 than they can do at c7, 8 and even 11,12. Gigabyte bugged runs ftw - only comment I will make on this^^ - only a waste of time

  13. #88
    3D Team Captain Don_Dan's Avatar
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    You know I care, Sam, I just didn't want to waste my time arguing about this.
    Thanks for proving what I thought in the first place.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  14. #89
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    Quote Originally Posted by Don_Dan View Post
    Well, I've added your scores nonetheless, I'm not here to decide if they're valid or not. I'm just saying I find them hard to believe, but it might be due to the fact that no one else has tried MFR on LN2 for CL5 and CL6 before.
    Different ics act different isn't that obvious? How can you even compare air to ln2. These were attained the same way 2200mhz runs were so better take those down too. So how can one prove validity?

    I have cas 8 9 10 11 and 12 done as well just have been away on vacation
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  15. #90
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    http://valid.canardpc.com/sdv4d0
    2085.2 7-31-31-63

    http://valid.canardpc.com/vdk71i
    2072.7 8-31-31-63

    http://valid.canardpc.com/8sdwy8
    2085.7 9-31-31-63


    http://valid.canardpc.com/sk0j5d
    2085.7 10-31-31-63


    http://valid.canardpc.com/fnk11d
    2114.8 11-31-31-63


    http://valid.canardpc.com/5s38uh
    2114.3 12-31-31-63



    All done at the same time, decdided to try because the all out mhz of the chip was not that great. CL11 thru CL14 same max
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  16. #91
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    So at CAS6 you went higher than 7, 8, 9 and 10?
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  17. #92
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    what were the subtiming values for your runs?

  18. #93
    3D Team Captain Don_Dan's Avatar
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    Quote Originally Posted by Splave View Post
    http://valid.canardpc.com/tyaddx
    1671.5MHz @ 5-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 LN2| Splave

    http://valid.canardpc.com/zn771i
    2100MHz @ 6-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 LN2| Splave
    Quote Originally Posted by Splave View Post
    http://valid.canardpc.com/sdv4d0
    2085.2 7-31-31-63

    http://valid.canardpc.com/vdk71i
    2072.7 8-31-31-63

    http://valid.canardpc.com/8sdwy8
    2085.7 9-31-31-63


    http://valid.canardpc.com/sk0j5d
    2085.7 10-31-31-63


    http://valid.canardpc.com/fnk11d
    2114.8 11-31-31-63


    http://valid.canardpc.com/5s38uh
    2114.3 12-31-31-63



    All done at the same time, decdided to try because the all out mhz of the chip was not that great. CL11 thru CL14 same max
    Quote Originally Posted by Splave View Post
    Different ics act different isn't that obvious? How can you even compare air to ln2. These were attained the same way 2200mhz runs were so better take those down too. So how can one prove validity?

    I have cas 8 9 10 11 and 12 done as well just have been away on vacation
    Thanks for posting the rest of the scores!

    I don't know how to prove validity. Of course, different ICs act differently and results on air can't be directly related to results on LN2, but I just find chips that show 100% scaling and reach almost the same clocks on CL6 to CL14 rather peculiar. That's all, it isn't a personal attack, I'm just wondering about this.


    1671.5MHz @ 5-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2100.8MHz @ 6-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2085.2MHz @ 7-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2072.7MHz @ 8-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2085.7MHz @ 9-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2085.7MHz @ 10-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2114.8MHz @ 11-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    2114.3MHz @ 12-31-31-63 | 1x4096MB Avexir MFR | Core i7 4790K @ Gigabyte Z97 | Splave
    Last edited by Don_Dan; 09-03-2014 at 02:42 PM.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  19. #94
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    I think its mostly matter what tWCL you are using not just CL

    Some Dumps corrupted, as well as I changed some sub timings a tad bit near the end when trying Cas7 and Cas6. I stared at C14 and went down just changing Cas but then changed other subs for c7 and c6 and c5 but I think the c5 could be better but I ran out of ln2 it was like -90c lol full pot for everything else.

    @ Sam any values in particular you would like or just secondaries?
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  20. #95
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    Could there a superloose subtiming or special option for raw freqs in the BIOS, which renders the CL value you set in by hand irrelevant?

  21. #96
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    Im not smart enough to find it if there is man there are IMC sub timings page but I leave them auto
    Quote Originally Posted by L0ud View Post
    So many opinions and so few screenshots

  22. #97
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    Cl4 lol is cl4 a bug? seem real in bios,hit a wall at cl4 then when I bumped it to cl5- it pushed along further

    http://valid.canardpc.com/8l8vfs


  23. #98
    3D Team Captain Don_Dan's Avatar
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    Quote Originally Posted by bullant View Post
    Cl4 lol is cl4 a bug? seem real in bios,hit a wall at cl4 then when I bumped it to cl5- it pushed along further

    http://valid.canardpc.com/8l8vfs
    Please take a look at what I wrote in the thread about HWBOT's OC Challenge October 2011:

    Quote Originally Posted by Don_Dan
    I already sent a PM regarding stage 2 to Massman three days ago, but I'll repost it in public.
    I had a hard time believing all the CL4 scores that have been posted, so I checked some datasheets from both Elpida and Micron:

    Micron D9GTR Datasheet, page 111:
    CAS Latency (CL):
    The CL is defined by MR0[6:4], as shown in Figure 53 on page 109. CAS latency is the
    delay, in clock cycles, between the internal READ command and the availability of the
    first bit of output data. The CL can be set to 5, 6, 7, 8, 9, or 10. DDR3 SDRAM do not
    support half-clock latencies.

    Also, right at the beginning it says:
    • CAS (READ) latency (CL): 5, 6, 7, 8, 9, 10, or 11
    • POSTED CAS ADDITIVE latency (AL): 0, CL - 1, CL - 2
    • CAS (WRITE) latency (CWL): 5, 6, 7, 8, based on tCK

    Then I checked Elpida's datasheets, I think the correct MGH-E datasheet is not available, so I had a look at the one for EDJ1108BASE in general. Right at the beginning it says:
    • /CAS Latency (CL): 5, 6, 7, 8, 9, 10, 11
    • /CAS Write Latency (CWL): 5, 6, 7, 8

    Seems like CL4 is not supported by DDR3 at all and the boards are running at some other CAS Latency. I know some guys think those clocks are real, but please show me CL5 at those clocks, it should be easy, right?
    Also looking at another datasheet (Hynix MFR):

    • Programmable CAS latency 5, 6, 7, 8, 9, 10 and 11, 13 supported
    • Programmable additive latency 0, CL-1, and CL-2 supported
    • Programmable CAS Write latency (CWL) = 5, 6, 7, 8

    Summing up, I don't think CL4 is real.
    Last edited by Don_Dan; 09-15-2014 at 08:38 AM.

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  24. #99
    3D Team Captain Don_Dan's Avatar
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    New DDR frequency record by kotori! (Validation, HWBOT)

    Quote Originally Posted by chew* View Post
    You can never have enough D9's.

  25. #100
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    3200mhz cl 8-12-11-18-1T with tight secondary & third timing




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