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Thread: Bulldozer-FX Clock Speeds Revealed

  1. #26
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    i hope the low clocks on the 4c is so the price can be really low. were all quite sure it can have all 4 cores really fast within the tdp, but then it would have a much higher price, and this early on amd probably does not need 20 skus. so it could be really cost efficient for us overclockers.
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  2. #27
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    Which paragraph said October? Turkish makes me facepalm.

  3. #28
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    Wasn't slightly decreased single threaded performance brought up long ago. Something along the lines of each core looses something like ~20% efficiency but at the same time allowed for more cores to be added for a given die space which would boost multithreaded performance for highly threaded workloads.

    If that where the case on a core by core basis it's not unreasonable to assume BD clock per clock, core per core may not perform at the same level as previous generation AMD hw, clock per clock, core per core.

    However with turbo core to crank up the clock for single threaded loads and the extra cores on standby for highly threaded workloads performance overall should get a boost.

    Doesn't this go inline with earlier rumors about the delay for AMD to respin for higher clocks, not a big issue for servers but more so in the desktop environment.
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  4. #29
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    Quote Originally Posted by highoctane View Post
    Wasn't slightly decreased single threaded performance brought up long ago. Something along the lines of each core looses something like ~20% efficiency but at the same time allowed for more cores to be added for a given die space which would boost multithreaded performance for highly threaded workloads.
    no, single threaded performance should be better, if a module isn't being used for two threads. it loses efficiency when two threads are being run simultaneously on the same module.

    However, this has nothing to do with IPC, just how modules work. Currently no one knows if IPC is better or worse than Phenom2. If it is worse, then AMD have made a chip that is..er...worse, than they had before. People wanting more power, would actually get an X6 before it.

    So, for someone saying it is slower in IPC than a phenom 2, either means they are lying or the chip they have is crippled. Of course there is the unlikely outcome that AMD have spent 5 years developing a chip that is slower than it's predecessor. Now that would be amusing.

  5. #30
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    If (and that's a mighty big IF) any of these rumours are true, then I think the first thing the new AMD CEO needs to do is fire the design team. I'm serious about that. Also, move away from SOI. It seems every time AMD moves to a new node they have major problems with SOI at the new node level. I simply refuse to believe that a chip that's been in development for so long could be slower than the chip it's replacing in single thread performance. Does anyone remember when AMD and Intel did die shrinks of their current designs before using a new node level on a new chip design? I think AMD should return to that strategy.
    Last edited by freeloader; 07-14-2011 at 01:01 PM.
    As quoted by LowRun......"So, we are one week past AMD's worst case scenario for BD's availability but they don't feel like communicating about the delay, I suppose AMD must be removed from the reliable sources list for AMD's products launch dates"

  6. #31
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    Quote Originally Posted by freeloader View Post
    I simply refuse to believe that a chip that's been in development for so long could be slower than the chip it's replacing in single thread performance.
    Yeah, I don't see a market for a part to exist in under those conditions. Looking forward to real information!

  7. #32
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    Slower single thread performance than 45nm K10 implies that their nextgen Trinity APU is going to be slower than Llano
    there would be no reason at all for AMD to switch their APUs to BD next year if OBR is right...
    This may raise the question why Amd couldn't even make the simpliest Bulldozer Cpu- Trinity from the first time instead of Llano.
    I mean much less cache, lower frecuency, no Turbo, and so on- May be because even for this chip the performance and yelds would be far from expected?
    It seems every time AMD moves to a new node they have major problems with SOI at the new node level. I simply refuse to believe that a chip that's been in development for so long could be slower than the chip it's replacing in single thread performance. Does anyone remember when AMD and Intel did die shrinks of their current designs before using a new node level on a new chip design? I think AMD should return to that strategy.
    Yes another point, i think something is wrong with SOI, just look at Llano, i don't care if it is APU, you can say that Athlon X4 on 32nm is runing bad, is back to 45nm rev. C2 on frecuency.
    And that it's a well known arhitecture and chip, two revisions on 45nm.
    So a new arhitecure could be even worse?


    The fact is that this years until now is a more of a shame year for Amd , and until a clear performance and specification appears( officially from Amd) all these nonsenses "news" treads about Bulldozer should not be exists.
    Last edited by xdan; 07-14-2011 at 01:18 PM.
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  8. #33
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    Ok let's cut the BS already. AMD designed 8C bulldozer on 32nm node with following target: 30-50% more performance within same power envelope as previous design @ 2:20 (which is 6C 3.2-3.3Ghz Thuban @ 125W). So 30-50% faster than 6C 3.3Ghz 125W thuban in this chart should land 8C 3.2Ghz+ Zambezi between 213pts and 246pts.Take an average and you land at ~230pts.This is above 980x and 2600K.
    Last edited by informal; 07-14-2011 at 02:01 PM.

  9. #34
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    Quote Originally Posted by informal View Post
    Ok let's cut the BS already. AMD designed 8C bulldozer on 32nm node with following target: 30-50% more performance within same power envelope as previous design @ 2:20 (which is 6C 3.2-3.3Ghz Thuban @ 125W). So 30-50% faster than 6C 3.3Ghz 125W thuban in this chart should land 8C 3.2Ghz+ Zambezi between 213pts and 246pts.Take an average and you land at ~230pts.This is above 980x and 2600K.
    everyone already analysed that and comes up with 5-12.5% faster pre-clock then Phenom II. which in DH review it was 12.7% faster preclock then phenom II.
    that's with write cache messed up or L3 cache messed up.
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  10. #35
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    Even if you totally disregard any core enhacements alone.
    BD has more L3, it has more L2 per core (4xtimes as much) ,it has bootload of new instructions, it runs faster HT/NB with added faster memory.So yea.
    On the other hand, in some specific scenarios it can be slower than PHII, some types of stream write to the cache are f-ckd.but it shouldnt be a big deal.
    I wouldnt expect single threaded to be in sandys territory tho, even bloomfield might be a stretch, but it probably very much depends on software utilised.MT should rock.

    However another delay with yield problems seems totally legit.They pretty much always have some problems at start :-/ .
    Another thing to note.
    Remember Guys when JF told that they cant publish any preview or any information prior to launch because they have timed stocks of cpus in the channel ?
    Well, guess what sherlock, original time to market already passed, and now theyre hitting another delay, so this excuse doesnt make any sense.
    Not that it made a lot of sense before.
    AMD. DO A PREVIEW ALREADY.

  11. #36
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    Thread partially cleaned.

    Please do not link to people who have been banned from XS. They have been banned, they no longer have a voice here.

    There are other issues with the deleted posts and non-deleted posts (troll accusations, namely), which is off-topic and ultimately up to staff anyway. I should remind everyone that a troll accusation is a personal attack and first News Section infraction = permanent ban from the News Section.

    EDIT: also, please do not include 'fights' in your signatures, I've seen those on the rise recently. Signatures are posted with every post and fighting is not appropriate in any posts
    Last edited by Vapor; 07-14-2011 at 02:52 PM. Reason: edit

  12. #37
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  13. #38
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    Quote Originally Posted by Olivon View Post
    snip
    Haha, good laughs right there. Thanks for reminding me of this one, it was great back then
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    Quote Originally Posted by PerryR, on John Fruehe (JF-AMD) View Post
    Pretty much. Plus, he's here voluntarily.

  14. #39
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    Ouch I was off by a whole 7%! Yikes.

  15. #40
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    Yeah, I have to admit you were right about Penryn, it didn't change anything. But I'd like to see that "8 native core part in H2 2009" thou. Where's it?
    Last edited by STaRGaZeR; 07-14-2011 at 04:12 PM.
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    Quote Originally Posted by PerryR, on John Fruehe (JF-AMD) View Post
    Pretty much. Plus, he's here voluntarily.

  16. #41
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    Quote Originally Posted by STaRGaZeR View Post
    Yeah, I have to admit you were right about Penryn, it didn't change anything. But I'd like to see that "8 native core part in 2H 2009" thou. Where's it?
    It got canned.If you don't know by now,it was 8C 45nm bulldozer design("8 core native part") that wouldn't be competitive so AMD canned it and went to redesign it for 32nm.As it can be seen,it will be almost exactly 2 years since this 45nm BD part was to be launched.The gap was filled by 10h MCM,rather cheap for AMD since they reused 10h and had to design only a new socket that is compatible with new bulldozer core.

  17. #42
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    these are my personal favourites

    http://www.xtremesystems.org/forums/...=1#post2194270
    http://www.xtremesystems.org/forums/...=1#post2399934

    well... most of us already made overly optimistic predictions in the past

  18. #43
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    Quote Originally Posted by informal View Post
    No mini cores,no modules in official specs when it launches.Actually there never were "minicores". 8C means 8 integer cores and 8 128bit FMAC units accompanying those cores.Each core can take up 2 FMAC units so if FP code is not well threaded you can have 4 "double strong " FP threads(4 cores each using 2x128bit FMAC).
    Good recap, thanks.
    Shame about the delay, though. October is way past the school and uni sales.
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  19. #44
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    http://hardforum.com/showthread.php?t=1612784

    Mark your calendars for July 16th! AMD and HardOCP are teaming up to deliver the community a GamExperience! Tourneys will be played. Raffles and tons of free stuff will be had. Free-for-all headshots will be made. Winners will be crowned. Losers will be chastised! VIP lounge for Tourney players, plenty of Fusion, Eyefinity, and Big Screen demo stations. And yes, we will give the HardOCP community their first hands-on GamExperience with AMD's next generation AMD FX / Bulldozer hardware. This event will be open to the public in Dallas, Texas. More details coming soon.


    UPDATE - 06/20/11 - Yes, Bulldozer will be there and you will be able to get hands on!

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  20. #45
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    @Sweeper
    Well some of us were basing predictions on what AMD stated for server throughput(they exaggerated a bit too,ie. Randy Allen).This didn't apply to desktop since desktop workloads are not memory BW limited.In server segment Barcelona did quite well actually.Chip was faster than Clower 4C parts in spec rate(especially fp) and stream,by a decent margin.Intel needed 45nm and higher clock speed to make a parity there.Desktop was a different story,especially considering the level of multithreaded code in client apps back in 2007. For the most part(and this applies even today),client software preferred lower core counts(between 2 and 6),cores that can extract higher level of ILP and ultimately higher clock speeds.
    Last edited by informal; 07-14-2011 at 05:21 PM.

  21. #46
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    Quote Originally Posted by zalbard View Post
    Good recap, thanks.
    Shame about the delay, though. October is way past the school and uni sales.
    It's unbelievable that this manufactured delay has any legs whatsoever. It comes from a guy that admittedly hates AMD, atmittedly faked results, and admittetdly spread those results across the internet. How can you give his rumor even the slightest credibility? Man the internet is soooo fickle it's dangerous.

  22. #47
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    flippin_waffles: +10!

    I've been around long enough to see OBR make all kinds of crazy claims concerning AMD/ATI,
    and they've never been optimistic or factual....

    I'm not going to bother searching, but I'd imagine some of his posts are still in XS's DB if anyone cares to look.

    The one that I remember clearly is when he said the "new" PHII 940 would be clocked @ 2.6Ghz and NOT 3.0 as AMD stated....
    BS, just like most of the other things he claimed to have the inside track on....

    Everyone seems to wonder how he gets around NDA's.
    It's easy when you just make shiat up....
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  23. #48
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    Quote Originally Posted by Daveburt714 View Post
    Everyone seems to wonder how he gets around NDA's.
    A few ES chips (BD and SB-E) @ eBay
    Last edited by Dumo; 07-14-2011 at 10:11 PM.

  24. #49
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    Quote Originally Posted by freeloader View Post
    If (and that's a mighty big IF) any of these rumours are true, then I think the first thing the new AMD CEO needs to do is fire the design team. I'm serious about that.
    oh boy. things are much worse than you know, my fuzzy little friend.

  25. #50
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    Quote Originally Posted by freeloader View Post
    If (and that's a mighty big IF) any of these rumours are true, then I think the first thing the new AMD CEO needs to do is fire the design team. I'm serious about that.
    oh boy. things are much worse than you know, my fuzzy little friend.

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