Intel's Larrabee GPU will finally go into commercial production next year, but not as a graphics processor. Instead, the part will make its debut in a 50-core incarnation fabbed on Intel's 22nm and aimed squarely at one of the fastest growing and most important parts of NVIDIA's business: math coprocessors for high-performance computing (HPC).
When Intel's ambitious, hybrid software/hardware GPU effort failed in late 2009
due to delays, Intel insisted that the silicon side of the project would live on in some form. The next year, the company announced that Larrabee had morphed into the Knight's family of HPC coprocessors, which the company began shipping in very limited quantities as a research testbed. Intel also began calling the basic architecture of the Knight's family is Many Integrated Core (MIC) architecture.
is the official unveiling of Intel's broader plan to commercialize the MIC-based Knight's family, starting with the 50-core Knight's Corner chip on 22nm. Intel is also announcing partnerships with SGI and other system integrators that plan to build commercial HPC systems around the MIC silicon.
The MIC products will compete directly with NVIDIA's Tesla line, making MIC a threat to NVIDIA's growth prospects in a world where integrated processor graphics (IPGs) like Sandy Bridge and AMD's Llano are eating the discrete GPU market from the bottom up.
The main advantage that Intel touts vs. Tesla is that because MIC is just a bunch of x86 cores, it's easy for users to port their existing toolchains to it. (When using Tesla, researchers must port to NVIDIA's proprietary but well-loved CUDA platform.)
In a previous discussion
of the MIC vs. Tesla issue, I suggested that Intel was massively overselling this ease of porting, since applications must be redesigned anyway. But having learned a bit more in the intervening year, I'm not quite as certain that this is the case. Ease of development and porting do seem to matter for both budget-constrained academic labs and the kinds of high-frequency trading and other finance applications that prize speed of deployment along with fast computation.
Even if it does turn out that x86 gives Intel a big advantage, it's not all smooth sailing for MIC. One thing that's missing from the press materials that Intel sent was a set of relative performance claims vs. Tesla, and that's probably because the more specialized Tesla would crush it on the kinds of codes for which Tesla is commonly used. It's the age-old general-purpose (slower, easier to use) vs. specialized (faster, harder to use) tradeoff, and Intel is betting that since Tesla has so far been the only real option there are plenty of potential users out there who are in the market for something less specialized.
None of the press materials I saw indicated that Intel is changing its interconnect architecture for Knight's Ferry, so it looks like the chipmaker will be hanging 50 cores off a single, high-performance yet power-hungry ring bus. This is surprising, since I would have expected the company to move to a tile architecture (├:banana: la SCCC
) for a core-count this high. A tile-based design is no doubt in MIC's future, but there are no doubt issues that remain to be worked out.