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Thread: Intel Rapid Storage Technology 10.5.0.1027 with SRT Support

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    Registered User Hawk-NGO's Avatar
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    Intel Rapid Storage Technology 10.5.0.1027 with SRT Support

    The Intel Rapid Storage Technology software package provides high-performance SATA AHCI and SATA RAID capabilities for Microsoft Windows operating systems. Intel Rapid Storage Technology provides improved performance and reliability for systems equipped with SATA disks for desktop, mobile, and server platforms. When using one or multiple SATA disks, you can take advantage of enhanced performance and lower power consumption.
    This version adds support for Intel Smart Response Technology (SSD caching).

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    still no trim for raid arrays?
    Sigs are obnoxious.

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    Quote Originally Posted by iddqd View Post
    still no trim for raid arrays?
    I remember many months ago when Intel accidentally added support for passing TRIM to a RAID array in one of their driver release notes. There was much happiness. Sadly I've given up on waiting. My next OS drive will be a single SSD.

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    Quote Originally Posted by D749 View Post
    My next OS drive will be a single SSD.
    As it should've been last time around

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    I am Xtreme zanzabar's Avatar
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    Quote Originally Posted by D749 View Post
    I remember many months ago when Intel accidentally added support for passing TRIM to a RAID array in one of their driver release notes. There was much happiness. Sadly I've given up on waiting. My next OS drive will be a single SSD.
    they had added trim to the raid driver, but that as for AHCI pass through and not for member drives.
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    Passing TRIM would have been a simple no-brainer for any controller. It just needs to split the TRIM and send it to the right drives.

    Why OCZ didn't do it with Revo, I can understand (they aren't making the RAID controller, they can't do much there), but why Intel isn't doing it for Matrix yet - meh
    P5E64_Evo/QX9650, 4x X25-E SSD - gimme speed..
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    Lately there has been a lot of BS(Dave_Graham where are you?)

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    I am Xtreme zanzabar's Avatar
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    Quote Originally Posted by alfaunits View Post
    Passing TRIM would have been a simple no-brainer for any controller. It just needs to split the TRIM and send it to the right drives.

    Why OCZ didn't do it with Revo, I can understand (they aren't making the RAID controller, they can't do much there), but why Intel isn't doing it for Matrix yet - meh
    its not that simple, to use trim with striped raid u would have to address nand cells separately than the storage address. and the drives will garbage collect even with raid.
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    Note that your BIOS MUST support this version or BSODs will ensue. Hence why when it comes to RST caching it is best to download directly from the manufacturer's (ASUS, Gigbayte, etc.) website and NOT a third party source like NGOHQ, etc.

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    Quote Originally Posted by zanzabar View Post
    its not that simple, to use trim with striped raid u would have to address nand cells separately than the storage address.
    What do you mean? Of course you have to translate the RAID LBA to SSD LBA, but the RAID controller need not address the NAND directly.
    Even something as funny as 512byte stripe would not be an issue here.
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    Quote Originally Posted by MR_SmartAss View Post
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    Passing TRIM would have been a simple no-brainer for any controller. It just needs to split the TRIM and send it to the right drives.
    yeah with R0 it should be easy as hell, but it is another layer of I/O, and when you start getting into parity...man that could add tons of I/O...might be a hardware/latency limitation more than anything!
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    Quote Originally Posted by alfaunits View Post
    What do you mean? Of course you have to translate the RAID LBA to SSD LBA, but the RAID controller need not address the NAND directly.
    Even something as funny as 512byte stripe would not be an issue here.
    its not that simple as trim is not a bit lvl, its a cell level and on MLC each cell is not a bit

    Quote Originally Posted by Computurd View Post
    yeah with R0 it should be easy as hell, but it is another layer of I/O, and when you start getting into parity...man that could add tons of I/O...might be a hardware/latency limitation more than anything!
    i think that raid1 would be easiest.
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    Quote Originally Posted by zanzabar View Post
    its not that simple as trim is not a bit lvl, its a cell level and on MLC each cell is not a bit
    It is an LBA level. While a 4 byte TRIM would be an obvious error, a 512 byte TRIM is not unexpected. Since every file system uses at least 512 byte sectors (to my knowledge, plus anything lower than this would be ridicolous space wise), and a minimum stripe size is 512 bytes (and rarely supported), then all TRIMs can be divided on 512 byte boundary, which is all that is sufficient.
    There is nothing saying a TRIM must be applied to 4K boundary, or 8K with newer drives. What the drive does with a TRIM of a lower size depends on the drive (as does any TRIM processing), but it must allow for such TRIM commands.

    So passing the TRIM command is easy - whether there would be cases where a TRIM would fail is the remaining question (i.e. would there be drives that fail less than a page size TRIM).
    On a regular setup, with minimum of 4K clusters and stripe sizes, which is what can be expected of at least 99% of setups, TRIMs can obviously be passed.
    P5E64_Evo/QX9650, 4x X25-E SSD - gimme speed..
    Quote Originally Posted by MR_SmartAss View Post
    Lately there has been a lot of BS(Dave_Graham where are you?)

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    solve the problem with newest ssd and LPM problem.??????

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    Quote Originally Posted by SKYMTL View Post
    Note that your BIOS MUST support this version or BSODs will ensue. Hence why when it comes to RST caching it is best to download directly from the manufacturer's (ASUS, Gigbayte, etc.) website and NOT a third party source like NGOHQ, etc.
    That feature will only be available if you have the proper hardware.

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