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[Opteron146]

I am not against BD CMT design, but without stronger IPC it's just useless.

Well phrase the sentence a bit less dramatic and you are right. Low IPC does not make your CPU useless, but it obviously hinders your applications as long as they use less than 8 threads. There's turbo, but it can probably only help a bit.

In the end, we have a brand new design. Nobody has done CMT before. Just because it's first version is not "da über CPU" doesn't make the whole approach "useless".
They've already have a 2nd and 3rd version in the queue so let's see what will happen with IPC.

The very first P4 (Williamete, Socket 423) was really useless. Clock was still low around ~1.5GHz, and a P3 was always faster, not to mentiond AMD's K7. The 2nd version Northwood (S428, later versions with Hyperthreading) was actually quite good, SSE2 was used more often, too, but then the 3rd generation was Prescott aka Preshott. That was then really the time to pull the plug.

So far in my opinion, BD is much better than the first P4. Let's see how the story will end

[Evantaur]

as long as it outperforms thuban i 'm happy

[xdan]

You sure ? got data to back that statement ?

I do not have data, but i have confirmation that it will be a "radiator for cold days" compared to SB, will need stronger cooling.
It's easy to understand that a 330mm^ will be hoter than a 216mm^ chip.
Think what you want, in a few days we will all see.
The adecvate slogan for BD will be "Long live the super tormented price/performance raport".

[xdan]

Cooler on bios or in case?
Let's not forghet that Phenom and Thuban have the senzors on package not on die, the readings are not accurate, and so the normal temperature is by AMD at 62 degrees. http://products.amd.com/en-gb/Deskto...il.aspx?id=682
SB as Nehalem have intern senzors on die, the max TDP temp is 72.6.
Usually when a Phenom pass 70-75C starts trolling.

If BD uses same tipe of senzors, than the air in the case, and the radiator of the cooler indicates the real temperature.

[Apokalipse]

I am not against BD CMT design, but without stronger IPC it's just useless.

You seem to forget that single threaded IPC != two threaded IPC in the same module.
the figure applies when both cores in the module are used, when compared to one core in the module being used.
You could compare one module to one hyper-threaded core. Both are sort of an "extended" core, designed to process two threads, getting a significant gain in multithreaded performance for a small increase in die area, although they do it in very different ways.
But there should be more gain with a BD module than with hyper-threading (which gets about 20% gain on average).

Of course we still don't know if BD has higher IPC than SB (with a single thread per core/module), but you can't rule it out.

Although you also have to keep in mind IPC is only part of the picture; it isn't the be-all end-all. For single threaded performance, you want a good combination of IPC and frequency.
Optimising your architecture for higher frequency isn't itself a bad idea, unless you simply ignore IPC (eg Netburst).
The opposite of that is focusing entirely on IPC and ignoring frequency; you don't want to do that either - increasing IPC can often require adding additional hardware/logic, which increases power consumption and die area etc.

[xdan]

As i wrote earlier you have two cores at 80% performance, equal 160% core performance, not that much qain comparing to 120% Intel core +HT.

[Apokalipse]

As i wrote earlier you have two cores at 80% performance, equal 160% core performance, not that much qain comparing to 120% Intel core +HT.

I think we'll have to wait for benches to see what figure is most accurate (if any of them are)

[FlanK3r]

I do not have data, but i have confirmation that it will be a "radiator for cold days" compared to SB, will need stronger cooling.
It's easy to understand that a 330mm^ will be hoter than a 216mm^ chip.
Think what you want, in a few days we will all see.
The adecvate slogan for BD will be "Long live the super tormented price/performance raport".

So...how explain me the fact Thuban at 45nm with "big" die size is colder than most of CPUs (Sandy Bridge, Lynfields....)? No, your idea is wrong. SB topped at more than 95 C in load with the same cooler and voltage at 1.46V, Thuban 60 C (in coretemp 50C!)....Difference between area sensors can not be so big.

[informal]

@dess
This is what dresdenboy wrote on at forum regarding pipeline capability of flexfp:

According to the BD SOM, all 4 FP pipelines do integer SSE stuff with different capabilities:
Pipe 0: simd, mmx, multiplier
Pipe 1: shuffles, packs, permutes
Pipe 2: simd, mmx, ALU
Pipe 3: simd, mmx, ALU, store

And move ops are eliminated.

[flyck]

I do not have data, but i have confirmation that it will be a "radiator for cold days" compared to SB, will need stronger cooling.
It's easy to understand that a 330mm^ will be hoter than a 216mm^ chip.
Think what you want, in a few days we will all see.
The adecvate slogan for BD will be "Long live the super tormented price/performance raport".

It is the reverse.

A big surface has an easier time transmitting all the energy and thus being cooler.

[Oese]

I understand, however, single thread per module is 100% (of course, how can a single thread be 80%, compared to what? There is possibility that it would be even 110 - 120% compared to a hypothetical divided-in-half BD module with only one 128bit FMAC), second thread will scale with 80% (compared to Intel 20%), so there is 180% for two threads, equalling 90% per thread (as I think informal told it before).

"Calculated core count" will then be 8*0.9 = 7.2, which is not too far away from 8 cores...

This has nothing to do with IPC at all, only with scaling of the second thread in relation to the first that doesnt have to share anything (and thus must be set 100% - everything else would be strange logic).

As for the Power/Temps... I am rather optimistic?

[undone]

http://www.reddit.com/r/hardware/com..._gonna_say_it/

I'm sitting in on a press briefing for AMD Bulldozer right now, and while everything is embargoed, I will say this: If you're building a gaming PC, this is going to be the way to go.

Edit 1 We're gonna be covering the normal stuff (Benchmarks, etc.) but we're also going to talk about value proposition against Intel as well as some of the exciting new advancements that Bulldozer brings to the table. On October 12th, 12:01am CST.

Edit 2 "We" means Icrontic. I'm not trying to shill my site or anything; we do have a Bulldozer on the testbench, we sat in on a press briefing tonight, and we will have a launch-day piece about it. Of course, you'll also find reviews and other awesome content at [H], AnandTech, TechReport, and so on. Please consider us in your content rotation, we're a small but very, very dedicated team who have been doing this since 2000. Thanks!

EDIT:


http://www.hartware.de/news_52945.html

http://www.planet3dnow.de/vbulletin/...&postcount=668

[hydr0x]

I'm sitting in on a press briefing for AMD Bulldozer right now, and while everything is embargoed, I will say this: If you're building a gaming PC, this is going to be the way to go.

i really hope this guy is not a Troll.

roll on October 12th

[imamage]

results anybody? nda?

plenty of press kits around, give us a tease

From what I heard
Top-end model
DO come with Water-Cooling kit similar with Antec H920

But for those who overclock to the max , just ignore it

EDIT : It looks like only available to Press Review Kit , Water cooling kit is not for Retail

[-Boris-]

Doubling the FPU's takes massively more die area, meaning more power usage, and you can't clock it as high if you want to remain within a certain TDP.
Floating point units are much more complex than integer units, and take up much more die area.
instruction sets like SSE, AVX use the FPU primarily.

You just repeated the things I questioned without any arguments. Each FPU takes 1% of total die are, for a total of 4% of an full 8c BD. Of course it needs other stuff as well in the front end, but even if you say that all that takes as much space as the FPUs themselves (which is absurd) there is still just 8% larger die. And Turbo is made for just these kind of things, so frequencies shouldn't be a problem. Besides, do you honestly think it would make such a large impact on frequencies? You can chop of half the power usage with lower current and a few hundred MHz lower clocks. Even if power usage rose by 25% (again absurd) it wouldn't mean to much in lost base frequencies, and probably close to nothing in max frequencies.

You do realize that in order to get 8 *full* fpus the old way, you have to replicate front ends ,integer exec. units and L1 and L2 caches ,right? This leaves you with wasted and doubled die area that will mostly sit idle (especially fp unit). Beaty of bulldozer is exactly in maximizing perf./watt/mm^2. Btw ,the most power hungry part of the core is usually fpu...

No, you wouldn't need to duplicate most of the processor. SB has an full AVX unit per core, didn't need to duplicate most of the core to get that working. The same when Phenom got an 128bit FPU. Of course you need som extra circuits to make it work, but not more space than the entire FPU. And as I just said, the FPUs themselves eats up just 4% of a full module.

[PatRaceTin]

6 day count

[informal]

@Boris
SB cannot do 2 256 loads per cycle so its exec. potential is just theoretical. At best in avx tuned code,one can expect 20 to max 50 percent speedup. Oh and u shouldn't mix sse and avx instructions due to the way how intel implemented it. So SB has in no way ''better'' designed fpu compared to bd.
As for implementing double sized flexfp in bd vs current one,you have to realize that current one IS already beefed up version. In order to support 2x256 bit ops,the load/store capability and therefore complexity would have to be dramaticaly increased. Who needs such an fpu if your L/S system can't feed it(ah yes,intel made one )

[Opteron146]

No, you wouldn't need to duplicate most of the processor. SB has an full AVX unit per core, didn't need to duplicate most of the core to get that working. The same when Phenom got an 128bit FPU. Of course you need som extra circuits to make it work, but not more space than the entire FPU. And as I just said, the FPUs themselves eats up just 4% of a full module.

Intel can reuse their INTcore datapaths for AVX (which is FP only), because INT&FP is tightly coupled in their design. AMD has the opposite approach, INT and FP are separated, already since the K7 days, this actually enabled the CMT approach. For Intel it would be rather impossible, they would need a totally new architecture. Well maybe Haswell will deliver that.
Anyways, back to BD: Because AMD's FPU is not tightly coupled, they would have needed much more space than Intel. If you compare K8/K10, you will see that K10's FPU is nearly double size. It is bit less than that, because it was upgraded from 80bit -> 128, not from 64-> 128.
However, FP code is generally not used very often. To combine now 2x128bit units, for one AVX256bit pass every cycle was definitely the best, smart and most efficient way.

[xdan]

So...how explain me the fact Thuban at 45nm with "big" die size is colder than most of CPUs (Sandy Bridge, Lynfields....)? No, your idea is wrong. SB topped at more than 95 C in load with the same cooler and voltage at 1.46V, Thuban 60 C (in coretemp 50C!)....Difference between area sensors can not be so big.

Yes it is, the seonsors on AMD indicate a 15-20C lower temperature than it is.
Have you seen an Thuban working at 75-80C? No because than it already entered in throttle.

It is the reverse.

A big surface has an easier time transmitting all the energy and thus being cooler.

Well BD at same surface at Thuban will have much more tranzistors in it.
What you say works in a closed case for a short time, but in a long time the air inside is getting hotter.
What i'm saying is that BD will need a strong cooler like Noctua DH-14.

[JF-AMD]

I am not against BD CMT design, but without stronger IPC it's just useless.
So with CMT we have 80% performance of a true core. But the problem is that it's not a 100% performance core + 80% CMT core( comparing Intel + HT), it's 80% performance for both cores in module so...
If we calculate 0.8(80%) * 8 = 6.4 so 6.4 true cores performance, so a bigh hit.
This desing it doesn't scale well the more cores you put.
If we put that the IPC isn't much better- may be the same, not to be pesimist to say lower, than wat we got?
A 6.4 cores with a 10% speed bump, may be a 6.8-7 true cores performance.
So what "maximizing perf./watt/mm^2" - not performance anyway,

I have my info, and BD it's a disappoiment. For an " 8core" . As it' price, overall performance is between 2500K and 2600K, and will be hoter on air cooling than SB.

Sorry, your math is not right.


And for the other guys talking about 256-bit AVX, here is an extenisve list of all of the client apps that I am aware of that will utilize 256-bit AVX (please update if you know of some):

[Leeghoofd]

If you're building a gaming PC, this is going to be the way to go.

Really looking forward to your test game results...

[liberato87]

http://semiaccurate.com/forums/showp...&postcount=118

Some Dutch magazine had a review online premature accidentally.

http://translate.google.nl/translate...x-8150&act=url

Google Cache is our friend, translate too.

One point of interest: Cinebench 11.5 does not give a 5.xx score for BD FX-8150

[Manicdan]

Yes it is, the seonsors on AMD indicate a 15-20C lower temperature than it is.
Have you seen an Thuban working at 75-80C? No because than it already entered in throttle.

Well BD at same surface at Thuban will have much more tranzistors in it.
What you say works in a closed case for a short time, but in a long time the air inside is getting hotter.
What i'm saying is that BD will need a strong cooler like Noctua DH-14.

the best sensor to test with is in a WC loop, make it small and use the water to see how much heat is coming out of the cpu and into the water, if all variables are the same besides the cpu switch, you can find the C/W ratio for each.

also ive had a Deneb chip boil water in my loop before due to the pump failing. the throttle point is ~90C for the MB sensor and ~60C for the internal sensor.

[Olivon]

http://semiaccurate.com/forums/showp...&postcount=118

Cinebench 10 ST
FX-8150 : 4074
2500k/2600K : 5800
i7-965 : 4900

Cinebench 10 MT
FX-8150 : 20615
2500k : 18615
2600k : 22615

Cinebench 11.5 MT
FX-8150 : 6.01
2500k : 5.37
2600K : 6.75
i7-965 : 5.73

3DMark Vantage CPU Score :
FX-8150 : 19119
2600K : 22500

3DMark Vantage Total Score :
FX-8150 : 21949
2600K : 25500

3DMark 11 Total Score :
FX-8150 : 6616
2600K/i7 965 : 7385

Dirt 3
FX-8150 : 105avg/75min
i7-965 : 93avg/71min

Mafia II
FX-8150 : 68.3 avg
i7-965 : 76 avg

Far Cry II
FX-8150 : 111avg/23min
i7-965 : 126avg/75min

[flyck]

http://semiaccurate.com/forums/showp...&postcount=118

As i already mentionned in that thread, a difference of 0,06 is nothing in C11,5.

More importantly is that BD doesn't perform any better than the 1100T in single threaded C10!! Thats with a 500MHz clockspeed advantage...

The FX4100 (3,6-3,8Ghz) will be slower than the current Deneb lineup by the looks of the dutch review.